Patents by Inventor Vaidyanathan Kripesh

Vaidyanathan Kripesh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6872464
    Abstract: A soldering agent for use in diffusion soldering processes contains, in a soldering paste, a mixture of at least partially metallic grains of a high-melting metal and a solder metal. In a diffusion soldering process, the solder metal reacts completely with the high-melting metal and metals belonging to parts that are to be joined to one another by the soldering process, to form an intermetallic phase.
    Type: Grant
    Filed: March 7, 2003
    Date of Patent: March 29, 2005
    Assignee: Infineon Technologies AG
    Inventors: Holger Hübner, Vaidyanathan Kripesh
  • Patent number: 6846725
    Abstract: A method for forming wafers having through-wafer vias for wafer-level packaging of devices, the method comprising the steps of depositing metal on one of two wafers; bonding the two wafers using the metal deposited on the one of the two wafers; forming a through-wafer via in one of the two wafers; filling the through-wafer via with a conductive material; and forming a cavity in the one of the two wafers having the through-wafer via wherein the cavity is superposable over a device.
    Type: Grant
    Filed: January 27, 2003
    Date of Patent: January 25, 2005
    Assignee: Institute of Microelectronics
    Inventors: Ranganathan Nagarajan, Chirayarikathuveedu Sankarapillai Premachandran, Yu Chen, Vaidyanathan Kripesh
  • Publication number: 20040185593
    Abstract: Inter-connectors are typically used for interconnecting electronic components. Interconnections between electronic components are generally classified into at least two broad categories of “relatively permanent” and “readily demountable”. A “readily demountable” connector includes a spring-like contact structure of one electronic component for connecting to a terminal of another electronic component. The spring-like contact structure, also known as an inter-connector, generally requires a certain amount of contact force to effect reliable pressure contact to a terminal of an electronic component. Therefore, the shape and metallurgy of the inter-connector are important factors in determining the effectiveness of the inter-connector for making pressure connection to a terminal of the electronic component. Conventional methods of making such an inter-connector use lithographic and planarisation methods to “make” the inter-connectors in segments.
    Type: Application
    Filed: March 20, 2003
    Publication date: September 23, 2004
    Inventors: Vaidyanathan Kripesh, Mahadevan K. Iyer, Ranganathan Nagarajan
  • Patent number: 6787456
    Abstract: Inter-connectors are typically used for interconnecting electronic components. Interconnections between electronic components are generally classified into at least two broad categories of “relatively permanent” and “readily demountable”. A “readily demountable” connector includes a spring-like contact structure of one electronic component for connecting to a terminal of another electronic component. The spring-like contact structure, also known as an inter-connector, generally requires a certain amount of contact force to effect reliable pressure contact to a terminal of an electronic component. Therefore, the shape and metallurgy of the inter-connector are important factors in determining the effectiveness of the inter-connector for making pressure connection to a terminal of the electronic component. Conventional methods of making such an inter-connector use lithographic and planarisation methods to “make” the inter-connectors in segments.
    Type: Grant
    Filed: March 20, 2003
    Date of Patent: September 7, 2004
    Assignee: Agency for Science, Technology and Research
    Inventors: Vaidyanathan Kripesh, Mahadevan K Iyer, Ranganathan Nagarajan
  • Patent number: 6773956
    Abstract: A solder metal made of a eutectic or stoichiometric composition including at least two metallic or semiconducting elements is applied to a contact (of the semiconductor component, brought into contact with the metal layer of a metallized film and alloyed by heating into the metal layer of the film, thereby producing an electrically conductive connection having a higher melting point. A solder metal that is particularly suitable for such a purpose is the Bi22In78 (melting point 73° C.), Bi43Sn57, or In52Sn48, or BiIn, or BiIn2.
    Type: Grant
    Filed: January 28, 2003
    Date of Patent: August 10, 2004
    Assignee: Infineon Technologies AG
    Inventors: Holger Huebner, Vaidyanathan Kripesh
  • Publication number: 20040077154
    Abstract: A method for forming wafers having through-wafer vias for wafer-level packaging of devices, the method comprising the steps of depositing a metal layer on one of a first wafer and a second wafer; bonding the first wafer and the second wafer using the metal layer deposited on one of the first wafer and the second wafer; forming a through-wafer via in one of the first wafer and the second wafer; filling the through-wafer via with a conductive material; and forming a cavity in the one of the first wafer and the second wafer having the through-wafer via, wherein the cavity is superposable over a device.
    Type: Application
    Filed: January 27, 2003
    Publication date: April 22, 2004
    Inventors: Ranganathan Nagarajan, C. S. Premachandran, Yu Chen, Vaidyanathan Kripesh
  • Patent number: 6717812
    Abstract: Method and apparatus for fluid-based cooling of heat-generating devices are disclosed. A heat-generating device is mounted on a carrier. The heat-generating device is spatially displaced from the surface of the carrier, thereby forming a channel. The heat-generating device and the carrier are enclosed in an enclosure having an inlet and an outlet. A substantially electrically non-conductive cooling fluid for introduction into the enclosure and into the channel and expulsion from the enclosure and for extracting heat from and thereby cooling the heat-generating device and the carrier.
    Type: Grant
    Filed: February 19, 2003
    Date of Patent: April 6, 2004
    Assignee: Institute of Microelectronics
    Inventors: Damaruganath Pinjala, Vaidyanathan Kripesh, Hengyun Zhang, Mahadevan K Iyer, Ranganathan Nagarajan
  • Publication number: 20040025976
    Abstract: A soldering agent for use in diffusion soldering processes contains, in a soldering paste, a mixture of at least partially metallic grains of a high-melting metal and a solder metal. In a diffusion soldering process, the solder metal reacts completely with the high-melting metal and metals belonging to parts that are to be joined to one another by the soldering process, to form an intermetallic phase.
    Type: Application
    Filed: March 7, 2003
    Publication date: February 12, 2004
    Inventors: Holger Hubner, Vaidyanathan Kripesh
  • Publication number: 20030176054
    Abstract: A solder metal made of a eutectic or stoichiometric composition including at least two metallic or semiconducting elements is applied to a contact (of the semiconductor component, brought into contact with the metal layer of a metallized film and alloyed by heating into the metal layer of the film, thereby producing an electrically conductive connection having a higher melting point. A solder metal that is particularly suitable for such a purpose is the Bi22In78 (melting point 73° C.), Bi43Sn57, or In52Sn48, or BiIn, or BiIn2.
    Type: Application
    Filed: January 28, 2003
    Publication date: September 18, 2003
    Inventors: Holger Huebner, Vaidyanathan Kripesh
  • Publication number: 20020175424
    Abstract: The present invention relates to the structure and process of forming metal surfaces on the bare metal interconnect of a semiconductor chip. The metal chip comprises metal interconnect formed on a semiconductor substrate and at least a portion of the metal interconnect is exposed to the environment. In one aspect of the invention, the process comprises applying a noble metal on the exposed portion of the metal interconnect and performing a chemical process that causes a layer of the noble metal to convert into a bondable layer compatible with a conventional wire bonding. The process also comprises bonding a metal wire to the bondable layer.
    Type: Application
    Filed: February 14, 2002
    Publication date: November 28, 2002
    Inventors: Vaidyanathan Kripesh, Mahadevan K. Iyer, Thiam Beng Lim