Patents by Inventor Vamsi Pavan Rayaprolu

Vamsi Pavan Rayaprolu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190278491
    Abstract: Data to store at a storage system is received. The storage system includes data blocks and the plurality of blocks that include a first region corresponding to a first storage density and a second region corresponding to a second storage density that is less dense than the first storage density. The data is stored at the first region of the plurality of data blocks that corresponds to the first storage density. A write attribute related to storing the data at the first region of the plurality of data blocks is determined. Thereupon, the write attribute related to storing the data at the first region is stored in the second region of the plurality of data blocks that corresponds to the second storage density.
    Type: Application
    Filed: March 6, 2018
    Publication date: September 12, 2019
    Inventors: Vamsi Pavan Rayaprolu, Sampath K. Ratnam, Kishore Kumar Muchherla, Harish R. Singidi, Ashutosh Malshe, Gianni S. Alsasua
  • Publication number: 20190278653
    Abstract: A system configured to determine that a trigger condition has occurred that is related to an operation performed on a memory device of the system. Responsive to determining that the trigger condition has occurred, reordering error handling mechanisms of an error handling sequence based upon an error handling mechanism performance metric. Each error handling mechanism specifies operations to be performed to recover an error in the operation on the memory device.
    Type: Application
    Filed: March 7, 2018
    Publication date: September 12, 2019
    Inventors: Renato Padilla, JR., Gary F. Besinga, Harish Singidi, Gianni Stephen Alsasua, Ashutosh Malshe, Kishore Kumar Muchherla, Vamsi Pavan Rayaprolu, Sampath Ratnam
  • Publication number: 20190278510
    Abstract: A temperature related to a memory device is identified. It is determined whether the temperature related to the memory device satisfies a threshold temperature condition. Responsive to detecting that the temperature related to the memory device satisfies the threshold temperature condition, a parameter for a programming operation is adjusted from a first value to a second value to store data at the memory device.
    Type: Application
    Filed: March 6, 2018
    Publication date: September 12, 2019
    Inventors: Mustafa N. Kaynak, Sampath K. Ratnam, Zixiang Loh, Nagendra Prasad Ganesh Rao, Larry J. Koudele, Vamsi Pavan Rayaprolu, Patrick R. Khayat, Shane Nowell
  • Patent number: 10403378
    Abstract: A temperature associated with the memory component is determined. A frequency to perform an operation on a memory cell associated with the memory component is determined based on the temperature associated with the memory component. The operation is performed on the memory cell at the determined frequency to transition the memory cell from a state associated with an increased error rate for data stored at the memory cell to another state associated with a decreased error rate for the data stored at the memory cell.
    Type: Grant
    Filed: May 29, 2018
    Date of Patent: September 3, 2019
    Assignee: MICRON TECHNOLOGY, INC.
    Inventors: Sampath K. Ratnam, Vamsi Pavan Rayaprolu, Mustafa N. Kaynak, Peter Feeley, Kishore Kumar Muchherla, Renato C. Padilla, Shane Nowell
  • Publication number: 20190250843
    Abstract: At least one data of a set of data stored at a memory cell of a memory component is determined to be associated with an unsuccessful error correction operation. A determination is made as to whether a programming operation associated with the set of data stored at the memory cell has completed. The at least one data of the set of data stored at the memory cell that is associated with the unsuccessful error correction operation is recovered in response to determining that the programming operation has completed. Another memory cell of the memory component is identified in response to recovering the at least one data of the set of data stored at the memory cell that is associated with the unsuccessful error correction operation. The set of data including the recovered at least one data is provided to the other memory cell of the memory component.
    Type: Application
    Filed: August 10, 2018
    Publication date: August 15, 2019
    Inventors: Sampath K. Ratnam, Vamsi Pavan Rayaprolu, Mustafa N. Kaynak, Sivagnanam Parthasarathy, Kishore Kumar Muchherla, Shane Nowell, Peter Feeley, Qisong Lin
  • Publication number: 20190252028
    Abstract: A temperature associated with the memory component is determined. A frequency to perform an operation on a memory cell associated with the memory component is determined based on the temperature associated with the memory component. The operation is performed on the memory cell at the determined frequency to transition the memory cell from a state associated with an increased error rate for data stored at the memory cell to another state associated with a decreased error rate for the data stored at the memory cell.
    Type: Application
    Filed: May 29, 2018
    Publication date: August 15, 2019
    Inventors: Sampath K. Ratnam, Vamsi Pavan Rayaprolu, Mustafa N. Kaynak, Peter Feeley, Kishore Kumar Muchherla, Renato C. Padilla, Shane Nowell
  • Publication number: 20190243707
    Abstract: A determination can be made that an error control operation associated with user data has failed. An initial operating characteristic associated with the error control operation that failed can be identified. A complementary operating characteristic to replace the operating characteristic associated with the error control operation that failed can be determined. The error control operation for the user data can be performed based on the complementary operating characteristic.
    Type: Application
    Filed: October 18, 2018
    Publication date: August 8, 2019
    Inventors: Vamsi Pavan Rayaprolu, Sivagnanam Parthasarathy, Sampath K. Ratnam, Shane Nowell, Renato C. Padilla
  • Publication number: 20190243704
    Abstract: A number of operations that have been performed on one or more memory cells that are proximate to a particular memory cell of the memory component can be identified. A determination as to whether the particular memory cell has transitioned from a state associated with a decreased error rate to another state associated with an increased error rate can be made based on the identified number of operations. In response to determining that the particular memory cell has transitioned from the state associated with the decreased error rate to the another state associated with the increased error rate, an operation can be performed on the particular memory cell to transition the particular memory cell from the another state associated with the increased error rate to the state associated with the decreased error rate.
    Type: Application
    Filed: July 25, 2018
    Publication date: August 8, 2019
    Inventors: Kishore Kumar Muchherla, Vamsi Pavan Rayaprolu, Peter Feeley, Sampath K. Ratnam, Sivagnanam Parthasarathy, Qisong Lin, Shane Nowell, Mustafa N. Kaynak
  • Patent number: 10365854
    Abstract: A variety of applications can include apparatus and/or methods that include tracking data temperatures of logical block addresses for a memory device by operating multiple accumulators by one or more data temperature analyzers to count host writes to ranges of logical block addresses. Data temperature for data written by a host is a measure of how frequently data at a logical block address is overwritten. In various embodiments, tracking can include staggering the start of counting by each of the multiple accumulators to provide subsequent binning of logical block addresses bands into temperature zones, which can achieve better data segregation. Data having a logical block address received from a host can be routed to a block associated with a temperature zone based on the binning provided by the staggered operation of the multiple accumulators by one or more data temperature analyzers. Additional apparatus, systems, and methods are disclosed.
    Type: Grant
    Filed: March 19, 2018
    Date of Patent: July 30, 2019
    Assignee: Micron Technology, Inc.
    Inventors: Kishore Kumar Muchherla, Peter Sean Feeley, Ashutosh Malshe, Sampath Ratnam, Harish Singidi, Vamsi Pavan Rayaprolu