Abstract: The present disclosure relates to a device comprising a first transistor and a first circuit comprising first and second terminals, the first circuit being configured to generate a first voltage representing the temperature of the first transistor, a first terminal of the first circuit being coupled to the drain of the first transistor.

Abstract: In accordance with an embodiment, a variable gain amplifier includes: a first differential transistor pair coupled to a signal input; a first current source configured to provide a first bias current to the first differential transistor pair; a pair of diodes coupled to an output of the first differential transistor pair; a second differential transistor pair having an input coupled to the pair of diodes; a second current source configured to provide a second bias current to the second differential transistor pair; and a current control circuit coupled to the first current source and the second current source.

Abstract: The present disclosure relates to a device comprising a first transistor and a first circuit comprising first and second terminals, the first circuit being configured to generate a first voltage representing the temperature of the first transistor, a first terminal of the first circuit being coupled to the drain of the first transistor.

Abstract: A high-side switch has a current flow path between a high-side reference and a switching node, and a low-side switch has a current flow path between the switching node and a low-side reference. The high-side switch is conductive during a first time interval and the low-side switch is conductive during a second time interval. An inductive element is coupled between the switching node and an output node. A switching voltage is sensed and filtered to provide a filtered voltage indicative of an output voltage at the output node. Based on a difference between the filtered voltage and the sensed switching voltage, an output current signal is generated that is indicative of an intensity of a current flowing through the inductive load during an estimation time equal to or greater than the first time interval.

Abstract: A switching regulator circuit has a switching transistor actuated during a switching on phase of a duty cycle. The current flowing through an inductor of the switching regulator circuit is determined from sensing a transistor current flowing through the switching transistor during switching on phase and selectively charging a capacitor of a switched capacitor circuit dependent on a current sense signal during the switching on phase.

Abstract: Embodiments are directed to electronic fuse devices and systems. One such electronic fuse includes current sensing circuitry that senses a current in a conductor coupled between a power supply and a load, and generates a current sensing signal indicative of the sensed current. I2t circuitry receives the current sensing signal and determines whether the sensed current exceeds an I2t curve of the conductor. The electronic fuse further includes at least one of external MOSFET temperature sensing circuitry that senses a temperature of an external MOSFET coupled to the conductor, low current bypass circuitry that supplies a reduced current to the load in a low power consumption mode during which the external MOSFET is in a non-conductive state, or desaturation sensing circuitry that senses a drain-source voltage of the external MOSFET.

Abstract: An HS switching transistor is coupled between a high-side node and a switching node. An LS switching transistor is coupled between the switching node and a low-side node. An inductive load is coupled to the switching node in a way where one of the HS/LS switching transistors is freewheeling. In response to detection of a short circuit occurring at the switching node with the freewheeling switching transistor in the conductive state: an electrical signal at the switching node is sensed, a comparison is made between the sensed electrical signal and a threshold level, and a driving signal is provided to control freewheeling switching transistor to switch to the non-conductive state when the comparison indicates that the electrical signal has reached the threshold level.

Abstract: A pulse generator circuit includes: an LC resonant circuit coupled between a first node and a reference node; a first switch coupled between the first node and the reference node; a switching network comprising a second switch coupled between the first node and a respective drive node; and drive circuit having outputs coupled to the first switch and to the second switch of the switching network. The drive circuit is configured to, in repeating cycles: close the first switch so that a current flowing through an inductor of the LC resonant circuit increases during a resonant cycle, when the current flowing through the inductor reaches a threshold value, open the first switch, close the second switch of the switching network for a pulse duration time when the first switch is open, and open the second switch at an expiration of the pulse duration time.

Abstract: Provided is an analog to digital converter configured to receive a continuous input signal. The analog to digital converter includes an integrating block, comprising at least an integrating stage, which output is coupled to a flash analog to digital converter. The analog to digital converter apparatus includes a feedback path coupled to the output of said flash analog to digital converter. The feedback path includes at least a digital to analog conversion block which output is compared at least to the input signal to obtain an error signal which is brought as input to said integrating block. A control block is configured to perform control comprising at least a digital integration, is coupled between the output of said flash analog to digital converter and said feedback path.

Abstract: In embodiments, a capacitance is coupled to a source of electrical charge via a drain to source current flow path through a field-effect transistor. The capacitance is pre-charged by making the field-effect transistor selectively conductive in response to the gate-source voltage of the field-effect transistor exceeding a threshold. The difference between the gate-source voltage of the field-effect transistor and the threshold provides an overdrive value of the field-effect transistor. The gate of the field-effect transistor is driven with a variable gate-source voltage having as a target maintaining a constant overdrive value. Electrical charge is controllably transferred from the source to the capacitance via the drain to source current flow path through the field-effect transistor avoiding undesirably high inrush currents.

Abstract: A system and method for measuring a capacitance value of a capacitor are provided. In embodiments, a resistor is coupled to a terminal of the capacitor. A difference in voltage at the terminal between a first time and a second time during a discharge routine of the capacitor is measured. The discharge routine includes sinking a current through a discharge circuit coupled to the resistor from first to second. Integration of a difference in voltage at terminals of the resistor during the discharge routine between the first and second times is also measured. The capacitance value is computed based on the measured difference in voltage, the measured integration, and the resistance value of the resistor. The health of the capacitor is determined based on a difference between the computed capacitance value and a threshold value.

Abstract: In accordance with an embodiment, an ultrasound transmitter device includes a transformer comprising a secondary winding configured to be coupled to a piezoelectric transducer; a plurality of transistors coupled to the primary winding of the transformer and to a ground terminal via a sense resistor; an amplifier having an output coupled to control nodes of the plurality of transistors, a first input coupled to the sense resistor, and second input coupled to a reference resistor; a switching circuit configured to alternately couple control nodes of the plurality of transistors to an output of amplifier and to a reference node via complementary pulse signals, wherein the switching circuit is configured to turn on and turn off the plurality of transistors and operate the plurality of transistors in a push-pull manner; and a digital-to-analog converter having an output coupled to the reference resistor.

Abstract: In an embodiment, a phase circuit includes: a bidirectional output stage configured to be coupled between a first battery and a second battery; a memory configured to store a number of active phases, and an identifier; and a synchronization circuit configured to receive a first clock signal and determine a start time of a switching cycle of the bidirectional output stage based on the number of active phases, the identifier, and the first clock signal, where the phase circuit is configured to control the timing of the switching of the bidirectional output stage based on the start time.

Abstract: A circuit for decoding a pulse width modulated (PWM) signal generates an output signal switching between a first and second logic values as a function of a duty-cycle of the PWM signal. Current generating circuitry receives the PWM signal and injects a current to and sinks a current from an intermediate node as a function of the values of the PWM signal. A capacitor coupled to the intermediate node is alternatively charged and discharged by the injected and sunk currents, respectively, to generate a voltage. A comparator circuit coupled to the intermediate node compares the generated voltage to a comparison voltage and drives the logic values of the output signal as a function of the comparison.

Abstract: In a driver circuit couplable to laser diodes, a semiconductor body has a first surface. First and second control switches have drains coupled to a drain metallization, which is couplable to a power supply line, and sources coupled to respective first and second source metallizations, which are couplable to cathode terminals of the laser diodes and a reference node. A plurality of high-side switches have drains coupled to the drain metallization and sources coupled to third source metallizations, each of which is coupled to a respective drive output node for driving an anode terminal of a respective laser diode. The drain, first, second and third source metallizations face the first surface of the semiconductor body, which faces the laser diodes. The second and third source metallizations are aligned with one another and are superimposed to the respective source terminals of the second control switch and high-side switches.

Abstract: A circuit for decoding a pulse width modulated (PWM) signal generates an output signal switching between a first and second logic values as a function of a duty-cycle of the PWM signal. Current generating circuitry receives the PWM signal and injects a current to and sinks a current from an intermediate node as a function of the values of the PWM signal. A capacitor coupled to the intermediate node is alternatively charged and discharged by the injected and sunk currents, respectively, to generate a voltage. A comparator circuit coupled to the intermediate node compares the generated voltage to a comparison voltage and drives the logic values of the output signal as a function of the comparison.

Abstract: A circuit for use, e.g., as current sense amplifier in a DC-DC converter in a hybrid vehicle includes a first input node and a second input node, configured to have an input voltage signal applied therebetween, a floating-ground input stage configured to operate between a first supply voltage and a second non-zero supply voltage and to convert into a current signal the input voltage signal applied between the first input node and the second input node. The circuit includes an output stage configured to receive the current signal from the floating-ground input stage and to convert the current signal back to an output voltage signal referred to ground. The output voltage referred to ground is a replica of the input voltage signal applied between the first input node and the second input node.

Abstract: Provided is a circuit including a switching transistor having a control terminal configured to receive a control signal and having a current flow path therethrough. The switching transistor becomes conductive in response to the control signal having a first value. The current flow path through the switching transistor provides a current flow line between two nodes. In a non-conductive state, a voltage drop stress is across the switching transistor. The circuit comprises a sense transistor that is coupled to and a scaled replica of the switching transistor. The sense transistor has a sense current therethrough. The sense current is indicative of the current of the switching transistor. The circuit includes coupling circuitry configured to apply the voltage drop stress across the sense transistor in response to the switching transistor being non-conductive. In the non-conductive state, the voltage drop stress is replicated across both the switching transistor and the sense transistor.

Abstract: A method of operating a control device includes performing an open load test or a current leakage test. The open load test includes activating a first current and then a second current and sensing with the first current and the second current activated, respectively, a first voltage drop and a second voltage drop between charge distribution pins and charge sensing pins of the control device. Respective differences are calculated between the first voltage drop and the second voltage drop sensed with the first current and the second current activated, respectively. These differences are compared with respective thresholds and an open circuit condition is declared as a result of the differences calculated reaching these thresholds.

Abstract: An embodiment pulse generator circuit comprises a first electronic switch coupled between first and second nodes, and a second electronic switch coupled between the second node and a reference node. An LC resonant circuit comprising an inductance and a capacitance is coupled between the first and reference nodes along with charge circuitry comprises a further inductance in a current flow line between a supply node and an intermediate node in the LC resonant circuit. Drive circuitry of the electronic switches repeats, during a sequence of switching cycles, charge time intervals, wherein the capacitance in the LC resonant circuit is charged via the charge circuit, and pulse generation time intervals, wherein a pulsed current is provided to the load via the first and second nodes. The charge and pulse generation time intervals are interleaved with oscillation time intervals where the LC resonant circuit oscillates at a resonance frequency.