Patents by Inventor VARUN MISHRA

VARUN MISHRA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210398977
    Abstract: Integrated circuitry comprising interconnect metallization on both front and back sides of a gate-all-around (GAA) transistor structure lacking at least one active bottom channel region. Bottom channel regions may be depopulated from a GAA transistor structure following removal of a back side substrate that exposes an inactive portion of a semiconductor fin. During back-side processing, one or more bottom channel region may be removed or rendered inactive through dopant implantation. Back-side processing may then proceed with the interconnection of one or more terminal of the GAA transistor structures through one or more levels of back-side interconnect metallization.
    Type: Application
    Filed: June 18, 2020
    Publication date: December 23, 2021
    Applicant: Intel Corporation
    Inventors: Varun Mishra, Peng Zheng, Aaron Lilak, Tahir Ghani, Harold Kennel, Mauro Kobrinsky
  • Publication number: 20210305388
    Abstract: Gate-all-around integrated circuit structures having an insulator fin on an insulator substrate, and methods of fabricating gate-all-around integrated circuit structures having an insulator fin on an insulator substrate, are described. For example, an integrated circuit structure includes an insulator fin on an insulator substrate. A vertical arrangement of horizontal semiconductor nanowires is over the insulator fin. A gate stack surrounds a channel region of the vertical arrangement of horizontal semiconductor nanowires, and the gate stack is overlying the insulator fin. A pair of epitaxial source or drain structures is at first and second ends of the vertical arrangement of horizontal semiconductor nanowires and at first and second ends of the insulator fin.
    Type: Application
    Filed: March 27, 2020
    Publication date: September 30, 2021
    Inventors: Aaron D. LILAK, Rishabh MEHANDRU, Cory WEBER, Willy RACHMADY, Varun MISHRA
  • Publication number: 20210296323
    Abstract: Embodiments disclosed herein include transistor devices with depopulated channels. In an embodiment, the transistor device comprises a source region, a drain region, and a vertical stack of semiconductor channels between the source region and the drain region. In an embodiment, the vertical stack of semiconductor channels comprises first semiconductor channels, and a second semiconductor channel over the first semiconductor channels. In an embodiment, first concentrations of a dopant in the first semiconductor channels are less than a second concentration of the dopant in the second semiconductor channel.
    Type: Application
    Filed: March 23, 2020
    Publication date: September 23, 2021
    Inventors: Peng ZHENG, Varun MISHRA, Tahir GHANI
  • Publication number: 20160103963
    Abstract: Embodiments of the present invention disclose an improved method for smart healthcare management.
    Type: Application
    Filed: October 14, 2015
    Publication date: April 14, 2016
    Inventor: VARUN MISHRA