Patents by Inventor Vasile Paraschiv

Vasile Paraschiv has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11960505
    Abstract: A database export system exports data using a plurality of nodes that process the data to generate structured result files that are partitioned by an export parameter in an export request. The database export system distributes the data and merges the files to avoid small file creation and increase processing speed via parallelism. The database export system generates the result files of a specified maximum size in a final format, where the files are processed merged in a temporary file format. The parallel processing is optimized and constrained per the amount of processing nodes, available memory, requested final file sizes, and operation based ordering to complete data exports in a scalable multi-stage approach.
    Type: Grant
    Filed: May 19, 2022
    Date of Patent: April 16, 2024
    Assignee: Snowflake Inc.
    Inventors: Vasile Paraschiv, Saurin Shah, Marianne Shaw, Nileema Shingte
  • Publication number: 20220277024
    Abstract: A database export system exports data using a plurality of nodes that process the data to generate structured result files that are partitioned by an export parameter in an export request. The database export system distributes the data and merges the files to avoid small file creation and increase processing speed via parallelism. The database export system generates the result files of a specified maximum size in a final format, where the files are processed merged in a temporary file format. The parallel processing is optimized and constrained per the amount of processing nodes, available memory, requested final file sizes, and operation based ordering to complete data exports in a scalable multi-stage approach.
    Type: Application
    Filed: May 19, 2022
    Publication date: September 1, 2022
    Inventors: Vasile Paraschiv, Saurin Shah, Marianne Shaw, Nileeman Shingte
  • Patent number: 11354331
    Abstract: A database export system exports data using a plurality of nodes that process the data to generate structured result files that are partitioned by an export parameter in an export request. The database export system distributes the data and merges the files to avoid small file creation and increase processing speed via parallelism. The database export system generates the result files of a specified maximum size in a final format, where the files are processed merged in a temporary file format. The parallel processing is optimized and constrained per the amount of processing nodes, available memory, requested final file sizes, and operation based ordering to complete data exports in a scalable multi-stage approach.
    Type: Grant
    Filed: October 30, 2020
    Date of Patent: June 7, 2022
    Assignee: Snowflake Inc.
    Inventors: Vasile Paraschiv, Saurin Shah, Marianne Shaw, Nileema Shingte
  • Patent number: 11347775
    Abstract: A database export system exports data using a plurality of nodes that process the data to generate structured result files that are partitioned by an export parameter in an export request. The database export system distributes the data and merges the files to avoid small file creation and increase processing speed via parallelism. The database export system generates the result files of a specified maximum size in a final format, where the files are processed merged in a temporary file format. The parallel processing is optimized and constrained per the amount of processing nodes, available memory, requested final file sizes, and operation based ordering to complete data exports in a scalable multi-stage approach.
    Type: Grant
    Filed: August 31, 2021
    Date of Patent: May 31, 2022
    Assignee: Snowflake Inc.
    Inventors: Vasile Paraschiv, Saurin Shah, Marianne Shaw, Nileema Shingte
  • Publication number: 20220121673
    Abstract: A database export system exports data using a plurality of nodes that process the data to generate structured result files that are partitioned by an export parameter in an export request. The database export system distributes the data and merges the files to avoid small file creation and increase processing speed via parallelism. The database export system generates the result files of a specified maximum size in a final format, where the files are processed merged in a temporary file format. The parallel processing is optimized and constrained per the amount of processing nodes, available memory, requested final file sizes, and operation based ordering to complete data exports in a scalable multi-stage approach.
    Type: Application
    Filed: October 30, 2020
    Publication date: April 21, 2022
    Inventors: Vasile Paraschiv, Saurin Shah, Marianne Shaw, Nileema Shingte
  • Publication number: 20220121683
    Abstract: A database export system exports data using a plurality of nodes that process the data to generate structured result files that are partitioned by an export parameter in an export request. The database export system distributes the data and merges the files to avoid small file creation and increase processing speed via parallelism. The database export system generates the result files of a specified maximum size in a final format, where the files are processed merged in a temporary file format. The parallel processing is optimized and constrained per the amount of processing nodes, available memory, requested final file sizes, and operation based ordering to complete data exports in a scalable multi-stage approach.
    Type: Application
    Filed: August 31, 2021
    Publication date: April 21, 2022
    Inventors: Vasile Paraschiv, Saurin Shah, Marianne Shaw, Nileema Shingte
  • Patent number: 11138232
    Abstract: A database export system exports data using a plurality of nodes that process the data to generate structured result files that are partitioned by an export parameter in an export request. The database export system distributes the data and merges the files to avoid small file creation and increase processing speed via parallelism. The database export system generates the result files of a specified maximum size in a final format, where the files are processed merged in a temporary file format. The parallel processing is optimized and constrained per the amount of processing nodes, available memory, requested final file sizes, and operation based ordering to complete data exports in a scalable multi-stage approach.
    Type: Grant
    Filed: October 30, 2020
    Date of Patent: October 5, 2021
    Assignee: Snowflake Inc.
    Inventors: Vasile Paraschiv, Saurin Shah, Marianne Shaw, Nileema Shingte
  • Patent number: 11036717
    Abstract: A computer-navigable trie structure used in order to represent predicates for matching foreign keys to primary rows in a primary table. The predicates may be wide ranging, and each may be represented by a corresponding descendant path of the trie structure, and defines which foreign keys are to be mapped to the particular row. The trie structure is built by incrementally augmenting the trie structure as each predicate is analyzed. During later use of the trie structure, each foreign key that is a candidate for mapping to one or more parent rows are evaluated. The foreign key is used to navigate through a set of one or more descendant paths of the computer-navigable trie structure. Matching parent rows may then be identified based on the identity of the navigated descendant paths. The foreign key may then be mapped to each of the one or more matching parent rows.
    Type: Grant
    Filed: May 7, 2018
    Date of Patent: June 15, 2021
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
    Inventors: Cristian Petculescu, Marius Dumitru, Vasile Paraschiv, Amir Netz
  • Patent number: 10957793
    Abstract: The disclosed technology generally relates to semiconductor fabrication, and more particularly to a method of forming a target layer surrounding a vertical nanostructure. In one aspect, a method includes providing a substrate having a substrate surface. The method additionally includes forming a vertical nanostructure extending outwardly from a substrate surface. The vertical nanostructure has a sidewall surface, where the sidewall surface has an upper portion and a lower portion. The method additionally includes forming a target layer at least along the sidewall surface of the vertical nanostructure and on the substrate surface. The method additionally includes forming a protection layer covering the target layer and removing an upper portion of the protection layer, thereby exposing the target layer along the upper portion of the sidewall surface of the vertical nanostructure.
    Type: Grant
    Filed: September 11, 2018
    Date of Patent: March 23, 2021
    Assignee: IMEC vzw
    Inventors: Vasile Paraschiv, Guglielma Vecchio, Anabela Veloso
  • Patent number: 10825682
    Abstract: A method for producing a pillar structure in a semiconductor layer, the method including providing a structure including, on a main surface, a semiconductor layer. A patterned hard mask layer stack is provided on the semiconductor layer that includes a first layer in contact with the semiconductor layer and a second layer overlying and in contact with the first layer. The semiconductor layer is etched using the patterned hard mask layer stack as a mask. The etching includes subjecting the structure to a first plasma thereby removing a first part of the semiconductor layer and at least a part of the second layer while preserving the first layer thereby, producing a first part of the pillar structure, thereafter; and subjecting the structure to a second plasma thereby removing a second part of the semiconductor layer thereby, producing a second part of the pillar structure.
    Type: Grant
    Filed: September 7, 2016
    Date of Patent: November 3, 2020
    Assignee: IMEC VZW
    Inventors: Boon Teik Chan, Vasile Paraschiv, Efrain Altamirano Sanchez, Zheng Tao
  • Patent number: 10635673
    Abstract: Linking of a child table to a parent table in a database system. For a given parent table row, an expression associated with the particular row is identified. The expression may be a semantic expression that comprises something different than or more than an equals expression or a contains expression. The expression might also take as input a field of the parent table other than the primary key of the parent table. For each of multiple (and potentially all) rows of a child table, the expression is evaluated against a foreign key of the corresponding row of the child table. If the foreign key matches the expression, an association is created, and perhaps saved, between the foreign key and the particular row of the parent table. The expressions may differ even down to the granularity of a single row in the parent table, thereby enabling perhaps custom per-row expressions.
    Type: Grant
    Filed: February 14, 2018
    Date of Patent: April 28, 2020
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
    Inventors: Cristian Petculescu, Marius Dumitru, Vasile Paraschiv, Amir Netz, Paul Jonathon Sanders
  • Publication number: 20190097047
    Abstract: The disclosed technology generally relates to semiconductor fabrication, and more particularly to a method of forming a target layer surrounding a vertical nanostructure. In one aspect, a method includes providing a substrate having a substrate surface. The method additionally includes forming a vertical nanostructure extending outwardly from a substrate surface. The vertical nanostructure has a sidewall surface, where the sidewall surface has an upper portion and a lower portion. The method additionally includes forming a target layer at least along the sidewall surface of the vertical nanostructure and on the substrate surface. The method additionally includes forming a protection layer covering the target layer and removing an upper portion of the protection layer, thereby exposing the target layer along the upper portion of the sidewall surface of the vertical nanostructure.
    Type: Application
    Filed: September 11, 2018
    Publication date: March 28, 2019
    Inventors: Vasile Paraschiv, Guglielma Vecchio, Anabela Veloso
  • Publication number: 20180253466
    Abstract: A computer-navigable trie structure used in order to represent predicates for matching foreign keys to primary rows in a primary table. The predicates may be wide ranging, and each may be represented by a corresponding descendant path of the trie structure, and defines which foreign keys are to be mapped to the particular row. The trie structure is built by incrementally augmenting the trie structure as each predicate is analyzed. During later use of the trie structure, each foreign key that is a candidate for mapping to one or more parent rows are evaluated. The foreign key is used to navigate through a set of one or more descendant paths of the computer-navigable trie structure. Matching parent rows may then be identified based on the identity of the navigated descendant paths. The foreign key may then be mapped to each of the one or more matching parent rows.
    Type: Application
    Filed: May 7, 2018
    Publication date: September 6, 2018
    Inventors: Cristian Petculescu, Marius Dumitru, Vasile Paraschiv, Amir Netz
  • Publication number: 20180173766
    Abstract: Linking of a child table to a parent table in a database system. For a given parent table row, an expression associated with the particular row is identified. The expression may be a semantic expression that comprises something different than or more than an equals expression or a contains expression. The expression might also take as input a field of the parent table other than the primary key of the parent table. For each of multiple (and potentially all) rows of a child table, the expression is evaluated against a foreign key of the corresponding row of the child table. If the foreign key matches the expression, an association is created, and perhaps saved, between the foreign key and the particular row of the parent table. The expressions may differ even down to the granularity of a single row in the parent table, thereby enabling perhaps custom per-row expressions.
    Type: Application
    Filed: February 14, 2018
    Publication date: June 21, 2018
    Inventors: Cristian Petculescu, Marius Dumitru, Vasile Paraschiv, Amir Netz, Paul Jonathon Sanders
  • Patent number: 9977812
    Abstract: A computer-navigable trie structure used in order to represent predicates for matching foreign keys to primary rows in a primary table. The predicates may be wide ranging, and each may be represented by a corresponding descendant path of the trie structure, and defines which foreign keys are to be mapped to the particular row. The trie structure is built by incrementally augmenting the trie structure as each predicate is analyzed. During later use of the trie structure, each foreign key that is a candidate for mapping to one or more parent rows are evaluated. The foreign key is used to navigate through a set of one or more descendant paths of the computer-navigable trie structure. Matching parent rows may then be identified based on the identity of the navigated descendant paths. The foreign key may then be mapped to each of the one or more matching parent rows.
    Type: Grant
    Filed: January 30, 2015
    Date of Patent: May 22, 2018
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Cristian Petculescu, Marius Dumitru, Vasile Paraschiv, Amir Netz
  • Patent number: 9916357
    Abstract: Linking of a child table to a parent table in a database system. For a given parent table row, an expression associated with the particular row is identified. The expression may be a semantic expression that comprises something different than or more than an equals expression or a contains expression. The expression might also take as input a field of the parent table other than the primary key of the parent table. For each of multiple (and potentially all) rows of a child table, the expression is evaluated against a foreign key of the corresponding row of the child table. If the foreign key matches the expression, an association is created, and perhaps saved, between the foreign key and the particular row of the parent table. The expressions may differ even down to the granularity of a single row in the parent table, thereby enabling perhaps custom per-row expressions.
    Type: Grant
    Filed: June 27, 2014
    Date of Patent: March 13, 2018
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Cristian Petculescu, Marius Dumitru, Vasile Paraschiv, Amir Netz, Paul Jonathon Sanders
  • Patent number: 9892143
    Abstract: The creation and updating of an association index that defines a linking between a child table and a parent table in a database system, and in which each of at least some of the parent table rows have an associated expression defining rules for mapping child table rows to the associated parent table row. The association index may be constructed with one pass of the parent table by evaluating the mapping definition to identifying associated child table rows. If there are such associations for a given parent table row, the linking module may record that association in an association index. If there are changes made that potentially invalidate an association status (whether an association or lack thereof), a re-evaluation module then determines which mapping definitions for which parent rows need to be re-evaluated, and potentially for which child table rows, rather than perform the entire process again.
    Type: Grant
    Filed: February 4, 2015
    Date of Patent: February 13, 2018
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Cristian Petculescu, Marius Dumitru, Vasile Paraschiv, Amir Netz
  • Publication number: 20170103889
    Abstract: A method for producing a pillar structure in a semiconductor layer, the method including providing a structure including, on a main surface, a semiconductor layer. A patterned hard mask layer stack is provided on the semiconductor layer that includes a first layer in contact with the semiconductor layer and a second layer overlying and in contact with the first layer. The semiconductor layer is etched using the patterned hard mask layer stack as a mask. The etching includes subjecting the structure to a first plasma thereby removing a first part of the semiconductor layer and at least a part of the second layer while preserving the first layer thereby, producing a first part of the pillar structure, thereafter; and subjecting the structure to a second plasma thereby removing a second part of the semiconductor layer thereby, producing a second part of the pillar structure.
    Type: Application
    Filed: September 7, 2016
    Publication date: April 13, 2017
    Applicant: IMEC VZW
    Inventors: Boon Teik Chan, Vasile Paraschiv, Efrain Altamirano Sanchez, Zheng Tao
  • Patent number: 9535983
    Abstract: Storing text samples in a manner that the text samples may be quickly searched. The text samples are assigned a text sample identifier and are each parsed to thereby extract text components from the text samples. Text components that have the same content are assigned the same text component identifier. For each parsed text component, a text component entry is created that includes the assigned text component identifier as well as the text sample identifier for the text sample from which the text component was parsed. A text sample entry group is created for each text sample that contains the text component entries in sequence for the text components found within the text sample. The text sample entry groups are stored so as to be scannable during a future search.
    Type: Grant
    Filed: October 29, 2013
    Date of Patent: January 3, 2017
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Cristian Petculescu, Marius Dumitru, Vasile Paraschiv, Amir Netz, Paul Jonathon Sanders
  • Patent number: 9502264
    Abstract: A method for removing oxide selective to a material comprising at least silicon and at least nitrogen is disclosed, the method comprising providing in a reactor a structure having a surface comprising a region, wherein said region comprises a material comprising at least silicon and at least nitrogen, providing on said structure an oxide layer overlying at least a part of said region, and removing said oxide layer selective to said material by etching, thereby exposing at least a part of said at least overlaid part of said region, wherein said etching is done only by providing an etchant gas comprising boron, whereby a voltage bias lower than 30 V is applied to the structure.
    Type: Grant
    Filed: August 17, 2015
    Date of Patent: November 22, 2016
    Assignee: IMEC VZW
    Inventors: Eddy Kunnen, Vasile Paraschiv