Abstract: A communications system has a low power connectivity processor and a high performance applications processor. The low power connectivity processor is coupled to a low power front end for wireless packets and the high performance applications processor is coupled to a high performance front end. A power controller is coupled to the low power front end and enables the applications processor and high performance front end when wireless packets which require greater processing capacity are received, and removes power from the applications processor and high performance front end at other times.

Abstract: A multi-thread processor has a canonical thread map register which outputs a sequence of thread_id values indicating a current thread for execution. The thread map register is programmable to provide granularity of number of cycles of the canonical sequence assigned to each thread. In one example of the invention, the thread map register has repeating thread identifiers in a sequential or non-sequential manner to overcome memory latency and avoid thread stalls. In another example of the invention, separate interrupt tasks are placed on each thread to reduce interrupt processing latency.

Abstract: An apparatus and method for encrypting messages from a first node splits the message into a plurality of message units, each of which is encrypted. The encrypted message units are split into path units, each of which is directed to a different route path to a destination node. At the destination node, the path units are received and reassembled into encrypted message units, which are decrypted into message fragments and concatenated to form a message corresponding to the original one sent.

Abstract: The present invention provides an analog-digital hybrid architecture, which performs 256 multiplications and additions at a time. The system comprises 256 Processing Elements (PE) (108), which are arranged in a matrix form (16 rows and 16 columns). The digital inputs (110) are converted to analog signal (114) using digital to analog converters (DAC) (102). One PE (108) produces one analog output (115) which is nothing but the multiplication of the analog input (114) and the digital weight input (112). The implementation of PE is done by using i) capacitors and switches and ii) resistor and switches. The outputs from multiple PEs (108) in a column are connected together to produce one analog MAC output (116). In the similar manner, the system produces 16 MAC outputs (118) corresponding to 16 columns. Analog to digital converters (ADC) (104) are used to convert the analog MAC output (116) to digital form (118).

Abstract: A mesh receiver has a wakeup receiver for reception of a wakeup sequence formed by keyed RF or a sequence of wireless packets and gaps, a transmitter forming low speed RF wakeup sequence to other mesh stations, a mesh receiver for reception of high speed WLAN packets, the transmitter sending a wireless ACK packet in response to a wakeup sequence, the mesh receiver thereafter receiving wireless packets from a remote station, the mesh transmitter sending an ACK, the mesh station thereafter identifying a next hop station, and sending a wakeup sequence to that station, after receipt of an ACK, sending the data, the mesh receiver and mesh transmitter thereafter going to sleep.

Abstract: A wireless receiver powers up shortly before the expected arrival of a beacon frame, and upon detection of a beacon frame from an access point the station is associated with and determination of subsequent fields of interest, including at least a TIM field, the receiver powers down. At the previously identified fields of interest, the receiver powers up and uses previously stored values to continue packet demodulation, thereafter examining the TIM field to determine whether the AP has packets to transmit to the station.

Abstract: A mesh receiver has a wakeup receiver for reception of a wakeup sequence formed by keyed RF or a sequence of wireless packets and gaps, a transmitter forming low speed RF wakeup sequence to other mesh stations, a mesh receiver for reception of high speed WLAN packets, the transmitter sending a wireless ACK packet in response to a wakeup sequence, the mesh receiver thereafter receiving wireless packets from a remote station, the mesh transmitter sending an ACK, the mesh station thereafter identifying a next hop station, and sending a wakeup sequence to that station, after receipt of an ACK, sending the data, the mesh receiver and mesh transmitter thereafter going to sleep.

Abstract: An Internet of Things (IoT) device has a public device identifier and a private device identifier, where the public device identifier is publicly available and the private device identifier is secret but kept in a secure device database as a tuple. A registration request containing encrypted credentials comprising at least a private identifier and optionally a public identifier is sent from the IoT device to an association server in communication with a device database having an association between IoT public identifier and a corresponding IoT private identifier. The association server which receives the registration request and encrypted credentials responds with a registration acknowledgement when the decrypted credentials match the tuple in the device database, or forwards the request to a registration server when it does not. The requesting IoT device receives an acknowledgement and is thereafter able to join the wireless network.

Abstract: A transmit/receive signal processor for Wireless Local Area Network (WLAN) and Bluetooth has selectable signal processing elements for mixers, Intermediate Frequency (IF) filters, transmit power amplifiers, and clock sources which are suitable for either Bluetooth or WLAN signal processing. The operating mode of the signal processor is selected to be one of Wireless High Performance, Wireless Low Power, Bluetooth High Performance or Bluetooth Low power, and the signal processing modules are selected to provide performance or power requirements using selected modules.

Abstract: An IoT device has a public device identifier and a private device identifier, where the public device identifier is publicly available and the private device identifier is secret but kept in a secure device database as a correspondence. A registration request is sent from the IoT device to an association server in communication with the device database having an association between IoT public identifier and a corresponding IoT private identifier. The association server which receives the registration request responds with a registration acknowledgement containing, in encrypted form, the private device identifier of the original request and, optionally, the public device identifier associated with the registration request. The requesting IoT device receives the association acknowledgement, decrypts the private device identifier, compares it to its own device identifier, and if they match, sends one or more association requests.

Abstract: An apparatus and method for encrypting messages from a first node splits the message into a plurality of message units, each of which is encrypted. The encrypted message units are split into path units, each of which is directed to a different route path to a destination node. At the destination node, the path units are received and reassembled into encrypted message units, which are decrypted into message fragments and concatenated to form a message corresponding to the original one sent.

Abstract: An IoT device has a public device identifier and a private device identifier, where the public device identifier is publicly available and the private device identifier is secret but kept in a secure device database as a tuple. A registration request containing encrypted credentials comprising at least a private identifier and optionally a public identifier is sent from the IoT device to an association server in communication with a device database having an association between IoT public identifier and a corresponding IoT private identifier. The association server which receives the registration request and encrypted credentials responds with a registration acknowledgement when the decrypted credentials match the tuple in the device database, or forwards the request to a registration server when it does not. The requesting IoT device receives an acknowledgement and is thereafter able to join the wireless network.

Abstract: An IoT device has a public device identifier and a private device identifier, where the public device identifier is publicly available and the private device identifier is secret but kept in a secure device database as a correspondence. A registration request is sent from the IoT device to an association server in communication with the device database having an association between IoT public identifier and a corresponding IoT private identifier. The association server which receives the registration request responds with a registration acknowledgement containing, in encrypted form, the private device identifier of the original request and, optionally, the public device identifier associated with the registration request. The requesting IoT device receives the association acknowledgement, decrypts the private device identifier, compares it to its own device identifier, and if they match, sends one or more association requests.

Abstract: A wireless receiver powers up shortly before the expected arrival of a beacon frame, and upon detection of a beacon frame from an access point the station is associated with and determination of subsequent fields of interest, including at least a TIM field, the receiver powers down. At the previously identified fields of interest, the receiver powers up and uses previously stored values to continue packet demodulation, thereafter examining the TIM field to determine whether the AP has packets to transmit to the station.

Abstract: A mesh receiver has a wakeup receiver for reception of a wakeup sequence formed by keyed RF or a sequence of wireless packets and gaps, a transmitter forming low speed RF wakeup sequence to other mesh stations, a mesh receiver for reception of high speed WLAN packets, the transmitter sending a wireless ACK packet in response to a wakeup sequence, the mesh receiver thereafter receiving wireless packets from a remote station, the mesh transmitter sending an ACK, the mesh station thereafter identifying a next hop station, and sending a wakeup sequence to that station, after receipt of an ACK, sending the data, the mesh receiver and mesh transmitter thereafter going to sleep.

Abstract: An IoT device has a public device identifier and a private device identifier, where the public device identifier is publicly available and the private device identifier is secret but kept in a secure device database as a correspondence. A registration request is sent from the IoT device to an association server in communication with the device database having an association between IoT public identifier and a corresponding IoT private identifier. The association server which receives the registration request responds with a registration acknowledgement containing, in encrypted form, the private device identifier of the original request and, optionally, the public device identifier associated with the registration request. The requesting IoT device receives the association acknowledgement, decrypts the private device identifier, compares it to its own device identifier, and if they match, sends one or more association requests.

Abstract: A product synthesizer has a core CPU, power distribution, and a plurality of selectable interfaces, each interface having an associated schematic symbol, PCB symbol, mechanical model, power dissipation, and power requirement. A set of constraints identifies performance metrics including low power, high performance, battery or mains power, battery life, and other constraints. The product synthesizer receives as inputs the interfaces and constraints, and generates as outputs a schematic diagram, a bill of materials, a routed printed circuit board, and a solid model of an enclosure, all of which satisfy the constraints and include the identified interfaces.

Abstract: A product synthesizer has a core CPU, power distribution, and a plurality of selectable interfaces, each interface having an associated schematic symbol, PCB symbol, mechanical model, power dissipation, and power requirement. A set of constraints identifies performance metrics including low power, high performance, battery or mains power, battery life, and other constraints. The product synthesizer receives as inputs the interfaces and constraints, and generates as outputs a schematic diagram, a bill of materials, a routed printed circuit board, and a solid model of an enclosure, all of which satisfy the constraints and include the identified interfaces.

Abstract: A wireless receiver generates quadrature baseband signals which are sampled by a high speed analog to digital converter (IQ ADC) and also uses a receive signal strength indicator (RSSI) which is sampled by an RSSI analog to digital converter (RSSI ADC). The RSSI ADC signal is processed in combination with an end of packet signal to generate a first threshold from the average RSSI signal after the end of packet with the receive amplifiers set to a comparatively high level. A second threshold is generated by adding a threshold increment to the first threshold, and when the RSSI crosses the second threshold, the IQ ADC is taken out of a standby mode and placed in an active mode for the duration of the packet. The RSSI ADC is enabled from end of packet until packet detection by the baseband processor, and placed in standby at other times.

Abstract: A method and apparatus for providing a plurality of aligned instructions from an instruction stream provided by a memory unit for execution within a pipelined microprocessor is described. The microprocessor comprises a prefetch buffer, whereby the prefetch buffer stores prefetched instructions and additional information about the validity and size of the prefetch buffer. The method and apparatus use the prefetch buffer to buffer a part of an instruction stream. The actually aligned instruction stream is issued from the prefetch buffer or directly by instructions fetched from the memory, or from a combination of prefetched instructions and actually fetched instructions.