Abstract: A circuit includes a first switch assembly having a first input node and a first output node, and a second switch assembly having a second input node and a second output node. The circuit further includes a third switch assembly an operational amplifier, and a buffer. The third switch assembly has a third input node and a third output node. The third input node is coupled to the second output node, and the third output node is coupled to the first output node. The buffer has a buffer input and a buffer output. The buffer input is coupled to an input stage of the operational amplifier. The buffer output is coupled to the third switch assembly.

Abstract: Enhanced operational amplifier trim circuitry and techniques are presented herein. In one implementation, a circuit includes a reference circuit configured to produce a set of reference voltages, and a digital-to-analog conversion (DAC) circuit. The DAC circuit comprises a plurality of transistor pairs, where each pair among the plurality of transistor pairs is configured to provide portions of adjustment currents for an operational amplifier based at least on the set of reference voltages and sizing among transistors of each pair. The circuit also includes drain switching elements coupled to drain terminals of the transistors of each pair and configured to selectively couple one or more of the portions of the adjustment currents to the operational amplifier in accordance with digital trim codes.

Abstract: The present disclosure provides devices, systems and methods for mapping of traffic boundaries.

Abstract: In described examples, an amplifier can be arranged to generate a first stage output signal in response to an input signal. The input signal can be coupled to control a first current coupled from a first current source through a common node to generate the first stage output signal. A replica circuit can be arranged to generate a replica load signal in response to the input signal and in response to current received from the common node. A current switch can be arranged to selectively couple a second current from a second current source to the common node in response to the replica load signal.

Abstract: Methods and apparatus for secure software defined storage are disclosed. An example apparatus includes memory and a processor to access a read request for data written to a software defined storage location, obtain the requested data from the software defined storage location, perform a classification operation on the requested data to obtain classification data corresponding to the requested data, the classification data to represent whether the requested data includes personally identifiable information, in response to determining that the requested data includes personally identifiable information, apply data loss prevention to the requested data to create response data, determine whether a client requesting the data from the software defined storage location is authorized to access the requested data, and in response to determining that the client requesting data is authorized to access the requested data, transmit the response data to the client.

Abstract: Methods, systems, and devices for wireless communication are described. A wireless device may identify an aggregation capability to communicate in parallel over a plurality of wireless links. The wireless device may in some cases broadcast this aggregation capability (e.g., periodically). Additionally or alternatively, the wireless device may transmit the aggregation capability in response to a request received from another wireless device. In some cases, the first wireless device may transmit a request to a second wireless device inquiring about aggregation capabilities of the second wireless device. The second wireless device may respond with its aggregation capabilities (e.g., or may broadcast its aggregation capabilities independently of receiving the response). The wireless devices may establish a multi-link session based at least in part on the indicated aggregation capabilities.

Abstract: An example device includes: switch circuitry configured to: connect, in a first state based on a control signal, a first switch input to a first switch output and a second switch input to a second switch output; and connect, in a second state based on the control signal, the first switch input to the second switch output and the second switch input to the first switch output; an operational amplifier configured to: generate, in response to the control signal, a first voltage based on a gain and the connections in the first state; and generate, in response to the control signal, a second voltage based on the gain and the connections in the second state; and an Analog to Digital Converter (ADC) configured to convert the first voltage and the second voltage into a digital value based on a multiplication of the input voltage and the gain.

Abstract: A method of calculating a time difference is disclosed. The method includes sampling a first ultrasonic signal (r21) to produce a first sampled signal (y1(i)) and sampling a second ultrasonic signal (r12) to produce a second sampled signal (y2(i)). A first time (LEAD_LAG) is determined between a time the first sampled signal crosses a threshold (?1) and a time the second sampled signal crosses the threshold. The first sampled signal is cross correlated with the second sampled signal to produce a second time (SAMP_OFFSET). The time difference is calculated in response to the first and second times.

Abstract: A switching amplifier includes: a driver circuit with differential inputs and differential outputs; and a fault detection circuit coupled to the differential outputs. The fault detection circuit includes: a power supply input; and a sense circuit coupled to the differential outputs. The sense circuit includes: a first resistor between the power supply input and a positive output of the differential outputs; a second resistor between the positive output and ground; a third resistor between the power supply input and a negative output of the differential outputs; and a fourth resistor between the negative output and ground. The fault detection circuit also includes an analyzer circuit coupled to the sense circuit and configured to determine a fault location relative to the differential outputs based on an output of the sense circuit.

Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for executing concurrent writes to a data store. One of the systems includes a data store comprising a plurality of storage segments, wherein each storage segment comprises a plurality of blocks; and an allocator system comprising: a plurality of threads, and a plurality of bitmaps each corresponding to a respective storage segment of the data store, wherein the allocator system is configured to perform operations comprising: assigning a respective bitmap to each thread of the plurality of threads; and executing, by each thread of the plurality of threads, one or more write requests to one or more blocks of the storage segment corresponding to the thread using the bitmap assigned to the thread, wherein executing a write request by a thread includes updating the bitmap assigned to the thread.

Abstract: Methods, systems, and devices for wireless communication are described. A wireless device may identify an aggregation capability to communicate in parallel over a plurality of wireless links. The wireless device may in some cases broadcast this aggregation capability (e.g., periodically). Additionally or alternatively, the wireless device may transmit the aggregation capability in response to a request received from another wireless device. In some cases, the first wireless device may transmit a request to a second wireless device inquiring about aggregation capabilities of the second wireless device. The second wireless device may respond with its aggregation capabilities (e.g., or may broadcast its aggregation capabilities independently of receiving the response). The wireless devices may establish a multi-link session based at least in part on the indicated aggregation capabilities.

Abstract: Systems and methods are provided for intelligent driving monitoring systems, advanced driver assistance systems and autonomous driving systems, and providing alerts to the driver of a vehicle, based on anomalies detected between driver behavior and environment captured by the outward facing camera. Various aspects of the driver, which may include his direction of sight, point of focus, posture, gaze, is determined by image processing of the upper visible body of the driver, by a driver facing camera in the vehicle. Other aspects of environment around the vehicle captured by the multitude of cameras in the vehicle are used to correlate driver behavior and actions with what is happening outside to detect and warn on anomalies, prevent accidents, provide feedback to the driver, and in general provide a safer driver experience.

Abstract: Systems and methods are provided for intelligent driving monitoring systems, advanced driver assistance systems and autonomous driving systems, and providing alerts to the driver of a vehicle, based on anomalies detected between driver behavior and environment captured by the outward facing camera. Various aspects of the driver, which may include his direction of sight, point of focus, posture, gaze, is determined by image processing of the upper visible body of the driver, by a driver facing camera in the vehicle. Other aspects of environment around the vehicle captured by the multitude of cameras in the vehicle are used to correlate driver behavior and actions with what is happening outside to detect and warn on anomalies, prevent accidents, provide feedback to the driver, and in general provide a safer driver experience.

Abstract: Enhanced operational amplifier trim circuitry and techniques are presented herein. In one implementation, a circuit includes a reference circuit configured to produce a set of reference voltages, and a digital-to-analog conversion (DAC) circuit. The DAC circuit comprises a plurality of transistor pairs, where each pair among the plurality of transistor pairs is configured to provide portions of adjustment currents for an operational amplifier based at least on the set of reference voltages and sizing among transistors of each pair. The circuit also includes drain switching elements coupled to drain terminals of the transistors of each pair and configured to selectively couple one or more of the portions of the adjustment currents to the operational amplifier in accordance with digital trim codes.

Abstract: This disclosure provides systems, methods, and apparatus, including computer programs encoded on computer-readable media, for advertising operating channels that are being operated in an unlicensed frequency band. One or more access points (APs) may transmit discovery information on a dedicated discovery channel for the unlicensed frequency band. The discovery information may indicate at least one operating channel that is being used by an AP for providing wireless access. The discovery information also may include other information useful for a station (STA) to discover APs, operating channels, and operating parameters. The STA may monitor the dedicated discovery channel to obtain the discovery information without conducting an active scanning or passive scanning procedure.

Abstract: The disclosure herein describes tracking changes to a stale component using a synchronization bitmap. A first component of a plurality of mirrored components of the distributed data object becomes available from an unavailable state, and a stale log sequence number (LSN) and a last committed LSN are identified. A synchronization bitmap of the first component associated with a range of LSNs (e.g., from the stale LSN to the last committed LSN) is created and configured to track changes to data blocks of the first component. A second component is identified based on the second component including a tracking bitmap associated with an LSN that matches the stale LSN of the first component. The first component is synchronized with data from the second component based on, wherein the synchronizing includes updating the synchronization bitmap to track changes made to data blocks of the first component.

Abstract: Disclosed examples include during basic discovery, provide information from a local device to a first remote trusted device, the information to indicate the local device supports trusted discovery and to establish the local device as a second remote trusted device; during the trusted discovery, access, by the local device, a trusted discovery message received from the first remote trusted device; in response to verifying security credentials identified in the trusted discovery message for the first remote trusted device: add the first remote trusted device to a trusted network including the local device; and index, by the local device, a first service hosted by the first remote trusted device in a registry, the registry to identify second services available to the local device and corresponding locations of the second services.

Abstract: Examples of amplifiers and nth-order loop filters thereof are configured to enable fast and robust recovery from saturation, while limiting signal distortion at or near full power delivery across multiple process and temperature corners. An example nth-order loop filter comprises n series-coupled resistor-capacitor (RC) integrators. In an example, each of the second RC integrator to the (n?1)th RC integrator has a reset mechanism responsive to a reset signal output from a reset controller when an input signal overload condition is detected at the input. Upon detecting the overload condition, each of the third RC integrator to the (n?1)th RC integrator is hard reset, the nth RC integrator is not reset, and a controlled reset is performed on the second RC integrator to recover from saturation caused by the signal overload condition, while maintaining the output signal below the 1% total harmonic distortion (THD) level at or near full power delivery.

Abstract: Various aspects of the disclosure relate to distributed multiple-input multiple-output (MIMO) communication such as coordinated beamforming or Joint MIMO. In some aspects, distributed MIMO is used to support communication in a cluster of wireless nodes (e.g., access points). A distributed MIMO scheduling scheme as taught herein is used to schedule the wireless nodes (e.g., access points and/or stations) operating within the cluster. For example, stations may be scheduled across basis services sets of the access points for a downlink transmission and/or an uplink transmission.

Abstract: Enhanced operational amplifier trim circuitry and techniques are presented herein. In one implementation, a circuit includes a reference circuit configured to produce a set of reference voltages, and a digital-to-analog conversion (DAC) circuit. The DAC circuit comprises a plurality of transistor pairs, where each pair among the plurality of transistor pairs is configured to provide portions of adjustment currents for an operational amplifier based at least on the set of reference voltages and sizing among transistors of each pair. The circuit also includes drain switching elements coupled to drain terminals of the transistors of each pair and configured to selectively couple one or more of the portions of the adjustment currents to the operational amplifier in accordance with digital trim codes.