Patents by Inventor Venkata Ramanan

Venkata Ramanan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11558013
    Abstract: Enhanced operational amplifier trim circuitry and techniques are presented herein. In one implementation, a circuit includes a reference circuit configured to produce a set of reference voltages, and a digital-to-analog conversion (DAC) circuit. The DAC circuit comprises a plurality of transistor pairs, where each pair among the plurality of transistor pairs is configured to provide portions of adjustment currents for an operational amplifier based at least on the set of reference voltages and sizing among transistors of each pair. The circuit also includes drain switching elements coupled to drain terminals of the transistors of each pair and configured to selectively couple one or more of the portions of the adjustment currents to the operational amplifier in accordance with digital trim codes.
    Type: Grant
    Filed: December 3, 2019
    Date of Patent: January 17, 2023
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Nitin Agarwal, Kunal Karanjkar, Venkata Ramanan
  • Patent number: 11553405
    Abstract: This disclosure provides systems, methods, and apparatus, including computer programs encoded on computer-readable media, for advertising operating channels that are being operated in an unlicensed frequency band. One or more access points (APs) may transmit discovery information on a dedicated discovery channel for the unlicensed frequency band. The discovery information may indicate at least one operating channel that is being used by an AP for providing wireless access. The discovery information also may include other information useful for a station (STA) to discover APs, operating channels, and operating parameters. The STA may monitor the dedicated discovery channel to obtain the discovery information without conducting an active scanning or passive scanning procedure.
    Type: Grant
    Filed: August 17, 2020
    Date of Patent: January 10, 2023
    Assignee: QUALCOMM INCORPORATED
    Inventors: Alfred Asterjadhi, George Cherian, Abhishek Pramod Patil, Yan Zhou, Venkata Ramanan Venkatachalam Jayaraman
  • Publication number: 20230006663
    Abstract: In described examples, an amplifier can be arranged to generate a first stage output signal in response to an input signal. The input signal can be coupled to control a first current coupled from a first current source through a common node to generate the first stage output signal. A replica circuit can be arranged to generate a replica load signal in response to the input signal and in response to current received from the common node. A current switch can be arranged to selectively couple a second current from a second current source to the common node in response to the replica load signal.
    Type: Application
    Filed: September 13, 2022
    Publication date: January 5, 2023
    Applicant: Texas Instruments Incorporated
    Inventors: Nitin Agarwal, Venkat Ramakrishna Saripalli, Venkata Ramanan R
  • Publication number: 20220398025
    Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for executing concurrent writes to a data store. One of the systems includes a data store comprising a plurality of storage segments, wherein each storage segment comprises a plurality of blocks; and an allocator system comprising: a plurality of threads, and a plurality of bitmaps each corresponding to a respective storage segment of the data store, wherein the allocator system is configured to perform operations comprising: assigning a respective bitmap to each thread of the plurality of threads; and executing, by each thread of the plurality of threads, one or more write requests to one or more blocks of the storage segment corresponding to the thread using the bitmap assigned to the thread, wherein executing a write request by a thread includes updating the bitmap assigned to the thread.
    Type: Application
    Filed: June 14, 2021
    Publication date: December 15, 2022
    Inventors: Aditya Kotwal, Venkata Ramanan, Sandeep Rangaswamy, Brian Caulfield
  • Patent number: 11497034
    Abstract: Various aspects of the disclosure relate to distributed multiple-input multiple-output (MIMO) communication such as coordinated beamforming or Joint MIMO. In some aspects, distributed MIMO is used to support communication in a cluster of wireless nodes (e.g., access points). A distributed MIMO scheduling scheme as taught herein is used to schedule the wireless nodes (e.g., access points and/or stations) operating within the cluster. For example, selected stations may be triggered to communicate with respective access points.
    Type: Grant
    Filed: September 23, 2020
    Date of Patent: November 8, 2022
    Assignee: QUALCOMM Incorporated
    Inventors: Yan Zhou, George Cherian, Abhishek Pramod Patil, Alfred Asterjadhi, Venkata Ramanan Venkatachalam Jayaraman
  • Patent number: 11477800
    Abstract: Various aspects of the disclosure relate to distributed multiple-input multiple-output (MIMO) communication such as coordinated beamforming or Joint MIMO. In some aspects, distributed MIMO is used to support communication in a cluster of wireless nodes (e.g., access points). A distributed MIMO scheduling scheme as taught herein is used to schedule sounding operations by the wireless nodes (e.g., access points and/or stations) operating within the cluster.
    Type: Grant
    Filed: October 22, 2020
    Date of Patent: October 18, 2022
    Assignee: QUALCOMM INCORPORATED
    Inventors: Yan Zhou, Abhishek Pramod Patil, George Cherian, Venkata Ramanan Venkatachalam Jayaraman, Alfred Asterjadhi
  • Patent number: 11477699
    Abstract: This disclosure provides systems, methods, apparatus, including computer programs encoded on computer storage media for one or more wireless devices to gain access to a wireless channel of a radio frequency spectrum band. In some aspects, a recurring coordinated medium interval is defined in the time domain and associated with the wireless channel. The coordinated medium interval includes a first time period, which may be referred to as a common reservation window, and a second time period, which may be referred to as a scheduled medium access window. During the first time period, access points (APs) attempting to gain access to the wireless channel may transmit reservation signals to reserve one or more scheduled service periods within the second time period of the same coordinated medium interval. The scheduled service periods reserved by an individual AP may be used for UL/DL communications between that AP and its associated stations (STAs).
    Type: Grant
    Filed: September 6, 2018
    Date of Patent: October 18, 2022
    Assignee: QUALCOMM Incorporated
    Inventors: Alfred Asterjadhi, George Cherian, Abhishek Pramod Patil, Venkata Ramanan Venkatachalam Jayaraman, Yan Zhou
  • Patent number: 11444612
    Abstract: In described examples, an amplifier can be arranged to generate a first stage output signal in response to an input signal. The input signal can be coupled to control a first current coupled from a first current source through a common node to generate the first stage output signal. A replica circuit can be arranged to generate a replica load signal in response to the input signal and in response to current received from the common node. A current switch can be arranged to selectively couple a second current from a second current source to the common node in response to the replica load signal.
    Type: Grant
    Filed: April 6, 2021
    Date of Patent: September 13, 2022
    Assignee: Texas Instruments Incorporated
    Inventors: Nitin Agarwal, Venkat Ramakrishna Saripalli, Venkata Ramanan R
  • Publication number: 20220256404
    Abstract: This disclosure provides systems, methods, apparatus, including computer programs encoded on computer storage media for one or more wireless devices to gain access to a wireless channel of a radio frequency spectrum band. In some aspects, a recurring coordinated medium interval is defined in the time domain and associated with the wireless channel. The coordinated medium interval includes a first time period, which may be referred to as a common reservation window, and a second time period, which may be referred to as a scheduled medium access window. During the first time period, access points (APs) attempting to gain access to the wireless channel may transmit reservation signals to reserve one or more scheduled service periods within the second time period of the same coordinated medium interval. The scheduled service periods reserved by an individual AP may be used for UL/DL communications between that AP and its associated stations (STAs).
    Type: Application
    Filed: April 27, 2022
    Publication date: August 11, 2022
    Inventors: Alfred Asterjadhi, George Cherian, Abhishek Pramod Patil, Venkata Ramanan Venkatachalam Jayaraman, Yan Zhou
  • Patent number: 11363058
    Abstract: A first storage device or first storage disk including first executable instructions that, when executed, cause a processor to at least: in response to determining a variable associated with a memory page that (1) has been loaded into local memory from a second storage device and (2) has been accessed from the local memory, has a first state, identify the memory page as a modified memory page, the memory page including second executable instructions. The first instructions also cause the processor to, in response to determining the second executable instructions of the modified memory page have been changed since a previous analysis of the modified memory page, perform anti-malware analysis of at least a portion of the modified memory page.
    Type: Grant
    Filed: March 23, 2020
    Date of Patent: June 14, 2022
    Assignee: MCAFEE, LLC
    Inventors: Venkata Ramanan Sambandam, Carl D. Woodward, Dmitri Rubakha, Steven L. Grobman
  • Patent number: 11337263
    Abstract: Methods, systems, and devices for wireless communication are described. Wireless devices may support parallel communications over multiple wireless links, which may benefit a wireless system in terms of throughput and latency (among other benefits). However, such systems may experience increased system complexity, which may in some cases mitigate some of the benefits provided by the parallel communication links. The described techniques provide for aggregation architectures that address various such complexities. For example, devices communicating in accordance with the described techniques may format data to be transmitted into a set of data units that are allocated to a communication link based on various factors described herein. Correspondingly, a device that receives the data packets may reorder the packets in accordance with the described techniques.
    Type: Grant
    Filed: January 11, 2019
    Date of Patent: May 17, 2022
    Assignee: QUALCOMM INCORPORATED
    Inventors: Yan Zhou, Abhishek Pramod Patil, Venkata Ramanan Venkatachalam Jayaraman, Alfred Asterjadhi, George Cherian
  • Publication number: 20220136878
    Abstract: A method of calculating a time difference is disclosed. The method includes sampling a first ultrasonic signal (r21) to produce a first sampled signal (y1(i)) and sampling a second ultrasonic signal (r12) to produce a second sampled signal (y2(i)). A first time (LEAD_LAG) is determined between a time the first sampled signal crosses a threshold (?1) and a time the second sampled signal crosses the threshold. The first sampled signal is cross correlated with the second sampled signal to produce a second time (SAMP_OFFSET). The time difference is calculated in response to the first and second times.
    Type: Application
    Filed: January 13, 2022
    Publication date: May 5, 2022
    Inventors: Anand Dabak, Venkata Ramanan
  • Publication number: 20220086577
    Abstract: A switching amplifier includes: a driver circuit with differential inputs and differential outputs; and a fault detection circuit coupled to the differential outputs. The fault detection circuit includes: a power supply input; and a sense circuit coupled to the differential outputs. The sense circuit includes: a first resistor between the power supply input and a positive output of the differential outputs; a second resistor between the positive output and ground; a third resistor between the power supply input and a negative output of the differential outputs; and a fourth resistor between the negative output and ground. The fault detection circuit also includes an analyzer circuit coupled to the sense circuit and configured to determine a fault location relative to the differential outputs based on an output of the sense circuit.
    Type: Application
    Filed: June 28, 2021
    Publication date: March 17, 2022
    Inventors: Venkata Ramanan RAMAMURTHY, Mohit CHAWLA
  • Patent number: 11255708
    Abstract: A method of calculating a time difference is disclosed. The method includes sampling a first ultrasonic signal (r21) to produce a first sampled signal (y1(i)) and sampling a second ultrasonic signal (r12) to produce a second sampled signal (y2(i)). A first time (LEAD_LAG) is determined between a time the first sampled signal crosses a threshold (?1) and a time the second sampled signal crosses the threshold. The first sampled signal is cross correlated with the second sampled signal to produce a second time (SAMP_OFFSET). The time difference is calculated in response to the first and second times.
    Type: Grant
    Filed: August 31, 2020
    Date of Patent: February 22, 2022
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Anand Dabak, Venkata Ramanan
  • Publication number: 20210394775
    Abstract: Systems and methods are provided for intelligent driving monitoring systems, advanced driver assistance systems and autonomous driving systems, and providing alerts to the driver of a vehicle, based on anomalies detected between driver behavior and environment captured by the outward facing camera. Various aspects of the driver, which may include his direction of sight, point of focus, posture, gaze, is determined by image processing of the upper visible body of the driver, by a driver facing camera in the vehicle. Other aspects of environment around the vehicle captured by the multitude of cameras in the vehicle are used to correlate driver behavior and actions with what is happening outside to detect and warn on anomalies, prevent accidents, provide feedback to the driver, and in general provide a safer driver experience.
    Type: Application
    Filed: September 11, 2019
    Publication date: December 23, 2021
    Inventors: David Jonathan JULIAN, Venkata Sreekanta Reddy ANNAPUREDDY, Sandeep PANDYA, Arvind YEDLA, Dale Alan WILLIS, Venkata Ramanan VENKATACHALAM JAYARAMAN, Suresh Babu YANAMALA, Avneesh AGRAWAL, Veeresh TARANALLI, Jaeyoon KIM
  • Publication number: 20210374155
    Abstract: The disclosure herein describes tracking changes to a stale component using a synchronization bitmap. A first component of a plurality of mirrored components of the distributed data object becomes available from an unavailable state, and a stale log sequence number (LSN) and a last committed LSN are identified. A synchronization bitmap of the first component associated with a range of LSNs (e.g., from the stale LSN to the last committed LSN) is created and configured to track changes to data blocks of the first component. A second component is identified based on the second component including a tracking bitmap associated with an LSN that matches the stale LSN of the first component. The first component is synchronized with data from the second component based on, wherein the synchronizing includes updating the synchronization bitmap to track changes made to data blocks of the first component.
    Type: Application
    Filed: May 29, 2020
    Publication date: December 2, 2021
    Inventors: Enning XIANG, Pascal RENAULD, Sandeep RANGASWAMY, Xin LI, Yiqi XU, Venkata RAMANAN
  • Publication number: 20210250380
    Abstract: Methods and apparatus for secure software defined storage are disclosed. An example apparatus includes memory and a processor to access a read request for data written to a software defined storage location, obtain the requested data from the software defined storage location, perform a classification operation on the requested data to obtain classification data corresponding to the requested data, the classification data to represent whether the requested data includes personally identifiable information, in response to determining that the requested data includes personally identifiable information, apply data loss prevention to the requested data to create response data, determine whether a client requesting the data from the software defined storage location is authorized to access the requested data, and in response to determining that the client requesting data is authorized to access the requested data, transmit the response data to the client.
    Type: Application
    Filed: April 27, 2021
    Publication date: August 12, 2021
    Inventors: DMITRI RUBAKHA, VENKATA RAMANAN SAMBANDAM, JONATHAN KING, IGOR POLEVOY, ANDREW V. HOLTZMANN
  • Publication number: 20210226619
    Abstract: In described examples, an amplifier can be arranged to generate a first stage output signal in response to an input signal. The input signal can be coupled to control a first current coupled from a first current source through a common node to generate the first stage output signal. A replica circuit can be arranged to generate a replica load signal in response to the input signal and in response to current received from the common node. A current switch can be arranged to selectively couple a second current from a second current source to the common node in response to the replica load signal.
    Type: Application
    Filed: April 6, 2021
    Publication date: July 22, 2021
    Inventors: Nitin Agarwal, Venkat Ramakrishna Saripalli, Venkata Ramanan R.
  • Publication number: 20210167731
    Abstract: Enhanced operational amplifier trim circuitry and techniques are presented herein. In one implementation, a circuit includes a reference circuit configured to produce a set of reference voltages, and a digital-to-analog conversion (DAC) circuit. The DAC circuit comprises a plurality of transistor pairs, where each pair among the plurality of transistor pairs is configured to provide portions of adjustment currents for an operational amplifier based at least on the set of reference voltages and sizing among transistors of each pair. The circuit also includes drain switching elements coupled to drain terminals of the transistors of each pair and configured to selectively couple one or more of the portions of the adjustment currents to the operational amplifier in accordance with digital trim codes.
    Type: Application
    Filed: December 3, 2019
    Publication date: June 3, 2021
    Inventors: Nitin Agarwal, Kunal Karanjkar, Venkata Ramanan
  • Publication number: 20210167775
    Abstract: A circuit includes a first switch assembly having a first input node and a first output node, and a second switch assembly having a second input node and a second output node. The circuit further includes a third switch assembly an operational amplifier, and a buffer. The third switch assembly has a third input node and a third output node. The third input node is coupled to the second output node, and the third output node is coupled to the first output node. The buffer has a buffer input and a buffer output. The buffer input is coupled to an input stage of the operational amplifier. The buffer output is coupled to the third switch assembly.
    Type: Application
    Filed: February 8, 2021
    Publication date: June 3, 2021
    Inventors: Nitin AGARWAL, Kunal Suresh KARANJKAR, Venkata Ramanan R