Patents by Inventor Vi Nguyen

Vi Nguyen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8228739
    Abstract: A circuit and corresponding method for providing a reference voltage are presented. The circuit includes a current source having a magnitude with positive temperature correlation connected to a node, and a diode element connected between the node and ground, where the reference voltage is provided from the node. The circuit also includes a variable resistance connected to receive an input indicative of the circuit temperature and through which the diode element is connected to the node. The value of the variable resistance is adjusted based upon the circuit temperature input. The circuit is useful for application as a peripheral circuitry, such as on a flash or other non-volatile memory and other circuits requiring an on-chip reference voltage source.
    Type: Grant
    Filed: July 18, 2011
    Date of Patent: July 24, 2012
    Assignee: SanDisk Technologies Inc.
    Inventors: Feng Pan, Yuxin Wang, Jonathan H. Huynh, Albert Chang, Khin Htoo, Qui Vi Nguyen
  • Patent number: 8106701
    Abstract: A level shifter circuit suitable for high voltage applications with shoot-through current isolation is presented. The level shifter receives a first enable signal and receives an input voltage at a first node and supplies an output voltage at a second node. The circuit provides the output voltage from the input voltage in response to the first enable signal being asserted and sets the output node to a low voltage value when the first enable signal is de-asserted. The level shifting circuit includes a depletion type NMOS transistor, having a gate connected to the output node, and a PMOS transistor, having a gate connected to the first enable signal. It also includes a first resistive element that is distinct from the NMOS and PMOS transistors. The NMOS transistor, the PMOS transistor and the first resistive elements are connected in series between the first and second nodes, with the NMOS transistor being connected to the first node.
    Type: Grant
    Filed: September 30, 2010
    Date of Patent: January 31, 2012
    Assignee: SanDisk Technologies Inc.
    Inventors: Jonathan Hoang Huynh, Feng Pan, Qui Vi Nguyen, Trung Pham
  • Publication number: 20110273227
    Abstract: A circuit and corresponding method for providing a reference voltage are presented. The circuit includes a current source having a magnitude with positive temperature correlation connected to a node, and a diode element connected between the node and ground, where the reference voltage is provided from the node. The circuit also includes a variable resistance connected to receive an input indicative of the circuit temperature and through which the diode element is connected to the node. The value of the variable resistance is adjusted based upon the circuit temperature input. The circuit is useful for application as a peripheral circuitry, such as on a flash or other non-volatile memory and other circuits requiring an on-chip reference voltage source.
    Type: Application
    Filed: July 18, 2011
    Publication date: November 10, 2011
    Inventors: Feng Pan, Yuxin Wang, Jonathan H. Huynh, Albert Chang, Khin Htoo, Qui Vi Nguyen
  • Patent number: 8004917
    Abstract: A circuit and corresponding method for providing a reference voltage are presented. The circuit includes a current source having a magnitude with positive temperature correlation connected to a node, and a diode element connected between the node and ground, where the node supplies the reference voltage. The circuit also includes a variable resistance connected to receive an input indicative of the circuit temperature and through which the diode element is connected to the node. The value of the variable resistance is adjusted based upon the circuit temperature input. The circuit is useful for application as a peripheral circuitry, such as on a flash or other non-volatile memory and other circuits requiring an on-chip reference voltage source.
    Type: Grant
    Filed: September 22, 2008
    Date of Patent: August 23, 2011
    Assignee: SanDisk Technologies Inc.
    Inventors: Feng Pan, Yuxin Wang, Jonathan H. Huynh, Albert Chang, Khin Htoo, Qui Vi Nguyen
  • Publication number: 20100074033
    Abstract: A circuit and corresponding method for providing a reference voltage are presented. The circuit includes a current source having a magnitude with positive temperature correlation connected to a node, and a diode element connected between the node and ground, where the reference voltage is provided from the node. The circuit also includes a variable resistance connected to receive an input indicative of the circuit temperature and through which the diode element is connected to the node. The value of the variable resistance is adjusted based upon the circuit temperature input. The circuit is useful for application as a peripheral circuitry, such as on a flash or other non-volatile memory and other circuits requiring an on-chip reference voltage source.
    Type: Application
    Filed: September 22, 2008
    Publication date: March 25, 2010
    Inventors: Feng Pan, Yuxin Wang, Jonathan H. Huynh, Albert Chang, Khin Htoo, Qui Vi Nguyen
  • Patent number: 7683700
    Abstract: A charge pump system for supplying an output voltage to a load is described. It includes a regulation circuit connected to receive the output voltage and derive an enable signal from it and multiple charge pump circuits connected in parallel to supply the output voltage. Each of the charge pump circuits is also connected to receive a clock signal and the enable signal. The system also includes one or more delay circuit elements, where a corresponding one or more, but less than all, of the charge pump circuits are connectable to receive the enable signal delayed by the corresponding delay circuit element.
    Type: Grant
    Filed: June 25, 2008
    Date of Patent: March 23, 2010
    Assignee: SanDisk Corporation
    Inventors: Jonathan H. Huynh, Qui Vi Nguyen, Feng Pang
  • Publication number: 20090322413
    Abstract: A charge pump system for supplying an output voltage to a load is described. It includes a regulation circuit connected to receive the output voltage and derive an enable signal from it and multiple charge pump circuits connected in parallel to supply the output voltage. Each of the charge pump circuits is also connected to receive a clock signal and the enable signal. The system also includes one or more delay circuit elements, where a corresponding one or more, but less than all, of the charge pump circuits are connectable to receive the enable signal delayed by the corresponding delay circuit element.
    Type: Application
    Filed: June 25, 2008
    Publication date: December 31, 2009
    Inventors: Jonathan H. Huynh, Qui Vi Nguyen, Feng Pan
  • Publication number: 20090315616
    Abstract: A charge pump system is formed on an integrated circuit that can be connected to an external power supply. The system includes a charge pump and a clock generator circuit. The clock circuit is coupled to provide a clock output, at whose frequency the charge pump operates and generates an output voltage from an input voltage. The clock frequency is a decreasing function of the voltage level of the external power supply. This allows for reducing power consumption in the charge pump system formed on a circuit connectable to an external power supply.
    Type: Application
    Filed: June 24, 2008
    Publication date: December 24, 2009
    Inventors: Qui Vi Nguyen, Feng Pan, Jonathan H. Huynh
  • Patent number: 7586362
    Abstract: Techniques of providing a low output voltage, high current capability charge pump are given. The charge pump has multiple capacitors along with switching circuitry. In an initialization phase, the first plate of each of the capacitors is connected to receive a regulator voltage and the second plate of each capacitor is connected to ground. In a transfer phase, the capacitors are connected in series, where, for each capacitor after the first, the second plate is connected to the first plate of the preceding capacitor in the series. The output voltage of the pump is from the first plate of the last capacitor in the series. Regulation circuitry generates the regulator voltage from a reference voltage to have a value responsive to the output voltage level of the pump.
    Type: Grant
    Filed: December 12, 2007
    Date of Patent: September 8, 2009
    Assignee: SanDisk Corporation
    Inventors: Feng Pan, Jonathan H. Huynh, Qui Vi Nguyen
  • Publication number: 20090153230
    Abstract: Techniques of providing a low output voltage, high current capability charge pump are given. The charge pump has multiple capacitors along with switching circuitry. In an initialization phase, the first plate of each of the capacitors is connected to receive a regulator voltage and the second plate of each capacitor is connected to ground. In a transfer phase, the capacitors are connected in series, where, for each capacitor after the first, the second plate is connected to the first plate of the preceding capacitor in the series. The output voltage of the pump is from the first plate of the last capacitor in the series. Regulation circuitry generates the regulator voltage from a reference voltage to have a value responsive to the output voltage level of the pump.
    Type: Application
    Filed: December 12, 2007
    Publication date: June 18, 2009
    Inventors: Feng Pan, Jonathan H. Huynh, Qui Vi Nguyen