Abstract: In one example, a computing system includes a device, the device including: a non-volatile memory divided into a plurality of selectable locations, each bit in the non-volatile memory configured to have corresponding data independently altered, wherein the selectable locations are grouped into a plurality of data lines; and one or more processing units coupled to the non-volatile memory, each of the processing units associated with a data line of the plurality of data lines, and each of the processing units configured to compute, based on data in an associated data line of the plurality of data lines, corresponding results, wherein the non-volatile memory is configured to selectively write, based on the corresponding results, data in selectable locations of the associated data line reserved to store results of the computation from the process unit associated with the associated data line.

Abstract: In one example, a computing system includes a device, the device including: a non-volatile memory divided into a plurality of selectable locations, each bit in the non-volatile memory configured to have corresponding data independently altered, wherein the selectable locations are grouped into a plurality of data lines; and one or more processing units coupled to the non-volatile memory, each of the processing units associated with a data line of the plurality of data lines, and each of the processing units configured to compute, based on data in an associated data line of the plurality of data lines, corresponding results, wherein the non-volatile memory is configured to selectively write, based on the corresponding results, data in selectable locations of the associated data line reserved to store results of the computation from the process unit associated with the associated data line.

Abstract: In one example, a computing system includes a device, the device including: a non-volatile memory divided into a plurality of selectable locations, each bit in the non-volatile memory configured to have corresponding data independently altered, wherein the selectable locations are grouped into a plurality of data lines; and one or more processing units coupled to the non-volatile memory, each of the processing units associated with a data line of the plurality of data lines, and each of the processing units configured to compute, based on data in an associated data line of the plurality of data lines, corresponding results, wherein the non-volatile memory is configured to selectively write, based on the corresponding results, data in selectable locations of the associated data line reserved to store results of the computation from the process unit associated with the associated data line.

Abstract: Novel technology for data object processing may include a system comprising a non-transitory memory; a non-transitory storage device; and a storage logic communicatively coupled to the non-transitory storage device and the non-transitory memory. The storage logic may be executable to perform operations comprising preparing a first log payload in the non-transitory memory; generating a first log bitmap describing a set of states for a set of logical blocks of an erase block of the non-transitory storage device; generating a first log including the first log bitmap and the first log payload; and storing the first log in the erase block of the non-transitory storage device.

Abstract: Systems and methods are disclosed for recovering from various types of data and process corruptions at a data processing unit of a plurality of data processing units each coupled with a non-volatile memory divided into a plurality of selectable locations, in a system absent a central processing unit. In some embodiments a data processing unit is configured to determine validity of an allocation table of the data processing unit, retrieve a process descriptor from the allocation table, parse the non-volatile memory for a first set of process data corresponding to the process descriptor, determine validity of the first set of process data corresponding to the process descriptor and attempt to recover the first set of process data in accordance with a determination that the first set of process data is invalid.

Abstract: Systems and methods are disclosed for maintaining a status of a respective data processing unit (DPU) of a plurality of data processing units, each coupled to non-volatile memory. In some embodiments a first DPU is configured to execute one or more persistent processes, wherein the one or more processes persist in the non-volatile memory over power cycles, generate a first broadcast message upon completion of a first persistent process, transmit the first broadcast message to a set of DPUs associated with monitoring the first DPU, receive a second broadcast message from a second DPU of the set of DPUs and assign a value indicating an active status for the second DPU in a status table to track the status of each DPU of the set of DPUs.

Abstract: Systems and methods are disclosed for a journal for a storage class memory device. The storage class memory device may execute an access command for a first page in the storage class memory device. The storage class memory device may also determine whether a failure occurred while executing the access command. The storage class memory device may create an entry in a journal for the storage class memory device if a failure occurred while executing the access command. The storage class memory device may refrain from creating the entry if a failure does not occur while executing the access command.

Abstract: Systems and methods for offloading data transformation from a host to a hybrid solid state drive (HSSD) are described. In one such method, the HSSD receives initial data from the host and stores the data at a first non-volatile memory (NVM). The HSSD receives a transformation command from the host to offload data transformation. The HSSD copies the data from the first NVM to a second NVM that is configured to provide a finer granularity of data access than that of the first NVM. Then the HSSD transforms the data at the second NVM utilizing the configured processing circuit. The HSSD may store the result in the first NVM and/or second NVM, and send it to the host.

Abstract: A non-volatile storage system is configured to reclaim bad blocks. One embodiment includes determining that a block of non-volatile memory cells is a bad block, leaving the block idle for a period of time to allow for self-curing of the block, verifying success of the self-curing, refreshing the block, verifying that the refresh was successful and subsequently using the block to store host data.

Abstract: Systems and methods are disclosed for recovering from various types of data and process corruptions at a data processing unit of a plurality of data processing units each coupled with a non-volatile memory divided into a plurality of selectable locations, in a system absent a central processing unit. In some embodiments a data processing unit is configured to determine validity of an allocation table of the data processing unit, retrieve a process descriptor from the allocation table, parse the non-volatile memory for a first set of process data corresponding to the process descriptor, determine validity of the first set of process data corresponding to the process descriptor and attempt to recover the first set of process data in accordance with a determination that the first set of process data is invalid.

Abstract: Systems and methods are disclosed for recovering from various types of data and process corruptions at a data processing unit of a plurality of data processing units each coupled with a non-volatile memory divided into a plurality of selectable locations, in a system absent a central processing unit. In some embodiments a first data processing unit is configured to receive instructions to execute a parent process from a second data processing unit and transmit instructions to execute a child process associated with the parent process to a third data processing unit. The first data processing unit may further be configured to determine occurrence of a process failure at the third data processing unit and re-assign the child process for execution.

Abstract: A non-volatile storage system is configured to reclaim bad blocks. One embodiment includes determining that a block of non-volatile memory cells is a bad block, leaving the block idle for a period of time to allow for self-curing of the block, verifying success of the self-curing, refreshing the block, verifying that the refresh was successful and subsequently using the block to store host data.

Abstract: NAND cell error remediation technologies are disclosed. The remediation technologies are applicable to 3D NAND. In one example, a storage device may include a processor and a memory device comprising NAND flash memory. The processor is configured to detect an error condition associated with a first page of the NAND flash memory, and determine whether the error condition is associated with a read disturbance or with a retention error. The processor is configured to initiate, if the error condition is associated with the read disturbance, a refresh operation with respect to the page to write data stored at the first page to a second page of the NAND flash memory, and initiate, if the error condition is associated with the retention error, a reprogramming operation with respect to the page to rewrite the data stored at the first page to the first page of the NAND flash memory.

Abstract: A non-volatile storage system is configured to reclaim bad blocks. One embodiment includes determining that a block of non-volatile memory cells is a bad block, leaving the block idle for a period of time to allow for self-curing of the block, verifying success of the self-curing, refreshing the block, verifying that the refresh was successful and subsequently using the block to store host data.

Abstract: Systems and methods are disclosed for maintaining a status of a respective data processing unit (DPU) of a plurality of data processing units, each coupled to non-volatile memory. In some embodiments a first DPU is configured to execute one or more persistent processes, wherein the one or more processes persist in the non-volatile memory over power cycles, generate a first broadcast message upon completion of a first persistent process, transmit the first broadcast message to a set of DPUs associated with monitoring the first DPU, receive a second broadcast message from a second DPU of the set of DPUs and assign a value indicating an active status for the second DPU in a status table to track the status of each DPU of the set of DPUs.

Abstract: Novel technology for data object processing may include a system comprising a non-transitory memory; a non-transitory storage device; and a storage logic communicatively coupled to the non-transitory storage device and the non-transitory memory. The storage logic may be executable to perform operations comprising preparing a first log payload in the non-transitory memory; generating a first log bitmap describing a set of states for a set of logical blocks of an erase block of the non-transitory storage device; generating a first log including the first log bitmap and the first log payload; and storing the first log in the erase block of the non-transitory storage device.

Abstract: In one example, a device includes a non-volatile memory divided into a plurality of selectable locations, wherein the selectable locations are grouped into a plurality of data lines; one or more processing units (PUs) coupled to the non-volatile memory, each of the PUs associated with a data line of the plurality of data lines, the one or more processing units comprising one or more reconfigurable PUs, the one or more PUs configured to: manipulate, based on one or more instruction sets, data in an associated data line to generate results that are stored in selectable locations of the associated data line reserved to store results of the manipulation; determine which of the instruction sets are most frequently used by the one or more PUs to manipulate data; and reconfigure the one or more reconfigurable PUs to manipulate data using the determined most frequently used instruction sets.

Abstract: In one example, a computing system includes a device, the device including: a non-volatile memory divided into a plurality of selectable locations, each bit in the non-volatile memory configured to have corresponding data independently altered, wherein the selectable locations are grouped into a plurality of data lines; and one or more processing units coupled to the non-volatile memory, each of the processing units associated with a data line of the plurality of data lines, and each of the processing units configured to compute, based on data in an associated data line of the plurality of data lines, corresponding results, wherein the non-volatile memory is configured to selectively write, based on the corresponding results, data in selectable locations of the associated data line reserved to store results of the computation from the process unit associated with the associated data line.

Abstract: In one example, a device includes a non-volatile memory divided into a plurality of selectable locations, wherein the selectable locations are grouped into a plurality of data lines; one or more processing units (PUs) coupled to the non-volatile memory, each of the PUs associated with a data line of the plurality of data lines, the one or more processing units comprising one or more reconfigurable PUs, the one or more PUs configured to: manipulate, based on one or more instruction sets, data in an associated data line to generate results that are stored in selectable locations of the associated data line reserved to store results of the manipulation; determine which of the instruction sets are most frequently used by the one or more PUs to manipulate data; and reconfigure the one or more reconfigurable PUs to manipulate data using the determined most frequently used instruction sets.

Abstract: Systems and methods are disclosed for a journal for a storage class memory device. The storage class memory device may execute an access command for a first page in the storage class memory device. The storage class memory device may also determine whether a failure occurred while executing the access command. The storage class memory device may create an entry in a journal for the storage class memory device if a failure occurred while executing the access command. The storage class memory device may refrain from creating the entry if a failure does not occur while executing the access command.