Patents by Inventor Victor Chan

Victor Chan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10229984
    Abstract: A method for fabricating a semiconductor device comprises forming a replacement gate structure on a semiconductor layer of a substrate. The replacement gate structure at least including a polysilicon layer. After forming the replacement gate structure, a gate spacer is formed on the replacement gate structure. Atoms are implanted in an upper portion of the polysilicon layer. The implanting expands the upper portion of the polysilicon layer and a corresponding upper portion of the gate spacer in at least a lateral direction beyond a lower portion of the polysilicon layer and a lower portion of the spacer, respectively. After the atoms have been implanted, the polysilicon layer is removed to form a gate cavity. A metal gate stack is formed within the gate cavity. The metal gate stack includes an upper portion having a width that is greater than a width of a lower portion of the metal gate stack.
    Type: Grant
    Filed: December 28, 2017
    Date of Patent: March 12, 2019
    Assignee: International Business Machines Corporation
    Inventors: Victor Chan, Jin Ping Han, Shangbin Ko
  • Patent number: 10217839
    Abstract: Disclosed is a field effect transistor (FET) with a replacement metal gate (RMG) and a method of forming the FET. The RMG includes a conformal gate dielectric layer and a stack of gate conductor layers on the gate dielectric layer. The stack includes a conformal work function metal (WFM) layer and a conductive fill material (CFM) layer on the WFM layer. Within the stack, the top surface of the CFM layer is above the level of the top of an adjacent vertical portion of the WFM layer. A dielectric gate cap has a center portion and an edge portion. The center portion is above the top surface of the CFM layer and the edge portion is above the top of the adjacent vertical portion of the WFM layer and is further positioned laterally immediately adjacent to an upper portion of an outer sidewall of the CFM layer.
    Type: Grant
    Filed: March 24, 2017
    Date of Patent: February 26, 2019
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Chanro Park, Kisup Chung, Victor Chan, Koji Watanabe
  • Patent number: 10186876
    Abstract: A battery module charging and discharging control method comprising: determining the charging priority of battery modules in a battery system; raising the charging priority of the battery modules that are more difficult to unload, load, and/or replace; lowering the charging priority of the battery modules that are easier to unload, load, and/or replace; causing the battery modules with higher charging priority to take precedence over the battery modules with lower charging priority during the charging control of the battery modules; determining the discharging priority of the battery modules; raising the discharging priority of the battery modules that are easier to unload, load, and/or replace; and lowering the discharging priority of the battery modules that are more difficult to unload, load, and/or replace; causing the battery modules with higher discharging priority to take precedence over the battery modules with lower discharging priority during the discharging control of the battery modules.
    Type: Grant
    Filed: March 23, 2016
    Date of Patent: January 22, 2019
    Inventors: Ka Yin Victor Chan, Sok Lei Leong
  • Publication number: 20180303490
    Abstract: A tissue resection guide for use with a datum includes a base releasably engagable with the datum. The tissue resection guide has a first frame fixed relative to the base and the first frame has at least one integral first guide path that is sized and configured to at least partially capture and guide a first tissue resection tool relative to the first frame.
    Type: Application
    Filed: June 25, 2018
    Publication date: October 25, 2018
    Inventors: Thomas Loring, Victor Chan, Chulho Pak, Michael Daniels
  • Publication number: 20180277652
    Abstract: A hash table method and structure comprises a processor that receives a plurality of access requests for access to a storage device. The processor performs a plurality of hash processes on the access requests to generate a first number of addresses for each access request. Such addresses are within a full address range. Hash table banks are operatively connected to the processor. The hash table banks form the storage device. Each of the hash table banks has a plurality of input ports. Specifically, each of the hash table banks has less input ports than the first number of addresses for each access request. The processor provides the addresses to the hash table banks, and each of the hash table banks stores pointers corresponding to a different limited range of addresses within the full address range (each of the different limited range of addresses is less than the full address range).
    Type: Application
    Filed: March 24, 2017
    Publication date: September 27, 2018
    Applicant: GLOBALFOUNDRIES INC.
    Inventors: Chanro Park, Kisup Chung, Victor Chan, Koji Watanabe
  • Publication number: 20180189228
    Abstract: Systems and methods may enable a user who may not have any experience in machine learning to effectively train new models for use in object recognition applications of a device. Embodiments can include, for example, analyzing training data comprising a set of images to determine a set of metrics indicative of a suitability of the training data in machine-learning training for object recognition, and providing an indication of the set of metrics to a user. Additionally or alternatively, an intermediate model can be used, after a first portion of the machine-learning training is conducted, to determine the effectiveness of a remaining portion of negative samples (images without the object) in the training data or to find other negative samples outside of the training data. Identifying and utilizing effective negative samples in this manner can improve the effectiveness of the training.
    Type: Application
    Filed: January 3, 2018
    Publication date: July 5, 2018
    Inventors: Edwin Chongwoo Park, Victor Chan
  • Publication number: 20180189609
    Abstract: Systems and methods may enable a user who may not have any experience in machine learning to effectively train new models for use in object recognition applications of a device. Embodiments can include, for example, analyzing training data comprising a set of images to determine a set of metrics indicative of a suitability of the training data in machine-learning training for object recognition, and providing an indication of the set of metrics to a user. Additionally or alternatively, an intermediate model can be used, after a first portion of the machine-learning training is conducted, to determine the effectiveness of a remaining portion of negative samples (images without the object) in the training data or to find other negative samples outside of the training data. Identifying and utilizing effective negative samples in this manner can improve the effectiveness of the training.
    Type: Application
    Filed: January 3, 2018
    Publication date: July 5, 2018
    Inventors: Edwin Chongwoo Park, Victor Chan
  • Publication number: 20180173948
    Abstract: Sensing of scene-based occurrences is disclosed. In one example, a vision sensor system comprises (1) dedicated computer vision (CV) computation hardware configured to receive sensor data from at least one sensor array and capable of computing CV features using readings from multiple neighboring sensor pixels and (2) a first processing unit communicatively coupled with the dedicated CV computation hardware. The vision sensor system is configured to, in response to processing of the one or more computed CV features indicating a presence of one or more irises in a scene captured by the at least one sensor array, generate data in support of iris-related operations to be performed by a second processing unit and send the generated data to the second processing unit.
    Type: Application
    Filed: September 22, 2017
    Publication date: June 21, 2018
    Inventors: Evgeni Gousev, Liang Shen, Victor Chan, Edwin Chongwoo Park, Xiaopeng Zhang
  • Publication number: 20180173986
    Abstract: Use of pupillary response to visible light for iris authentication is disclosed. One example involves (a) capturing an initial image of an eye including an inner circular boundary between a pupil region and an iris region and an outer circular boundary between the iris region and a sclera region, (b) determining a first size measurement indicative of the inner circular boundary, (c) responsive to at least the first size measurement, modulating one or more visible light sources to output visible light toward the eye of the user, (d) capturing a subsequent image of the eye of the user during a period of pupillary response, (e) obtaining an iris data record of the user, and (f) comparing the iris data record of the user to one or more registered iris data records to authenticate the user.
    Type: Application
    Filed: September 22, 2017
    Publication date: June 21, 2018
    Inventors: Evgeni Gousev, Liang Shen, Victor Chan, Edwin Chongwoo Park, Xiaopeng Zhang
  • Publication number: 20180173542
    Abstract: Techniques for recursively generating a plug-in application recipe (PIAR) are disclosed. A PIAR management application manages a particular PIAR in an active state. The PIAR management application manages PIAR specifications, each identifying a trigger and an action. The action is conditional on the trigger. The particular PIAR includes a particular trigger and a particular action. The particular action includes a child PIAR specification that defines, for a child PIAR, a second trigger and a second action to be executed when the second trigger is satisfied. In response to detecting that the particular trigger is satisfied, the PIAR management application creates the child PIAR.
    Type: Application
    Filed: October 26, 2017
    Publication date: June 21, 2018
    Applicant: Oracle International Corporation
    Inventors: Victor Chan, Udom Dwivedi, Eric Sutton
  • Publication number: 20180173933
    Abstract: Sector-based iris authentication is disclosed. One example involves (a) capturing an image of an eye of the user, the image including an iris region, (b) identifying a plurality of sectors of the iris region within the image, (c) determining a measure of distinctiveness for each sector of the iris region, (d) selecting one or more sectors from the plurality of sectors of the iris region based on the determined measure of distinctiveness for the each sector of the iris region, the selected one or more sectors being fewer in number than the plurality of sectors of the iris region, and (e) comparing the selected one or more sectors to one or more registered iris data records.
    Type: Application
    Filed: September 22, 2017
    Publication date: June 21, 2018
    Inventors: Evgeni Gousev, Liang Shen, Victor Chan, Edwin Chongwoo Park, Xiaopeng Zhang
  • Patent number: 9993254
    Abstract: One aspect of the present invention relates to a tissue resection guide that includes a central body, a first flange and a second flange, the flanges having first and second guide surfaces, respectively, suitable for use in tissue resection. Each guide surface lies on a cutting plane, both planes intersecting interior to the flanges. In the embodiments described, the availability of two cutting planes ensures resections in more than one plane are possible. As a result, bone segments can be removed via a cut on two planes without the need to cut across an entire section of bone on one plane. In some embodiments, an opening exists between the first flange and the second flange to ensure that each resection overlaps. In other aspects of the invention, systems and methods of use for the tissue resection guide are described.
    Type: Grant
    Filed: January 22, 2016
    Date of Patent: June 12, 2018
    Assignee: Stryker European Holdings I, LLC
    Inventors: Thomas Loring, Stephen G. Gilbert, Victor Chan
  • Publication number: 20180122920
    Abstract: A method for fabricating a semiconductor device comprises forming a replacement gate structure on a semiconductor layer of a substrate. The replacement gate structure at least including a polysilicon layer. After forming the replacement gate structure, a gate spacer is formed on the replacement gate structure. Atoms are implanted in an upper portion of the polysilicon layer. The implanting expands the upper portion of the polysilicon layer and a corresponding upper portion of the gate spacer in at least a lateral direction beyond a lower portion of the polysilicon layer and a lower portion of the spacer, respectively. After the atoms have been implanted, the polysilicon layer is removed to form a gate cavity. A metal gate stack is formed within the gate cavity. The metal gate stack includes an upper portion having a width that is greater than a width of a lower portion of the metal gate stack.
    Type: Application
    Filed: December 28, 2017
    Publication date: May 3, 2018
    Inventors: Victor CHAN, Jin Ping HAN, Shangbin KO
  • Patent number: 9935174
    Abstract: A method for fabricating a semiconductor device comprises forming a replacement gate structure on a semiconductor layer of a substrate. The replacement gate structure at least including a polysilicon layer. After forming the replacement gate structure, a gate spacer is formed on the replacement gate structure. Atoms are implanted in an upper portion of the polysilicon layer. The implanting expands the upper portion of the polysilicon layer and a corresponding upper portion of the gate spacer in at least a lateral direction beyond a lower portion of the polysilicon layer and a lower portion of the spacer, respectively. After the atoms have been implanted, the polysilicon layer is removed to form a gate cavity. A metal gate stack is formed within the gate cavity. The metal gate stack includes an upper portion having a width that is greater than a width of a lower portion of the metal gate stack.
    Type: Grant
    Filed: December 8, 2016
    Date of Patent: April 3, 2018
    Assignee: International Business Machines Corporation
    Inventors: Victor Chan, Jin Ping Han, Shangbin Ko
  • Publication number: 20180090596
    Abstract: A semiconductor device is provided with an electrically conductive gate having an enhanced gate profile. The semiconductor device includes a semiconductor substrate that extends along a first axis to define a length and a second axis opposite the first axis to define a height. A channel region is interposed between opposing source/drain regions, and a gate stack is atop the semiconductor substrate. The gate stack includes an electrically conductive gate atop the channel region. The electrically conductive gate includes sidewalls extending between a base and an upper surface to define a gate height. A gate length of the electrically conductive gate continuously increases as the gate height increases from the base to the upper surface.
    Type: Application
    Filed: September 27, 2016
    Publication date: March 29, 2018
    Inventors: Victor Chan, Jin Ping Han
  • Patent number: 9929250
    Abstract: A semiconductor device is provided with an electrically conductive gate having an enhanced gate profile. The semiconductor device includes a semiconductor substrate that extends along a first axis to define a length and a second axis opposite the first axis to define a height. A channel region is interposed between opposing source/drain regions, and a gate stack is atop the semiconductor substrate. The gate stack includes an electrically conductive gate atop the channel region. The electrically conductive gate includes sidewalls extending between a base and an upper surface to define a gate height. A gate length of the electrically conductive gate continuously increases as the gate height increases from the base to the upper surface.
    Type: Grant
    Filed: September 27, 2016
    Date of Patent: March 27, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Victor Chan, Jin Ping Han
  • Publication number: 20180048829
    Abstract: Methods, apparatuses, computer-readable medium, and systems are disclosed for performing automatic exposure control (AEC). In one embodiment, a first digital image is captured while applying a first set of values to one or more exposure control parameters. At least one computer vision (CV) operation is performed using image data from the first digital image, thereby generating a first set of CV features from a set of possible CV features. A mask is obtained comprising a value for each feature of the set of possible CV features. Using the mask, a first measure of abundance is obtained of relevant CV features among the first set of CV features extracted from the first digital image. Based on the first measure of abundance of relevant CV features, an updated set of values is generated for applying to the one or more exposure control parameters for capturing a subsequent digital image of the scene.
    Type: Application
    Filed: July 5, 2017
    Publication date: February 15, 2018
    Inventor: Victor CHAN
  • Patent number: 9858498
    Abstract: Methods, systems, computer-readable media, and apparatuses for incremental object detection using a staged process and a band-pass feature extractor are presented. At each stage of the staged process, a different band of features from a plurality of bands of features in image data can be extracted using a dual-threshold local binary pattern operator, and compared with features of a target object within the band for a partial decision. The staged process exits if a rejection decision is made at any stage of the staged process. If no rejection decision is made in each stage of the staged process, the target object is detected. Features extracted at each stage may be from a different image for some applications.
    Type: Grant
    Filed: September 23, 2015
    Date of Patent: January 2, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: Victor Chan, Alok Govil, Gerhard Reitmayr
  • Patent number: D806091
    Type: Grant
    Filed: May 16, 2016
    Date of Patent: December 26, 2017
    Assignee: Google LLC
    Inventors: Sevilla Weaver, Evan Malahy, Matthew Corey Hall, Andrew Anderson Stewart, Andrews-Junior Kimbembe, Aurora Adkins, Anthony Chen, Victor Chan, Michael Williams
  • Patent number: D815109
    Type: Grant
    Filed: May 16, 2016
    Date of Patent: April 10, 2018
    Assignee: Google LLC
    Inventors: Sevilla Weaver, Evan Malahy, Matthew Corey Hall, Andrew Anderson Stewart, Andrews-Junior Kimbembe, Aurora Adkins, Anthony Chen, Victor Chan