Patents by Inventor Viet Thanh Dinh

Viet Thanh Dinh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160197168
    Abstract: A semiconductor device comprising a bipolar transistor and a method of making the same. The bipolar transistor includes a collector having a laterally extending drift region. The bipolar transistor also includes a base located above the collector. The bipolar transistor further includes an emitter located above the base. The bipolar transistor also includes a reduced surface field (RESURF) gate located above an upper surface of the laterally extending drift region for shaping an electric field within the collector. The bipolar transistor further includes a gap located between the reduced surface field gate and an extrinsic region of the base of the device, for electrically isolating the reduced surface field gate from the base. A lateral dimension Lgap of the gap is in the range 0.1 ?m?Lgap?1.0 ?m.
    Type: Application
    Filed: January 5, 2016
    Publication date: July 7, 2016
    Inventors: Petrus Hubertus Cornelis Magnee, Joost Melai, Viet Thanh Dinh, Tony Vanhoucke
  • Publication number: 20160079345
    Abstract: A semiconductor device comprising a bipolar transistor and a method of making the same. A power amplifier including a bipolar transistor. The bipolar transistor includes a collector including a laterally extending drift region. The bipolar transistor also includes a base located above the collector. The bipolar transistor further includes an emitter located above the base. The bipolar transistor also includes a doped region having a conductivity type that is different to that of the collector. The doped region extends laterally beneath the collector to form a junction at a region of contact between the doped region and the collector. The doped region has a non-uniform lateral doping profile. A doping level of the doped region is highest in a part of the doped region closest to a collector-base junction of the bipolar transistor.
    Type: Application
    Filed: September 11, 2015
    Publication date: March 17, 2016
    Inventors: Tony Vanhoucke, Viet Thanh Dinh, Petrus Hubertus Cornelis Magnee, Ponky Ivo, Dirk Klaassen, Mahmoud Shehab Mohammad Al-Sa'di
  • Patent number: 9269706
    Abstract: Methods and systems for processing a silicon wafer are disclosed. A method includes providing a flash memory region in the silicon wafer and providing a bipolar transistor with a polysilicon external base in the silicon wafer. The flash memory region and the bipolar transistor are formed by depositing a single polysilicon layer common to both the flash memory region and the bipolar transistor.
    Type: Grant
    Filed: December 6, 2013
    Date of Patent: February 23, 2016
    Assignee: NXP, B.V.
    Inventors: Evelyne Gridelet, Hans Mertens, Michiel Jos van Duuren, Tony Vanhoucke, Viet Thanh Dinh
  • Patent number: 9240468
    Abstract: A semiconductor device and a method of making the same. The device includes a semiconductor substrate. The device also includes a bipolar transistor on the semiconductor substrate. The bipolar transistor includes an emitter. The bipolar transistor also includes a base located above the emitter. The bipolar transistor further includes a laterally extending collector located above the base. The collector includes a portion that extends past an edge of the base.
    Type: Grant
    Filed: March 24, 2014
    Date of Patent: January 19, 2016
    Assignee: NXP, B.V.
    Inventors: Tony Vanhoucke, Viet Thanh Dinh, Anco Heringa, Dirk Klaassen, Evelyne Gridelet, Jan Willem Slotboom
  • Publication number: 20150263108
    Abstract: The disclosure relates to bipolar transistor devices and a method of fabricating the same. The device comprises a field plate, in an isolation region adjacent to a base-collector junction of said active region. The isolation region comprises a gate terminal arranged to be biased independently of a collector, base or emitter terminal of said transistor.
    Type: Application
    Filed: March 12, 2015
    Publication date: September 17, 2015
    Inventors: Johannes Donkers, Viet Thanh Dinh, Tony Vanhoucke, Evelyne Gridelet, Anco Heringa, Dirk Klaassen
  • Publication number: 20150145005
    Abstract: Disclosed is a transistor having a first region of a first conductivity type for injecting charge carriers into the transistor and a laterally extended second region) of the first conductivity type having a portion including a contact terminal for draining said charge carriers from the transistor, wherein the first region is separated from the second region by an intermediate region of a second conductivity type defining a first p-n junction with the first region and a second p-n junction with the second region, wherein the laterally extended region separates the portion from the second p-n junction, and wherein the transistor further comprises a substrate having a doped region of the second conductivity type, said doped region being in contact with and extending along the laterally extended second region and a further contact terminal connected to the doped region for draining minority charge carriers from the laterally extended second region.
    Type: Application
    Filed: November 17, 2014
    Publication date: May 28, 2015
    Inventors: Viet Thanh Dinh, Tony Vanhoucke, Evelyne Gridelet, Anco Heringa, Jan Willem Slotboom, Dirk Klaassen
  • Publication number: 20140347131
    Abstract: A circuit, comprising a semiconductor device with one or more field gate terminals for controlling the electric field in a drift region of the semiconductor device; and a feedback circuit configured to dynamically control a bias voltage or voltages applied to the field gate terminal or terminals, with different control voltages used for different semiconductor device characteristics in real-time in response to a time-varying signal at a further node in the circuit.
    Type: Application
    Filed: May 23, 2014
    Publication date: November 27, 2014
    Applicant: NXP B.V.
    Inventors: Viet Thanh Dinh, Godefridus Antonius Maria Hurxk, Tony Vanhoucke, Jan Willem Slotboom, Anco Heringa, Ivan Zahariev, Evelyne Gridelet
  • Publication number: 20140347135
    Abstract: The invention provides a bipolar transistor circuit and a method of controlling a bipolar transistor, in which the bipolar transistor has a gate terminal for controlling the electric field in a collector region of the transistor. The bias voltage applied to the gate terminal is controlled to achieve different transistor characteristics.
    Type: Application
    Filed: May 22, 2014
    Publication date: November 27, 2014
    Applicant: NXP B.V.
    Inventors: Viet Thanh Dinh, Godefridus Adrianus Maria Hurxk, Tony Vanhoucke, Jan Slotboom, Anco Heringa, Ivan Zahariev, Evelyne Gridelet
  • Publication number: 20140312356
    Abstract: A semiconductor device and a method of making the same. The device includes a semiconductor substrate. The device also includes a bipolar transistor on the semiconductor substrate. The bipolar transistor includes an emitter. The bipolar transistor also includes a base located above the emitter. The bipolar transistor further includes a laterally extending collector located above the base. The collector includes a portion that extends past an edge of the base.
    Type: Application
    Filed: March 24, 2014
    Publication date: October 23, 2014
    Applicant: NXP B.V.
    Inventors: Tony Vanhoucke, Viet Thanh Dinh, Anco Heringa, Dirk Claasen, Evelyne Gridelet, Jan Willem Slotboom
  • Publication number: 20140167055
    Abstract: Methods and systems for processing a silicon wafer are disclosed. A method includes providing a flash memory region in the silicon wafer and providing a bipolar transistor with a polysilicon external base in the silicon wafer. The flash memory region and the bipolar transistor are formed by depositing a single polysilicon layer common to both the flash memory region and the bipolar transistor.
    Type: Application
    Filed: December 6, 2013
    Publication date: June 19, 2014
    Applicant: NXP B.V.
    Inventors: Evelyne Gridelet, Hans Mertens, Michiel Jos van Duuren, Tony Vanhoucke, Viet Thanh Dinh