Patents by Inventor Vijay Anand
Vijay Anand has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11957769Abstract: Sunscreen compositions comprising a dermatologically acceptable carrier and a polyhydroxy fullerene compound are described. The sunscreen compositions can be used to protect a substrate such as the skin of a subject from the effects of ultraviolet radiation.Type: GrantFiled: February 22, 2021Date of Patent: April 16, 2024Assignee: THE CLEVELAND CLINIC FOUNDATIONInventors: Vijay Krishna, Sanjay Anand, Edward Maytin, Stephen Grobmyer
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Publication number: 20240111598Abstract: In an embodiment, a processor may include a plurality of processing engines and a sequencing circuit. The sequencing circuit may be to: detect a completed execution of a first workload by a first processing engine; in response to a detection of the completed execution of the first workload by the first processing engine, identify at least one processing engine specified as consecutive to the first processing engine in a sequence mapping; and activate the at least one processing engine specified as consecutive to execute a second workload.Type: ApplicationFiled: September 30, 2022Publication date: April 4, 2024Inventors: Shidlingeshwar Khatakalle, Vijay Anand Mathiyalagan, Diyanesh Babu Chinnakkonda Vidyapoornachary
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Publication number: 20240112006Abstract: A network of matrix processing units (MPUs) is provided on a device, where each MPU is connected to at least one other MPU in the network, and each MPU is to perform matrix multiplication operations. Computer memory stores tensor data and a master control central processing unit (MCC) is provided on the device to receive an instruction from a host device, where the instruction includes one or more tensor operands based on the tensor data. The MCC invokes a set of operations on one or more of the MPUs based on the instruction, where the set of operations includes operations on the tensor operands. A result is generated from the set of operations, the result embodied as a tensor value.Type: ApplicationFiled: December 8, 2023Publication date: April 4, 2024Inventors: Horace H. Lau, Prashant Arora, Olivia K. Wu, Tony L. Werner, Carey K. Kloss, Amir Khosrowshahi, Andrew Yang, Aravind Kalaiah, Vijay Anand R. Korthikanti
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Publication number: 20240096466Abstract: A system and method for a protocol to identify patterns among caregivers and predict the root cause of burnout, whereby the system leverages proprietary data and data collected form third party sources to assess the risk of caregivers and then adjusts accordingly based on previous data of the caregivers as well as other similar caregivers.Type: ApplicationFiled: September 20, 2022Publication date: March 21, 2024Inventors: Mohammad Ali Ahmadi, Michael Mings, Vijay Anand
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Publication number: 20240072159Abstract: A method of producing power semiconductor devices from a silicon-on-insulator (SOI) wafer is described. The SOI wafer includes a silicon device layer, a bulk silicon wafer, and a buried oxide layer separating the silicon device layer from the bulk silicon wafer. The method includes: forming a hard mask on the silicon device layer, wherein the hard mask covers one or more first regions of the silicon device layer and exposes one or more second regions of the silicon device layer; and before forming any field oxide structures and before implanting any device regions, selectively growing epitaxial silicon on the one or more second regions of the silicon device layer exposed by the hard mask such that the thickness of the one or more second regions is increased relative to the one or more first regions. Various devices produced according to the method are also described.Type: ApplicationFiled: August 30, 2022Publication date: February 29, 2024Inventors: Manoj Chandrika Reghunathan, Devesh Kumar Datta, Eric Alois Graetz, Muhammad Akmal Hasanudin, Vijay Anand Ramadass
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System and method for optimizing power consumption in multimedia signal processing in mobile devices
Patent number: 11877237Abstract: The present invention provides a system and method for optimizing power consumption in Multimedia Signal Processing in mobile devices. The system comprises a Media (speech, audio, image, and video) codec encoder module, a Media codec decoder module (106) and pre-processing and postprocessing (filtering, deblocking filter, Analytics, person detect, keyword/keyframe spotting) modules modules. The pre-processing and post-processing modules are implemented on a DSPNLIW processor, while the Media encoder and decoder modules are implemented on a CPU with SIMD extensions. This pipeline (asynchronous RPC, non-blocking) implementation of modules in multi-core reduces current consumption in the SoC by up to 50 percent compared to an implementation of the modules in a multiple CPU/DSP/VLIW core with synchronous RPC (blocking). The significant reduction in current consumption of the modules enables reduction of power consumption in the Multimedia processing use case.Type: GrantFiled: June 7, 2021Date of Patent: January 16, 2024Assignee: TriSpace Technologies (OPC) Pvt. Ltd.Inventor: Narasimhan Vijay Anand -
Patent number: 11875234Abstract: Certain example embodiments herein relate to techniques for automatically correcting and completing data in sparse datasets. Records in the dataset are divided into groups with properties having similar values. For each group, one or more properties of the records therein that is/are to be ignored is/are identified, based on record distances relative to the records in the group, and distances among values for each of the properties of the records in the respective group. The records in the groups are further divided into sub-groups without regard to the one or more properties that is/are to be ignored. The sub-groups include a smaller and more cohesive set of records. For each sub-group: based on the records therein, predicted values to be applied to values identified as being empty but needing to be filled in are determined; and those predicted values are applied. The corrected/completed dataset is provided as output.Type: GrantFiled: July 17, 2020Date of Patent: January 16, 2024Assignee: SOFTWARE AGInventors: Vijay Anand Chidambaram, Ulrich Kalex
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Publication number: 20230421831Abstract: Disclosed herein are system, apparatus, article of manufacture, method and/or computer program product embodiments, and/or combinations and sub-combinations thereof, for modifying one or more parameters of a data streaming bitrate selection algorithm based on machine learning. An example embodiment operates by training and operating a first machine learning model to predict a sustainable network bandwidth. A second machine learning model is trained to receive the sustainable network bandwidth and predict a likelihood that this network bandwidth will not empty a data buffer of streaming data. A bitrate is selected based on the likelihood being below a threshold percentage, such as 50%.Type: ApplicationFiled: September 7, 2023Publication date: December 28, 2023Applicant: ROKU, INC.Inventors: Amit Paliwal, Andrey Marsavin, Govind Vaidya, Wim Michiels, Beth Teresa Logan, Zheng Han, Tapan Oza, Vijay Anand Raghavan
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Publication number: 20230376649Abstract: The present invention provides a system and method for optimizing BoM cost of platform SoC in mobile devices. The system (100) comprises a CPU with SIMD extensions wherein video codec encoder/decoder module is implemented (101), and another CPU with SIMD extensions instead of DSP/VLIW core wherein post-processing filtering module (Deblocking filter) (102) module is implemented. Replacing DSP/VLIW core in platform SoC helps in lowering the BoM cost and the inventive steps helps in achieving bit-exact results overcoming the limitations of CPU ISA as against DSP ISA. The power consumed is either case (deblocking filter on CPU, DSP ISA) is the same, thus giving value additions to platform SoC designers and makers.Type: ApplicationFiled: February 23, 2023Publication date: November 23, 2023Inventor: Narasimhan Vijay Anand
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Patent number: 11818051Abstract: A first network device may receive first traffic of a session that involves a service. The first network device may identify that the service is configured for distributed node processing. The first network device may identify a second network device that is configured for distributed node processing. The first network device may identify a state machine that is associated with the service. The first network device may determine, based on the state machine, a first function and a second function, wherein the first function is identified by a first label and the second function is identified by a second label. The first network device may process the first traffic based on the first function. The first network device may provide, to the second network device, the first traffic and the second label to permit the second network device to process second traffic in association with the second function.Type: GrantFiled: October 27, 2022Date of Patent: November 14, 2023Assignee: Juniper Networks, Inc.Inventors: Vijay Anand Karuppiah, Mohit Joshi, Suresh Vishwanathan, Sankar Ramamoorthi
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Publication number: 20230351348Abstract: A method may include determining a combination of values of attributes represented by reference data associated with payment transaction by training a machine learning model based on an association between (i) respective values of the attributes and (ii) the payment transactions having a given result. The combination may be correlated with having the given result. The method may also include selecting a subset of the payment transactions that is associated with the combination of values. The method may additionally include determining a first rate at which payment transactions of the subset have the given result during a first time period and a second rate at which one or more payment transactions associated with the combination have the given result during a second time period, and generating an indication that the two rates differ.Type: ApplicationFiled: June 22, 2023Publication date: November 2, 2023Inventors: Sayan Maity, Christopher Carl Underwood, Beth Teresa Logan, Sreeram Srinivasan, Shanshan Tuo, Pradeep Reddy, Vijay Anand Raghavan, Raviteja Gunda, Shih-Ting Liu, Thong Le Nguyen
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Patent number: 11800167Abstract: Disclosed herein are system, apparatus, article of manufacture, method and/or computer program product embodiments, and/or combinations and sub-combinations thereof, for modifying one or more parameters of a data streaming bitrate selection algorithm based on machine learning. An example embodiment operates by training and operating a first machine learning model to predict a sustainable network bandwidth. A second machine learning model is trained to receive the sustainable network bandwidth and predict a likelihood that this network bandwidth will not empty a data buffer of streaming data. A bitrate is selected based on the likelihood being below a threshold percentage, such as 50%.Type: GrantFiled: October 29, 2021Date of Patent: October 24, 2023Assignee: ROKU, INC.Inventors: Amit Paliwal, Andrey Marsavin, Govind Vaidya, Wim Michiels, Beth Teresa Logan, Zheng Han, Tapan Oza, Vijay Anand Raghavan
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Patent number: 11748625Abstract: In one embodiment, a matrix operation may be performed using a plurality of input matrices, wherein the matrix operation is associated with one or more convolution operations. The plurality of input matrices may be partitioned into a plurality of input partitions, wherein the plurality of input matrices is partitioned based on a number of available processing elements. The plurality of input partitions may be distributed among a plurality of processing elements, wherein each input partition is distributed to a particular processing element of the plurality of processing elements. A plurality of partial matrix operations may be performed using the plurality of processing elements, and partial matrix data may be transmitted between the plurality of processing elements while performing the plurality of partial matrix operations. A result of the matrix operation may be determined based on the plurality of partial matrix operations.Type: GrantFiled: December 30, 2016Date of Patent: September 5, 2023Assignee: Intel CorporationInventors: Vijay Anand R. Korthikanti, Aravind Kalaiah, Tony L. Werner, Carey K. Kloss, Amir Khosrowshahi
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Publication number: 20230276080Abstract: A method may include determining a combination of values of attributes represented by reference data associated with computing devices by training a machine learning model based on an association between (i) respective values of the attributes and (ii) the computing devices entering a device state. The combination may be correlated with entry into the device state. The method may also include selecting a subset of the computing devices that is associated with the combination of values. The method may additionally include determining a first rate at which computing devices of the subset have entered the device state during a first time period and a second rate at which one or more computing devices associated with the combination have entered the device state during a second time period, and generating an indication that the two rates differ.Type: ApplicationFiled: February 28, 2022Publication date: August 31, 2023Inventors: Suvrath V. Penmetcha, Le Zhang, Vijay Anand Raghavan, Beth Teresa Logan, Kevin Henely, Sahib Bal, Sayan Maity
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Patent number: 11709967Abstract: Embodiments are described for a method and system of applying data protection software mechanisms to network equipment devices to auto-discover the networking equipment, save changes from memory (TCAM) to local storage, backup changes to protection storage, provide auditing and tracking history of changes, and provide the ability to deploy test/development copies of changes using software defined networking techniques.Type: GrantFiled: June 25, 2020Date of Patent: July 25, 2023Assignee: EMC IP Holding Company LLCInventors: Adam Brenner, Arun Murti, Mark Malamut, Vijay Anand
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Publication number: 20230222331Abstract: A network of matrix processing units (MPUs) is provided on a device, where each MPU is connected to at least one other MPU in the network, and each MPU is to perform matrix multiplication operations. Computer memory stores tensor data and a master control central processing unit (MCC) is provided on the device to receive an instruction from a host device, where the instruction includes one or more tensor operands based on the tensor data. The MCC invokes a set of operations on one or more of the MPUs based on the instruction, where the set of operations includes operations on the tensor operands. A result is generated from the set of operations, the result embodied as a tensor value.Type: ApplicationFiled: March 15, 2023Publication date: July 13, 2023Inventors: Horce H. Lau, Prashant Arora, Olivia K. Wu, Tony L. Werner, Carey K. Kloss, Amir Khosrowshahi, Andrew Yang, Aravind Kalaiah, Vijay Anand R. Korthikanti
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Publication number: 20230133880Abstract: Disclosed herein are system, apparatus, article of manufacture, method and/or computer program product embodiments, and/or combinations and sub-combinations thereof, for modifying one or more parameters of a data streaming bitrate selection algorithm based on machine learning. An example embodiment operates by training and operating a first machine learning model to predict a sustainable network bandwidth. A second machine learning model is trained to receive the sustainable network bandwidth and predict a likelihood that this network bandwidth will not empty a data buffer of streaming data. A bitrate is selected based on the likelihood being below a threshold percentage, such as 50%.Type: ApplicationFiled: October 29, 2021Publication date: May 4, 2023Inventors: Amit PALIWAL, Andrey MARSAVIN, Govind VAIDYA, Wim MICHIELS, Beth Teresa LOGAN, Zheng HAN, Tapan OZA, Vijay Anand RAGHAVAN
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Publication number: 20230137769Abstract: Systems, apparatuses and methods may provide for operating system (OS) technology that determines an average bandwidth consumption with respect to a memory device, wherein the average bandwidth consumption is dedicated to a previous execution of a thread in a multi-threaded execution environment, stores the average bandwidth consumption, and sends the average bandwidth consumption to a power management unit in response to a subsequent execution of the thread being scheduled. Additionally, logic hardware technology may include a first set of registers to accumulate an average bandwidth consumption for a plurality of threads on a per thread basis with respect to the memory device, wherein the average bandwidth consumption corresponds to previous executions of the plurality of threads. The logic hardware technology determines a minimum bandwidth demand based on the average bandwidth consumption and sets a dynamic voltage and frequency scaling point based on the minimum bandwidth demand.Type: ApplicationFiled: November 3, 2021Publication date: May 4, 2023Inventors: Vijay Anand Mathiyalagan, Stephen H. Gunther, Shidlingeshwar Khatakalle, Diyanesh Babu Chinnakkonda Vidyapoornachary
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Publication number: 20230084909Abstract: A first network device may receive first traffic of a session that involves a service. The first network device may identify that the service is configured for distributed node processing. The first network device may identify a second network device that is configured for distributed node processing. The first network device may identify a state machine that is associated with the service. The first network device may determine, based on the state machine, a first function and a second function, wherein the first function is identified by a first label and the second function is identified by a second label. The first network device may process the first traffic based on the first function. The first network device may provide, to the second network device, the first traffic and the second label to permit the second network device to process second traffic in association with the second function.Type: ApplicationFiled: October 27, 2022Publication date: March 16, 2023Inventors: Vijay Anand KARUPPIAH, Mohit JOSHI, Suresh VISHWANATHAN, Sankar RAMAMOORTHI
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Publication number: 20230069536Abstract: Techniques in dynamic routing for advanced deep learning provide improvements in one or more of accuracy, performance, and energy efficiency. An array of processing elements comprising a portion of a neural network accelerator performs flow-based computations on wavelets of data. Each processing element comprises a compute element enabled to execute programmed instructions using the data and a router enabled to route the wavelets via static routing, dynamic routing, or both. The routing is in accordance with a respective virtual channel specifier of each of the wavelets and controlled by routing configuration information of the router. The static techniques enable statically specifiable neuron connections. The dynamic techniques enable information from the wavelets to alter the routing configuration information during neural network processing.Type: ApplicationFiled: October 14, 2020Publication date: March 2, 2023Inventors: Michael MORRISON, Michael Edwin JAMES, Sean LIE, Srikanth AREKAPUDI, Gary R. LAUTERBACH, Vijay Anand Reddy KORTHIKANTI