Patents by Inventor Vijay Anand

Vijay Anand has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220245438
    Abstract: A network of matrix processing units (MPUs) is provided on a device, where each MPU is connected to at least one other MPU in the network, and each MPU is to perform matrix multiplication operations. Computer memory stores tensor data and a master control central processing unit (MCC) is provided on the device to receive an instruction from a host device, where the instruction includes one or more tensor operands based on the tensor data. The MCC invokes a set of operations on one or more of the MPUs based on the instruction, where the set of operations includes operations on the tensor operands. A result is generated from the set of operations, the result embodied as a tensor value.
    Type: Application
    Filed: April 25, 2022
    Publication date: August 4, 2022
    Inventors: Horce H. Lau, Prashant Arora, Olivia K. Wu, Tony L. Werner, Carey K. Kloss, Amir Khosrowshahi, Andrew Yang, Aravind Kalaiah, Vijay Anand R. Korthikanti
  • Publication number: 20220229738
    Abstract: Embodiments are described for a method and system of applying data protection software mechanisms to network devices to auto-discover the networking equipment, save changes from memory (TCAM) to local storage, backup changes to protection storage, provide auditing and tracking history of changes, and provide the ability to deploy test/development copies of changes using software defined networking techniques. Embodiments include an efficient visual mapping aspect provided through a GUI to display the topography and backup/protection configuration of network devices in a system.
    Type: Application
    Filed: March 31, 2022
    Publication date: July 21, 2022
    Inventors: Arun Murti, Adam Brenner, Mark Malamut, Vijay Anand
  • Patent number: 11394802
    Abstract: A method and system of providing estimates or recommendations for software lifecycle management tasks by obtaining and storing local timing and result data for a current run of an application task on a local client, and gathering global timing and result data in a server computer for a plurality of clients including the local client. The local client combines its local timing and result data with the global timing and result data to generate an estimated time completion and success probability for a next run of the application task. The local client uses a rule definition file to substitute function variables for text strings and recommendation text with the appropriate values from the combined timing and result data and outputs the final time estimate UI string and recommendation through a user interface for display to a user.
    Type: Grant
    Filed: June 24, 2020
    Date of Patent: July 19, 2022
    Assignee: EMC IP Holding Company LLC
    Inventors: Arun Murti, Adam Brenner, Mark Malamut, Vijay Anand
  • Patent number: 11388670
    Abstract: The present invention provides a system and method for optimizing power consumption in voice communication in mobile devices. The system comprises pre-processing modules, a speech codec encoder module, a speech codec decoder module and post-processing modules. The pre-processing and post-processing modules are implemented on a DSP/VLIW processor, while the speech encoder and decoder modules are implemented on a CPU with SIMD extensions. This pipelined implementation of modules in multi-core reduces current consumption in the SoC by up to 50 percent compared to an implementation of the modules in a single DSP/VLIW core. The significant reduction in current consumption of the modules enables reduction of power consumption in the talk time.
    Type: Grant
    Filed: June 3, 2020
    Date of Patent: July 12, 2022
    Assignee: TriSpace Technologies (OPC) Pvt. Ltd.
    Inventor: Narasimhan Vijay Anand
  • Patent number: 11386375
    Abstract: An electronic resource tracking and storage computer system communicates with computing systems operated by different participants. Computing systems store copies of a blockchain and have associated computing devices with sensors. A programmed rule set includes conditions to be met when cooperating to complete, in connection with a resource tracked via the blockchain, a modeled process including modeled tasks. A transceiver receives, from the computing devices, signed electronic data messages including identifiers and values from their respective sensors. Blockchain transactions including identifiers and value(s) in the respective messages are generated. Generated blockchain transactions are published for inclusion in blockchain's copies. Value(s) in the respective electronic data messages are validated against the set of programmed rules. Based on the validations' results, events are emitted to an event bus monitored by a management system.
    Type: Grant
    Filed: September 20, 2018
    Date of Patent: July 12, 2022
    Assignee: SOFTWARE AG
    Inventors: Vijay Anand Chidambaram, Rajesh Kumar Radhakrishnan Varadhan, Balaji Thilagar, Vijayanand Ravivarman
  • Publication number: 20220199142
    Abstract: Hardware and/or software that dynamically enables or disables CRC and/or adjust voltage level of power supply to a physical layer block on a host by determining an optimum tradeoff between power and performance. The hardware and/or software decreases the voltage level for the power supply and enables CRC to compensate signal errors (e.g., errors from signal integrity issues). Hardware and/or software dynamically adjusts voltage level of the power supply rail based on the throughput or speed of the DDR link. In some examples, depending on read or write operations, the voltage level of the power supply rail is adjusted.
    Type: Application
    Filed: December 22, 2020
    Publication date: June 23, 2022
    Applicant: Intel Corporation
    Inventors: Vijay Anand Mathiyalagan, Sambaran Mitra
  • Publication number: 20220175740
    Abstract: The present disclosure relates generally to pharmaceutical compositions of N-(5-(5-((1R,2S)-2-fluorocyclopropyl)-1,2,4-oxadiazol-3-yl)-2-methylphenyl)imidazo[1,2-a]pyridine-3-carboxamide useful as a selective inhibitor of c-kit kinase and uses of the same in the treatment of c-kit kinase associated diseases.
    Type: Application
    Filed: November 19, 2021
    Publication date: June 9, 2022
    Inventors: Michael JUHNKE, Vijay Anand Sethuraman
  • Patent number: 11330526
    Abstract: The present invention provides a system and method for optimizing power consumption in video communication in mobile devices. The system comprises a video codec encoder module, a video codec decoder module and post-processing filtering module (Deblocking filter) modules. The post-processing modules are implemented on a DSP/VLIW processor, while the video encoder and decoder modules are implemented on a CPU with SIMD extensions. This pipelined implementation of modules in multi-core reduces current consumption in the SoC by up to 50 percent compared to an implementation of the modules in a single/multiple DSP/VLIW core. The significant reduction in current consumption of the modules enables reduction of power consumption in the video call time. Thus, the invention provides a simple method of optimizing power consumption by multi core implementation of the modules in a video call in mobile devices.
    Type: Grant
    Filed: December 21, 2020
    Date of Patent: May 10, 2022
    Assignee: TriSpace Technologies (OPC) Pvt. Ltd.
    Inventor: Narasimhan Vijay Anand
  • Publication number: 20220121954
    Abstract: In one embodiment, a matrix operation may be performed using a plurality of input matrices, wherein the matrix operation is associated with one or more convolution operations. The plurality of input matrices may be partitioned into a plurality of input partitions, wherein the plurality of input matrices is partitioned based on a number of available processing elements. The plurality of input partitions may be distributed among a plurality of processing elements, wherein each input partition is distributed to a particular processing element of the plurality of processing elements. A plurality of partial matrix operations may be performed using the plurality of processing elements, and partial matrix data may be transmitted between the plurality of processing elements while performing the plurality of partial matrix operations. A result of the matrix operation may be determined based on the plurality of partial matrix operations.
    Type: Application
    Filed: December 28, 2021
    Publication date: April 21, 2022
    Inventors: Vijay Anand R. Korthikanti, Aravind Kalaiah, Tony L. Werner, Carey K. Kloss, Amir Khosrowshahi
  • Publication number: 20220058336
    Abstract: A method of automated review of communications comprises: receiving, by a computer system, a document from a requestor application; extracting layout information and text from the document; extracting, based on the layout information, values of one or more predefined data items from the text of the document; producing a document validation result by analyzing the one or more data items; embedding, into the document, one or more human-readable comments reflecting the document validation result; and forwarding, to the requestor application, the document comprising the one or more human readable comments.
    Type: Application
    Filed: August 17, 2021
    Publication date: February 24, 2022
    Inventors: Johanna Anders, John Rybczynski, Sai Vijay Anand Ponduru, Vinay Abhishek Akkana, Sivakumar Muthusamy, Santanu Sengupta
  • Publication number: 20210409511
    Abstract: A method and system of providing estimates or recommendations for software lifecycle management tasks by obtaining and storing local timing and result data for a current run of an application task on a local client, and gathering global timing and result data in a server computer for a plurality of clients including the local client. The local client combines its local timing and result data with the global timing and result data to generate an estimated time completion and success probability for a next run of the application task. The local client uses a rule definition file to substitute function variables for text strings and recommendation text with the appropriate values from the combined timing and result data and outputs the final time estimate UI string and recommendation through a user interface for display to a user.
    Type: Application
    Filed: June 24, 2020
    Publication date: December 30, 2021
    Inventors: Arun Murti, Adam Brenner, Mark Malamut, Vijay Anand
  • Publication number: 20210406403
    Abstract: Embodiments are described for a method and system of applying data protection software mechanisms to network equipment devices to auto-discover the networking equipment, save changes from memory (TCAM) to local storage, backup changes to protection storage, provide auditing and tracking history of changes, and provide the ability to deploy test/development copies of changes using software defined networking techniques.
    Type: Application
    Filed: June 25, 2020
    Publication date: December 30, 2021
    Inventors: Adam Brenner, Arun Murti, Mark Malamut, Vijay Anand
  • Publication number: 20210392577
    Abstract: The present invention provides a system and method for optimizing power consumption in Multimedia Signal Processing in mobile devices. The system comprises a Media (speech, audio, image, and video) codec encoder module, a Media codec decoder module (106) and pre-processing and postprocessing (filtering, deblocking filter, Analytics, person detect, keyword/keyframe spotting) modules modules. The pre-processing and post-processing modules are implemented on a DSPNLIW processor, while the Media encoder and decoder modules are implemented on a CPU with SIMD extensions. This pipeline (asynchronous RPC, non-blocking) implementation of modules in multi-core reduces current consumption in the SoC by up to 50 percent compared to an implementation of the modules in a multiple CPU/DSP/VLIW core with synchronous RPC (blocking). The significant reduction in current consumption of the modules enables reduction of power consumption in the Multimedia processing use case.
    Type: Application
    Filed: June 7, 2021
    Publication date: December 16, 2021
    Inventor: Narasimhan Vijay Anand
  • Publication number: 20210385167
    Abstract: A first network device may receive first traffic of a session that involves a service. The first network device may identify that the service is configured for distributed node processing. The first network device may identify a second network device that is configured for distributed node processing. The first network device may identify a state machine that is associated with the service. The first network device may determine, based on the state machine, a first function and a second function, wherein the first function is identified by a first label and the second function is identified by a second label. The first network device may process the first traffic based on the first function. The first network device may provide, to the second network device, the first traffic and the second label to permit the second network device to process second traffic in association with the second function.
    Type: Application
    Filed: December 23, 2020
    Publication date: December 9, 2021
    Inventors: Vijay Anand KARUPPIAH, Mohit JOSHI, Suresh VISHWANATHAN, Sankar RAMAMOORTHI
  • Publication number: 20210377868
    Abstract: The present invention provides a system and method for optimizing power consumption in video communication in mobile devices. The system comprises a video codec encoder module, a video codec decoder module and post-processing filtering module (Deblocking filter) modules. The post-processing modules are implemented on a DSP/VLIW processor, while the video encoder and decoder modules are implemented on a CPU with SIMD extensions. This pipelined implementation of modules in multi-core reduces current consumption in the SoC by up to 50 percent compared to an implementation of the modules in a single/multiple DSP/VLIW core. The significant reduction in current consumption of the modules enables reduction of power consumption in the video call time. Thus, the invention provides a simple method of optimizing power consumption by multi core implementation of the modules in a video call in mobile devices.
    Type: Application
    Filed: December 21, 2020
    Publication date: December 2, 2021
    Inventor: Narasimhan Vijay Anand
  • Publication number: 20210357706
    Abstract: Certain example embodiments herein relate to techniques for automatically correcting and completing data in sparse datasets. Records in the dataset are divided into groups with properties having similar values. For each group, one or more properties of the records therein that is/are to be ignored is/are identified, based on record distances relative to the records in the group, and distances among values for each of the properties of the records in the respective group. The records in the groups are further divided into sub-groups without regard to the one or more properties that is/are to be ignored. The sub-groups include a smaller and more cohesive set of records. For each sub-group: based on the records therein, predicted values to be applied to values identified as being empty but needing to be filled in are determined; and those predicted values are applied. The corrected/completed dataset is provided as output.
    Type: Application
    Filed: July 17, 2020
    Publication date: November 18, 2021
    Inventors: Vijay Anand CHIDAMBARAM, Ulrich KALEX
  • Publication number: 20210344557
    Abstract: Methods, systems, and apparatuses for network management are described. A network device may provide a network that is accessible using at least one network credential. The network device may receive and/or determine an update to the at least one network credential. The network device may determine that a client device would be prevented from accessing the network without the update to the at least one network credential. The network device may send the update to the at least one network credential to the client device using a secure provisioning protocol.
    Type: Application
    Filed: April 30, 2020
    Publication date: November 4, 2021
    Inventors: Nithya Rajagopal, Stephen Allinson, Vijay Anand Selvaraj, Soumya Munshi, Jacob Gladish, Patrick Ladd, David Wong
  • Publication number: 20210132123
    Abstract: A scheme for measuring AC and DC load-line (LL) using voltage and current monitoring apparatus. During calibration for LL measurement, a tested or known workload is executed on a processor or system-on-chip (SoC). The calibration can be done when the processor is first used in a real-time system (customer) scenario, or repeated whenever necessary to compensate silicon aging or other effects that affect the LL values. LL is estimated, determined, and/or calculated for each power supply rail in the processor or SoC. The measured LL is used in calculations that determine the operating voltage of an input voltage regulator (VR) at run time, thereby optimizing the power/performance characteristics of that specific system.
    Type: Application
    Filed: December 19, 2020
    Publication date: May 6, 2021
    Applicant: Intel Corporation
    Inventors: Vijay Anand Mathiyalagan, Stephen Gunther
  • Patent number: 10970591
    Abstract: A system for determining a viable area automatically and accurately includes an interface and a processor. The interface is configured to receive location information. The processor is configured to determine imagery data based on the location information, to determine a point cloud using the imagery data, determine one or more features using the point cloud, determine viable area using the one or more features, and determine a solar irradiance of the viable area.
    Type: Grant
    Filed: June 14, 2019
    Date of Patent: April 6, 2021
    Assignee: OnSwitch LLC
    Inventors: Vijay Anand Ananthakrishnan, Stacia Renee Okura, Mark Andrew Bronez
  • Publication number: 20210084592
    Abstract: The present invention provides a system and method for optimizing power consumption in voice communication in mobile devices. The system comprises pre-processing modules, a speech codec encoder module, a speech codec decoder module and post-processing modules. The pre-processing and post-processing modules are implemented on a DSP/VLIW processor, while the speech encoder and decoder modules are implemented on a CPU with SIMD extensions. This pipelined implementation of modules in multi-core reduces current consumption in the SoC by up to 50 percent compared to an implementation of the modules in a single DSP/VLIW core. The significant reduction in current consumption of the modules enables reduction of power consumption in the talk time.
    Type: Application
    Filed: June 3, 2020
    Publication date: March 18, 2021
    Inventor: Narasimhan Vijay Anand