Patents by Inventor Vijay K. Nair

Vijay K. Nair has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11488880
    Abstract: Enclosure technology for electronic components is disclosed. An enclosure for an electronic component can comprise a base member and a cover member disposed on the base member such that the cover member and the base member form an enclosure for an electronic component. In one aspect, the base member can have at least one via extending therethrough. The at least one via can be configured to electrically couple an enclosed electronic component with another electronic component external to the enclosure. In another aspect, the cover member can include a protrusion, a receptacle, or both, and the base member can include a mating protrusion, receptacle, or both to facilitate proper alignment of the cover member and the base member. Electronic device packages and associated systems and methods are also disclosed.
    Type: Grant
    Filed: June 30, 2017
    Date of Patent: November 1, 2022
    Assignee: Intel Corporation
    Inventors: Vijay K. Nair, Digvijay A. Raorane
  • Patent number: 11456721
    Abstract: Packaged RF front end systems including a hybrid filter and an active circuit in a single package are described. In an example, a package includes an active die comprising an acoustic wave resonator. A package substrate is electrically coupled to the active die. A seal frame surrounds the acoustic wave resonator and is attached to the active die and to the package substrate, the seal frame hermetically sealing the acoustic wave resonator in a cavity between the active die and the package substrate.
    Type: Grant
    Filed: December 28, 2017
    Date of Patent: September 27, 2022
    Assignee: Intel Corporation
    Inventors: Feras Eid, Telesphor Kamgaing, Georgios C. Dogiamis, Vijay K. Nair, Johanna M. Swan
  • Publication number: 20220246554
    Abstract: Embodiments of the invention include a microelectronic device that includes a first silicon based substrate having compound semiconductor components. The microelectronic device also includes a second substrate coupled to the first substrate. The second substrate includes an antenna unit for transmitting and receiving communications at a frequency of approximately 4 GHz or higher.
    Type: Application
    Filed: April 14, 2022
    Publication date: August 4, 2022
    Inventors: Telesphor KAMGAING, Georgios C. DOGIAMIS, Vijay K. NAIR, Javier A. FALCON, Shawna M. LIFF, Yoshihiro TOMITA
  • Patent number: 11387200
    Abstract: Embodiments of the invention include a microelectronic device that includes a first die formed with a silicon based substrate and a second die coupled to the first die. The second die is formed with compound semiconductor materials in a different substrate (e.g., compound semiconductor substrate, group III-V substrate). An antenna unit is coupled to the second die. The antenna unit transmits and receives communications at a frequency of approximately 4 GHz or higher.
    Type: Grant
    Filed: March 23, 2020
    Date of Patent: July 12, 2022
    Assignee: Intel Corporation
    Inventors: Georgios C. Dogiamis, Telesphor Kamgaing, Javier A. Falcon, Yoshihiro Tomita, Vijay K. Nair
  • Patent number: 11367708
    Abstract: Embodiments of the invention include a microelectronic device that includes a transceiver coupled to a first substrate and a second substrate coupled to the first substrate. The second substrate includes an antenna unit for transmitting and receiving communications at a frequency of approximately 4 GHz or higher. An interposer substrate can provide a spacing between the first and second substrates.
    Type: Grant
    Filed: December 13, 2019
    Date of Patent: June 21, 2022
    Assignee: Intel Corporation
    Inventors: Vijay K. Nair, Georgios C. Dogiamis, Telesphor Kamgaing
  • Patent number: 11335651
    Abstract: Embodiments of the invention include a microelectronic device that includes a first silicon based substrate having compound semiconductor components. The microelectronic device also includes a second substrate coupled to the first substrate. The second substrate includes an antenna unit for transmitting and receiving communications at a frequency of approximately 4 GHz or higher.
    Type: Grant
    Filed: December 22, 2015
    Date of Patent: May 17, 2022
    Assignee: Intel Corporation
    Inventors: Telesphor Kamgaing, Georgios C. Dogiamis, Vijay K. Nair, Javier A. Falcon, Shawna M. Liff, Yoshihiro Tomita
  • Patent number: 11283427
    Abstract: Hybrid filters and more particularly filters having acoustic wave resonators (AWRs) and lumped component (LC) resonators and packages therefor are described. In an example, a packaged filter includes a package substrate, the package substrate having a first side and a second side, the second side opposite the first side. A first acoustic wave resonator (AWR) device is coupled to the package substrate, the first AWR device comprising a resonator. A plurality of inductors is in the package substrate.
    Type: Grant
    Filed: December 28, 2017
    Date of Patent: March 22, 2022
    Assignee: Intel Corporation
    Inventors: Telesphor Kamgaing, Feras Eid, Georgios C. Dogiamis, Vijay K. Nair, Johanna M. Swan
  • Patent number: 11239186
    Abstract: Generally discussed herein are systems, devices, and methods that include a communication cavity. According to an example a device can include a substrate with a first cavity formed therein, first and second antennas exposed in and enclosed by the cavity, and an interconnect structure formed on the substrate, the interconnect structure including alternating conductive material layers and inter-layer dielectric layers.
    Type: Grant
    Filed: September 23, 2016
    Date of Patent: February 1, 2022
    Assignee: Intel Corporation
    Inventors: Digvijay Raorane, Vijay K. Nair
  • Patent number: 11206008
    Abstract: Embodiments of the invention include an acoustic wave resonator (AWR) module. In an embodiment, the AWR module may include a first AWR substrate and a second AWR substrate affixed to the first AWR substrate. In an embodiment, the first AWR substrate and the second AWR substrate define a hermetically sealed cavity. A first AWR device may be positioned in the cavity and formed on the first AWR substrate, and a second AWR device may be positioned in the cavity and formed on the second AWR substrate. In an embodiment, a center frequency of the first AWR device is different than a center frequency of the second AWR device. In additional embodiment of the invention, the AWR module may be integrated into a hybrid filter. The hybrid filter may include an AWR module and other RF passive devices embedded in a packaging substrate.
    Type: Grant
    Filed: December 28, 2017
    Date of Patent: December 21, 2021
    Assignee: Intel Corporation
    Inventors: Georgios C. Dogiamis, Telesphor Kamgaing, Feras Eid, Vijay K. Nair, Johanna M. Swan
  • Publication number: 20210391638
    Abstract: Generally discussed herein are systems, devices, and methods that include a communication cavity. According to an example a device can include substrate with a first cavity formed therein, first and second antennas exposed in and enclosed by the cavity, and an interconnect structure formed in the substrate, the interconnect structure including alternating conductive material layers and inter-layer dielectric layers.
    Type: Application
    Filed: August 27, 2021
    Publication date: December 16, 2021
    Inventors: Vijay K. Nair, Digvijay Ashokkumar Raorane
  • Patent number: 11195806
    Abstract: An integrated circuit (IC) comprises a substrate, a first die mounted on the substrate, a second die mounted on the substrate and a waveguide structure mounted on the first die and the second die to enable high frequency wireless communication between the first die and the second die.
    Type: Grant
    Filed: December 29, 2016
    Date of Patent: December 7, 2021
    Assignee: Intel Corporation
    Inventors: Vijay K. Nair, Digvijay Ashokkumar Raorane
  • Patent number: 11189573
    Abstract: A semiconductor package is described herein with electromagnetic shielding using metal layers and vias. In one example, the package includes a silicon substrate having a front side and a back side, the front side including active circuitry and an array of contacts to attach to a substrate, a metallization layer over the back side of the die to shield active circuitry from interference through the back side, and a plurality of through-silicon vias coupled to the back side metallization at one end and to front side lands of the array of lands at the other end to shield active circuitry from interference through the sides of the die.
    Type: Grant
    Filed: March 31, 2016
    Date of Patent: November 30, 2021
    Assignee: Intel Corporation
    Inventors: Vijay K. Nair, Digvijay Raorane
  • Patent number: 11128029
    Abstract: Generally discussed herein are systems, devices, and methods that include a communication cavity. According to an example a device can include substrate with a first cavity formed therein, first and second antennas exposed in and enclosed by the cavity, and an interconnect structure formed in the substrate, the interconnect structure including alternating conductive material layers and inter-layer dielectric layers.
    Type: Grant
    Filed: September 26, 2016
    Date of Patent: September 21, 2021
    Assignee: Intel Corporation
    Inventors: Vijay K. Nair, Digvijay Raorane
  • Patent number: 11037892
    Abstract: Waveguides disposed in either an interposer layer or directly in the semiconductor package substrate may be used to transfer signals between semiconductor dies coupled to the semiconductor package. For example, inter-semiconductor die communications using mm-wave carrier signals launched into waveguides specifically tuned to optimize transmission parameters of such signals. The use of such high frequencies beneficially provides for reliable transmission of modulated high data rate signals with lower losses than conductive traces and less cross-talk. The use of mm-wave waveguides provides higher data transfer rates per bump for bump-limited dies as well as beneficially providing improved signal integrity even at such higher data transfer rates. Such mm-wave waveguides may be built directly into semiconductor package layers or may be incorporated into one or more interposed layers that are physically and communicably coupled between the semiconductor dies and the semiconductor package substrate.
    Type: Grant
    Filed: December 30, 2016
    Date of Patent: June 15, 2021
    Assignee: Intel Corporation
    Inventors: Vijay K. Nair, Sasha N. Oster, Johanna M. Swan, Telesphor Kamgaing, Georgios C. Dogiamis, Adel A. Elsherbini
  • Patent number: 10903818
    Abstract: Embodiments of the invention include a piezoelectric package integrated filtering device that includes a film stack. In one example, the film stack includes a first electrode, a piezoelectric material in contact with the first electrode, and a second electrode in contact with the piezoelectric material. The film stack is suspended with respect to a cavity of an organic substrate having organic material and the film stack generates an acoustic wave to be propagated across the film stack in response to an application of an electrical signal between the first and second electrodes.
    Type: Grant
    Filed: April 1, 2016
    Date of Patent: January 26, 2021
    Assignee: Intel Corporation
    Inventors: Vijay K. Nair, Feras Eid, Adel A. Elsherbini, Telesphor Kamgaing, Georgios C. Dogiamis, Valluri R. Rao, Johanna M. Swan
  • Patent number: 10897238
    Abstract: Embodiments of the invention include a filtering device that includes a first electrode, a piezoelectric material in contact with the first electrode, and a second electrode in contact with the piezoelectric material. The piezoelectric filtering device expands and contracts laterally in a plane of an organic substrate in response to application of an electrical signal between the first and second electrodes.
    Type: Grant
    Filed: April 1, 2016
    Date of Patent: January 19, 2021
    Assignee: Intel Corporation
    Inventors: Feras Eid, Georgios C. Dogiamis, Valluri R. Rao, Adel A. Elsherbini, Johanna M. Swan, Telesphor Kamgaing, Vijay K. Nair
  • Patent number: 10887439
    Abstract: Embodiments of the invention include a microelectronic device that includes a die having at least one transceiver unit, a redistribution package coupled to the die, and a substrate coupled to the redistribution package. The substrate includes an antenna unit for transmitting and receiving communications at a frequency of approximately 4 GHz or higher.
    Type: Grant
    Filed: December 22, 2015
    Date of Patent: January 5, 2021
    Assignee: Intel Corporation
    Inventors: Telesphor Kamgaing, Georgios C. Dogiamis, Vijay K. Nair
  • Publication number: 20200412858
    Abstract: Embodiments of the invention include a microelectronic device that includes a die having at least one transceiver unit, a redistribution package coupled to the die, and a substrate coupled to the redistribution package. The substrate includes an antenna unit for transmitting and receiving communications at a frequency of approximately 4 GHz or higher.
    Type: Application
    Filed: September 14, 2020
    Publication date: December 31, 2020
    Applicant: Intel Corporation
    Inventors: Georgios Dogiamis, Telesphor Kamgaing, Vijay K. Nair
  • Patent number: 10867961
    Abstract: In one embodiment of the invention, a system in package (SiP) is described which includes a plurality of device components with different form factors embedded within a molding compound layer. A surface for each of the device components is coplanar with a surface of the molding compound layer, and a single redistribution layer (RDL) formed on the coplanar surfaces of the molding compound layer and the plurality of device components. An active device die is electrically bonded to the single RDL directly vertically adjacent the plurality of device components. In an embodiment, the SiP is electrically connected to a circuit board with the active device die between the single RDL and the circuit board. In an embodiment, the SiP is electrically connected to a circuit board with the active device die over the single RDL and the circuit board.
    Type: Grant
    Filed: June 21, 2018
    Date of Patent: December 15, 2020
    Assignee: Intel Corporation
    Inventors: Chuan Hu, Vijay K. Nair
  • Publication number: 20200287520
    Abstract: Hybrid filters and more particularly filters having acoustic wave resonators (AWRs) and lumped component (LC) resonators and packages therefor are described. In an example, a packaged filter includes a package substrate, the package substrate having a first side and a second side, the second side opposite the first side. A first acoustic wave resonator (AWR) device is coupled to the package substrate, the first AWR device comprising a resonator. A plurality of inductors is in the package substrate.
    Type: Application
    Filed: December 28, 2017
    Publication date: September 10, 2020
    Inventors: Telesphor KAMGAING, Feras EID, Georgios C. DOGIAMIS, Vijay K. NAIR, Johanna M. SWAN