Abstract: In described examples, a circuit includes a system bus controller having a first downstream port and is configured to generate a first downstream frame responsive to a first local bus transmission received by a first local bus controller, and to generate a second downstream frame responsive to a second local bus transmission received by a second local bus controller. The system bus controller is configured to generate a downstream aggregate frame responsive to the first downstream frame and the second downstream frame and is configured to initiate transmission of the downstream aggregate frame at the first downstream port. The system bus controller is adapted to receive an upstream aggregate frame that includes a first upstream frame and a second upstream frame and is configured to generate a first upstream transmission responsive to the first upstream frame and to generate the second upstream transmission responsive to the second upstream frame.

Abstract: Aspects of the disclosure provide for a method. In some examples, the method includes receiving a video stream comprising multiple frames, analyzing the video stream to compare data values representing an image pixel at a specified location in a first of the frames to data values representing an image pixel at the specified location in a second of the frames, determining that the video stream is frozen responsive to the data values representing the image pixel at the specified location in the first of the frames being the same as the data values representing the image pixel at the specified location in the second of the frames, and taking action responsive to determining that the video stream is frozen.

Abstract: Aspects of the disclosure provide for a method. In some examples, the method includes receiving a video stream comprising multiple frames, analyzing the video stream to compare data values representing an image pixel at a specified location in a first of the frames to programmed data values for the image pixel at the specified location in the first of the frames, determining that the video stream includes incorrect data responsive to the data values representing the image pixel at the specified location in the first of the frames being different from the programmed data values for the image pixel at the specified location in the first of the frames; and taking action responsive to determining that the video stream includes incorrect data.

Abstract: Aspects of the disclosure provide for a method. In some examples, the method includes receiving a video stream comprising multiple frames, analyzing the video stream to compare data values representing an image pixel at a specified location in a first of the frames to data values representing an image pixel at the specified location in a second of the frames, determining that the video stream is frozen responsive to the data values representing the image pixel at the specified location in the first of the frames being the same as the data values representing the image pixel at the specified location in the second of the frames, and taking action responsive to determining that the video stream is frozen.

Abstract: In described examples, a receiver includes a receiver input adapted to receive input data. A selector is coupled to an output of the receiver and is configured to generate a destination indication at an output of the selector. A switch is coupled to the receiver input. The switch is adapted to generate a first transmission at a switch local output in response to an indication of the selector output and the input data. The switch is further adapted to generate a second transmission at a switch system output in response to the input data. The switch local output is adapted to be coupled to a first destination node, and the switch system output is adapted to be coupled to a second destination node.

Abstract: A driver assistance system includes a first camera, a second camera, a first serial interface circuit, a second serial interface circuit, and a hub interface circuit. The first serial interface circuit is coupled to the first camera. The second serial interface circuit is coupled to the second camera. The hub interface circuit is coupled to the first serial interface circuit and the second serial interface circuit. The hub interface circuit is configured to receive transmissions from the first serial interface circuit and the second serial interface circuit, and to transmit control information to the first serial interface circuit and the second serial interface circuit. The hub interface is also configured to encode a clock signal in the control information.

Abstract: In described examples, a circuit is adapted to receive an input signal at a local port or a first system port. A transceiver is configured to enter a first mode in response to a local wakeup signal and is configured to transmit a system wakeup signal at a second system port in response to the local wakeup signal. A controller is configured to generate the local wakeup signal in response to an energy detected signal. An energy detector is coupled to the first system port and the local port and is configured to generate the energy detected signal in response to a detection of energy of one of the first system input signal and the local input signal received by the transceiver in the second mode.

Abstract: In described examples, a circuit includes a system bus controller having a first downstream port and is configured to generate a first downstream frame responsive to a first local bus transmission received by a first local bus controller, and to generate a second downstream frame responsive to a second local bus transmission received by a second local bus controller. The system bus controller is configured to generate a downstream aggregate frame responsive to the first downstream frame and the second downstream frame and is configured to initiate transmission of the downstream aggregate frame at the first downstream port. The system bus controller is adapted to receive an upstream aggregate frame that includes a first upstream frame and a second upstream frame and is configured to generate a first upstream transmission responsive to the first upstream frame and to generate the second upstream transmission responsive to the second upstream frame.

Abstract: In described examples, a circuit includes a system bus controller having a first downstream port and is configured to generate a first downstream frame responsive to a first local bus transmission received by a first local bus controller, and to generate a second downstream frame responsive to a second local bus transmission received by a second local bus controller. The system bus controller is configured to generate a downstream aggregate frame responsive to the first downstream frame and the second downstream frame and is configured to initiate transmission of the downstream aggregate frame at the first downstream port. The system bus controller is adapted to receive an upstream aggregate frame that includes a first upstream frame and a second upstream frame and is configured to generate a first upstream transmission responsive to the first upstream frame and to generate the second upstream transmission responsive to the second upstream frame.

Abstract: A driver assistance system includes a first camera, a second camera, a first serial interface circuit, a second serial interface circuit, and a hub interface circuit. The first serial interface circuit is coupled to the first camera. The second serial interface circuit is coupled to the second camera. The hub interface circuit is coupled to the first serial interface circuit and the second serial interface circuit. The hub interface circuit is configured to receive transmissions from the first serial interface circuit and the second serial interface circuit, and to transmit control information to the first serial interface circuit and the second serial interface circuit. The hub interface is also configured to encode a clock signal in the control information.

Abstract: In described examples, a receiver includes a receiver input adapted to receive input data. A selector is coupled to an output of the receiver and is configured to generate a destination indication at an output of the selector. A switch is coupled to the receiver input. The switch is adapted to generate a first transmission at a switch local output in response to an indication of the selector output and the input data. The switch is further adapted to generate a second transmission at a switch system output in response to the input data. The switch local output is adapted to be coupled to a first destination node, and the switch system output is adapted to be coupled to a second destination node.

Abstract: In described examples, a receiver includes a receiver input adapted to receive input data. A selector is coupled to an output of the receiver and is configured to generate a destination indication at an output of the selector. A switch is coupled to the receiver input. The switch is adapted to generate a first transmission at a switch local output in response to an indication of the selector output and the input data. The switch is further adapted to generate a second transmission at a switch system output in response to the input data. The switch local output is adapted to be coupled to a first destination node, and the switch system output is adapted to be coupled to a second destination node.

Abstract: In described examples, a receiver includes a receiver input adapted to receive input data. A selector is coupled to an output of the receiver and is configured to generate a destination indication at an output of the selector. A switch is coupled to the receiver input. The switch is adapted to generate a first transmission at a switch local output in response to an indication of the selector output and the input data. The switch is further adapted to generate a second transmission at a switch system output in response to the input data. The switch local output is adapted to be coupled to a first destination node, and the switch system output is adapted to be coupled to a second destination node.

Abstract: In described examples, a circuit is adapted to receive an input signal at a local port or a first system port. A transceiver is configured to enter a first mode in response to a local wakeup signal and is configured to transmit a system wakeup signal at a second system port in response to the local wakeup signal. A controller is configured to generate the local wakeup signal in response to an energy detected signal. An energy detector is coupled to the first system port and the local port and is configured to generate the energy detected signal in response to a detection of energy of one of the first system input signal and the local input signal received by the transceiver in the second mode.

Abstract: In described examples, a circuit includes a system bus controller having a first downstream port and is configured to generate a first downstream frame responsive to a first local bus transmission received by a first local bus controller, and to generate a second downstream frame responsive to a second local bus transmission received by a second local bus controller. The system bus controller is configured to generate a downstream aggregate frame responsive to the first downstream frame and the second downstream frame and is configured to initiate transmission of the downstream aggregate frame at the first downstream port. The system bus controller is adapted to receive an upstream aggregate frame that includes a first upstream frame and a second upstream frame and is configured to generate a first upstream transmission responsive to the first upstream frame and to generate the second upstream transmission responsive to the second upstream frame.

Abstract: A driver assistance system includes a first camera, a second camera, a first serial interface circuit, a second serial interface circuit, and a hub interface circuit. The first serial interface circuit is coupled to the first camera. The second serial interface circuit is coupled to the second camera. The hub interface circuit is coupled to the first serial interface circuit and the second serial interface circuit. The hub interface circuit is configured to receive transmissions from the first serial interface circuit and the second serial interface circuit, and to transmit control information to the first serial interface circuit and the second serial interface circuit. The hub interface is also configured to encode a clock signal in the control information.

Abstract: A cable detector includes one or more peak detectors that detect when a termination impedance is missing from the output of a line driver. A peak detection signal is asserted when signals on a transmission line exceed a threshold level. A fault condition is asserted when the peak detection signal is asserted for a sufficient length of time to indicate that an actual fault is detected. The time period required for detecting a lost or missing line termination is longer than the time periods for any one of the pathological conditions to avoid a false positive detection. After the peak detection signal is de-asserted, the fault condition will be maintained until another sufficient length of time has expired without a peak detection.

Abstract: An analog device under test circuit and a built-in test circuit for testing an AC transfer characteristic of the analog device under test are fabricated on an integrated circuit. The built-in test circuit includes an amplitude detector that detects the amplitude of the output signal of the analog device under test. The test time is reduced by sampling in real-time the DC value corresponding to the amplitude of the analog device under test. An additional reduction in the test time is achieved by using comparators with upper and lower limit reference signals and a pass-fail logic test.

Abstract: A communications cabling front-end architecture that achieves solid echo cancellation and lower noise performance by combining an echo-cancellation circuit and an equalizer function at the same point, at the most front-end of the system.

Abstract: An integrated circuit comprises a pin coupled to receive signals from outside the integrated circuit and an input network. The input network equalizes incoming signals by attenuating lower frequency input signals more than higher frequency input signals received at the pin. The input network is configured to generate a DC bias voltage at an output of the input network in response to an AC coupled input signal or a DC coupled input signal received at the pin with a wide common-mode range.