Patents by Inventor Vijaya Ceekala

Vijaya Ceekala has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090309611
    Abstract: A cable detector includes one or more peak detectors that detect when a termination impedance is missing from the output of a line driver. A peak detection signal is asserted when signals on a transmission line exceed a threshold level. A fault condition is asserted when the peak detection signal is asserted for a sufficient length of time to indicate that an actual fault is detected. The time period required for detecting a lost or missing line termination is longer than the time periods for any one of the pathological conditions to avoid a false positive detection. After the peak detection signal is de-asserted, the fault condition will be maintained until another sufficient length of time has expired without a peak detection.
    Type: Application
    Filed: April 14, 2009
    Publication date: December 17, 2009
    Applicant: National Semiconductor Corporation
    Inventors: Robert Karl Butler, Vijaya Ceekala, Jim Wieser
  • Patent number: 7454647
    Abstract: A skew measurement system and method wherein each of the signals among which the skew is to be determined is connected one at a time to a clock recovery loop. The locked state of the clock recovery loop is used as an indicator of the skew of the data signal relative to the internal clock of the clock recovery loop. By measuring the difference between the locked state of different signals, their relative skew can be measured.
    Type: Grant
    Filed: July 28, 2005
    Date of Patent: November 18, 2008
    Assignee: National Semiconductor Corporation
    Inventors: Varadarajan Devnath, Vijaya Ceekala, James B. Wieser, Lawrence K. Whitcomb
  • Patent number: 7307458
    Abstract: A serial communication interface driver is provided wherein current steering switches are also used to provide termination impedances. The output voltage can be produced by a voltage-dividing current path between two regulated voltages, which provides improved efficiency.
    Type: Grant
    Filed: May 27, 2005
    Date of Patent: December 11, 2007
    Assignee: National Semiconductor Corporation
    Inventors: Alan E. Segervall, Vijaya Ceekala, Varadarajan Devnath, James B. Wieser
  • Patent number: 7208981
    Abstract: A circuit and method are provided for performing built-in test of output signal magnitudes of integrated differential signal generator circuitry. In accordance with one embodiment, first upper and lower reference voltages and second upper and lower reference voltages are received via a plurality of reference electrodes, wherein: a difference between the first and upper and lower reference voltages comprises a first difference magnitude; a difference between the second upper and lower reference voltages comprises a second difference magnitude; and the first difference magnitude is greater than the second difference magnitude. Test signal generator circuitry provides a plurality of binary signals with respective successions of opposing signal states.
    Type: Grant
    Filed: April 20, 2005
    Date of Patent: April 24, 2007
    Assignee: National Semiconductor Corporation
    Inventors: Ramsin M. Ziazadeh, Vijaya Ceekala, Matthew James Webb, James B. Wieser
  • Patent number: 6262603
    Abstract: An RC calibration circuit, which utilizes a resistor and a variable capacitor connected in parallel, reduces power consumption and increases the accuracy of the calibration by comparing the voltage on the resistor to the voltage on the capacitor after a predetermined time has expired since the capacitor began charging up. The result of the comparison, which indicates whether the voltage on the resistor is greater than the voltage on the capacitor, is then used to adjust the capacitance of the capacitor to servo the RC time constant to a predetermined value.
    Type: Grant
    Filed: February 29, 2000
    Date of Patent: July 17, 2001
    Assignee: National Semiconductor Corporation
    Inventors: Jitendra Mohan, Devnath Varadarajan, Vijaya Ceekala
  • Patent number: 6177789
    Abstract: A line driver outputs a pair of transmit signals TX+ and TX− that have substantially reduced output level variations due to variations in process, voltage, and temperature. The reduced output level variations are provided by varying the magnitude of the current that sets up the voltages of the transmit signals in a manner that offsets variations in the power supply voltage, temperature, and process, and by limiting variations of the bandgap current source to process and temperature only.
    Type: Grant
    Filed: January 31, 2000
    Date of Patent: January 23, 2001
    Assignee: National Semiconductor Corporation
    Inventors: Jitendra Mohan, Devnath Varadarajan, Vijaya Ceekala