Patents by Inventor Vijayakumar Dhanasekaran

Vijayakumar Dhanasekaran has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12362717
    Abstract: A transmission line includes an equalization circuit. The equalization circuit is a second-order equalization circuit having a first loop at a gain element and a second loop at the gain element. The first loop may include a first compensation capacitor, and the second loop may include a second compensation capacitor and a resistor. The second order equalization circuit may allow for improved performance with respect to gain as well as reduced power usage.
    Type: Grant
    Filed: November 16, 2022
    Date of Patent: July 15, 2025
    Assignee: QUALCOMM Incorporated
    Inventors: Dongyang Tang, Ramkumar Sivakumar, Khaled Mahmoud Abdelfattah Aly, Vijayakumar Dhanasekaran
  • Patent number: 12348223
    Abstract: An aspect relates to an apparatus including a first pair of switching devices configured to selectively couple an application processor to a Universal Serial Bus (USB) differential data transmission lines; a USB host port connector coupled to the USB differential data transmission lines; a second pair of switching devices configured to selectively couple an audio circuit to the USB differential data transmission lines; and an equalizer including differential terminals coupled to the USB differential data transmission lines, respectively.
    Type: Grant
    Filed: May 18, 2023
    Date of Patent: July 1, 2025
    Assignee: QUALCOMM INCORPORATED
    Inventors: Vijayakumar Dhanasekaran, Khaled Mahmoud Abdelfattah Aly
  • Patent number: 12244138
    Abstract: A differential ESD circuit is provided for protecting a pair of differential terminals of an integrated circuit from electrostatic shock. A first diode couples between a first terminal in the pair of differential terminals and a first resistor that couples to a voltage node of the integrated circuit. Similarly, a second diode couples between a second terminal in the pair of differential terminals and a second resistor that couples to the voltage node of the integrated circuit. The first and second resistors isolate the first and second terminals from a capacitive loading that would otherwise exist from the first and second diodes.
    Type: Grant
    Filed: November 28, 2022
    Date of Patent: March 4, 2025
    Assignee: QUALCOMM Incorporated
    Inventors: Kshitij Yadav, Vijayakumar Dhanasekaran, Khaled Mahmoud Abdelfattah Aly, Ramkumar Sivakumar
  • Patent number: 12047758
    Abstract: An aspect of the disclosure relates to an apparatus, including an audio interface including first and second outputs; a crosstalk cancelling circuit including first and second inputs coupled to the first and second outputs of the audio interface, respectively; a first summer including a first input coupled to the first output of the audio interface and a second input coupled to a first output of the crosstalk cancelling circuit; a second summer including a first input coupled to the second output of the audio interface and a second input coupled to a second output of the crosstalk cancelling circuit; a first digital to analog converter (DAC) including an input coupled to an output of the first summer; and a second DAC including an input coupled to an output of the second summer.
    Type: Grant
    Filed: January 20, 2022
    Date of Patent: July 23, 2024
    Assignee: QUALCOMM INCORPORATED
    Inventor: Vijayakumar Dhanasekaran
  • Publication number: 20240178662
    Abstract: A differential ESD circuit is provided for protecting a pair of differential terminals of an integrated circuit from electrostatic shock. A first diode couples between a first terminal in the pair of differential terminals and a first resistor that couples to a voltage node of the integrated circuit. Similarly, a second diode couples between a second terminal in the pair of differential terminals and a second resistor that couples to the voltage node of the integrated circuit. The first and second resistors isolate the first and second terminals from a capacitive loading that would otherwise exist from the first and second diodes.
    Type: Application
    Filed: November 28, 2022
    Publication date: May 30, 2024
    Inventors: Kshitij YADAV, Vijayakumar DHANASEKARAN, Khaled Mahmoud ABDELFATTAH ALY, Ramkumar SIVAKUMAR
  • Publication number: 20240178663
    Abstract: An ESD trigger circuit is provided for protecting a pass transistor coupled to an integrated circuit terminal. The integrated circuit terminal couples through a diode to a voltage node. In response to an electrostatic shock at the integrated circuit terminal, the diode conducts charge to the voltage node to pulse a voltage of the voltage node. The ESD trigger circuit responds to the pulse of the voltage by coupling the voltage node to a gate of the pass transistor.
    Type: Application
    Filed: November 28, 2022
    Publication date: May 30, 2024
    Inventors: Kshitij YADAV, Vijayakumar DHANASEKARAN, Khaled Mahmoud ABDELFATTAH ALY, Ramkumar SIVAKUMAR, Dongyang TANG, Chienchung YANG
  • Publication number: 20240179465
    Abstract: A wireless device may include a plug that is shared by high speed data, analog audio signals, and power. Switches may be included on wires between the plug and the circuits that provide the high-speed data, analog audio signals and power to isolate those circuits from overvoltage conditions. Linearizer circuits may be included to provide gate driving signals to the switches, e.g., during transmission of analog audio signals. The linearizer circuits may include digital-to-analog converters to apply a gain factor to analog audio signals.
    Type: Application
    Filed: November 30, 2022
    Publication date: May 30, 2024
    Inventors: Chienchung YANG, Khaled Mahmoud ABDELFATTAH ALY, Vijayakumar DHANASEKARAN
  • Publication number: 20240162718
    Abstract: Circuits and methods for suppression of negative transient voltage may be implemented in systems that combine high-speed data, audio, and charging at a plug. The circuits and methods for suppression of the negative transient voltage may include a first diode and transistor coupled in series between a pin and ground, where the transistor is controlled by an output of a voltage comparator that is also coupled to the first pin. A negative transient voltage event may cause the comparator to activate the transistor to sink a current through the diode.
    Type: Application
    Filed: November 14, 2022
    Publication date: May 16, 2024
    Inventors: Vijayakumar DHANASEKARAN, Ramkumar SIVAKUMAR, Kshitij YADAV, Khaled Mahmoud ABDELFATTAH ALY
  • Publication number: 20240162874
    Abstract: A transmission line includes an equalization circuit. The equalization circuit is a second-order equalization circuit having a first loop at a gain element and a second loop at the gain element. The first loop may include a first compensation capacitor, and the second loop may include a second compensation capacitor and a resistor. The second order equalization circuit may allow for improved performance with respect to gain as well as reduced power usage.
    Type: Application
    Filed: November 16, 2022
    Publication date: May 16, 2024
    Inventors: Dongyang TANG, Ramkumar SIVAKUMAR, Khaled Mahmoud ABDELFATTAH ALY, Vijayakumar DHANASEKARAN
  • Patent number: 11848696
    Abstract: An aspect includes an apparatus including a first amplifier; a first field effect transistor (FET) including a first source coupled to an output of the first amplifier, and a first drain for coupling to a first load; and a first gate drive circuit including an input coupled to the output of the first amplifier and an output coupled to a first gate of the first FET. Another aspect includes a method including amplifying a first audio signal using a first audio amplifier to generate a first voltage; generating a first gate voltage based on the first voltage; applying the first gate voltage to a first gate of a first field effect transistor (FET) coupled between the first audio amplifier and a first audio transducer; and applying the first voltage to a first source of the first FET.
    Type: Grant
    Filed: October 26, 2022
    Date of Patent: December 19, 2023
    Assignee: QUALCOMM Incorporated
    Inventors: Kshitij Yadav, Vijayakumar Dhanasekaran
  • Publication number: 20230291402
    Abstract: An aspect relates to an apparatus including a first pair of switching devices configured to selectively couple an application processor to a Universal Serial Bus (USB) differential data transmission lines; a USB host port connector coupled to the USB differential data transmission lines; a second pair of switching devices configured to selectively couple an audio circuit to the USB differential data transmission lines; and an equalizer including differential terminals coupled to the USB differential data transmission lines, respectively.
    Type: Application
    Filed: May 18, 2023
    Publication date: September 14, 2023
    Inventors: Vijayakumar DHANASEKARAN, Khaled Mahmoud ABDELFATTAH ALY
  • Publication number: 20230232155
    Abstract: An aspect of the disclosure relates to an apparatus, including an audio interface including first and second outputs; a crosstalk cancelling circuit including first and second inputs coupled to the first and second outputs of the audio interface, respectively; a first summer including a first input coupled to the first output of the audio interface and a second input coupled to a first output of the crosstalk cancelling circuit; a second summer including a first input coupled to the second output of the audio interface and a second input coupled to a second output of the crosstalk cancelling circuit; a first digital to analog converter (DAC) including an input coupled to an output of the first summer; and a second DAC including an input coupled to an output of the second summer.
    Type: Application
    Filed: January 20, 2022
    Publication date: July 20, 2023
    Inventor: Vijayakumar DHANASEKARAN
  • Patent number: 11689201
    Abstract: An aspect relates to an apparatus including a first pair of switching devices configured to selectively couple an application processor to a Universal Serial Bus (USB) differential data transmission lines; a USB host port connector coupled to the USB differential data transmission lines; a second pair of switching devices configured to selectively couple an audio circuit to the USB differential data transmission lines; and an equalizer including differential terminals coupled to the USB differential data transmission lines, respectively.
    Type: Grant
    Filed: July 26, 2021
    Date of Patent: June 27, 2023
    Assignee: QUALCOMM INCORPORATED
    Inventors: Vijayakumar Dhanasekaran, Khaled Mahmoud Abdelfattah Aly
  • Publication number: 20230049081
    Abstract: An aspect includes an apparatus including a first amplifier; a first field effect transistor (FET) including a first source coupled to an output of the first amplifier, and a first drain for coupling to a first load; and a first gate drive circuit including an input coupled to the output of the first amplifier and an output coupled to a first gate of the first FET. Another aspect includes a method including amplifying a first audio signal using a first audio amplifier to generate a first voltage; generating a first gate voltage based on the first voltage; applying the first gate voltage to a first gate of a first field effect transistor (FET) coupled between the first audio amplifier and a first audio transducer; and applying the first voltage to a first source of the first FET.
    Type: Application
    Filed: October 26, 2022
    Publication date: February 16, 2023
    Inventors: Kshitij YADAV, Vijayakumar DHANASEKARAN
  • Publication number: 20230024172
    Abstract: An aspect relates to an apparatus including a first pair of switching devices configured to selectively couple an application processor to a Universal Serial Bus (USB) differential data transmission lines; a USB host port connector coupled to the USB differential data transmission lines; a second pair of switching devices configured to selectively couple an audio circuit to the USB differential data transmission lines; and an equalizer including differential terminals coupled to the USB differential data transmission lines, respectively.
    Type: Application
    Filed: July 26, 2021
    Publication date: January 26, 2023
    Inventors: Vijayakumar DHANASEKARAN, Khaled Mahmoud ABDELFATTAH ALY
  • Patent number: 11552434
    Abstract: Certain aspects of the present disclosure generally relate to methods and apparatus for providing overvoltage protection for circuitry coupled to connector ports, such as USB-C ports. One example circuit for overvoltage protection between a connector port and a signal node corresponding to the connector port generally includes a first switch having a first terminal for coupling to the connector port and having a second terminal for coupling to the signal node; a first resistive element coupled in parallel with the first switch; a first transient protection circuit coupled between the signal node and a reference potential node; and a control circuit having an input coupled to the signal node and having a first output coupled to a control input of the first switch.
    Type: Grant
    Filed: May 20, 2021
    Date of Patent: January 10, 2023
    Assignee: QUALCOMM Incorporated
    Inventor: Vijayakumar Dhanasekaran
  • Patent number: 11522572
    Abstract: An aspect includes an apparatus including a first amplifier; a first field effect transistor (FET) including a first source coupled to an output of the first amplifier, and a first drain for coupling to a first load; and a first gate drive circuit including an input coupled to the output of the first amplifier and an output coupled to a first gate of the first FET. Another aspect includes a method including amplifying a first audio signal using a first audio amplifier to generate a first voltage; generating a first gate voltage based on the first voltage; applying the first gate voltage to a first gate of a first field effect transistor (FET) coupled between the first audio amplifier and a first audio transducer; and applying the first voltage to a first source of the first FET.
    Type: Grant
    Filed: May 18, 2021
    Date of Patent: December 6, 2022
    Assignee: QUALCOMM INCORPORATED
    Inventors: Kshitij Yadav, Vijayakumar Dhanasekaran
  • Publication number: 20220376730
    Abstract: An aspect includes an apparatus including a first amplifier; a first field effect transistor (FET) including a first source coupled to an output of the first amplifier, and a first drain for coupling to a first load; and a first gate drive circuit including an input coupled to the output of the first amplifier and an output coupled to a first gate of the first FET. Another aspect includes a method including amplifying a first audio signal using a first audio amplifier to generate a first voltage; generating a first gate voltage based on the first voltage; applying the first gate voltage to a first gate of a first field effect transistor (FET) coupled between the first audio amplifier and a first audio transducer; and applying the first voltage to a first source of the first FET.
    Type: Application
    Filed: May 18, 2021
    Publication date: November 24, 2022
    Inventors: Kshitij YADAV, Vijayakumar DHANASEKARAN
  • Patent number: 11424720
    Abstract: A power amplifier provides reduction of click and pop in audio applications. The power amplifier includes a first amplifier and an auxiliary amplifier. The auxiliary amplifier is used to ramp the power amplifier output from ground to an offset voltage to reduce the “click and pop” sound. The first amplifier and the auxiliary amplifier having a shared feedback loop. An output of the first amplifier and an output of the auxiliary amplifier may be switchably coupled to the shared feedback loop. A wave generator controls a switch to couple the first amplifier output or the auxiliary amplifier output to the shared feedback loop.
    Type: Grant
    Filed: March 23, 2020
    Date of Patent: August 23, 2022
    Assignee: QUALCOMM Incorporated
    Inventors: Pradeep Silva, Ramkumar Sivakumar, Qubo Zhou, Xinwang Zhang, Hanil Lee, Dongyang Tang, Vijayakumar Dhanasekaran
  • Patent number: 11348621
    Abstract: An apparatus for power supply mode switching includes a first voltage regulator to output a first voltage, a second voltage regulator to output a second voltage, a third voltage regulator to output a third voltage, an electronic load, a first switch between the first voltage regulator and the electronic load, a second switch between the second voltage regulator and the electronic load, and a third switch between the third voltage regulator and the electronic load. And, a method for power supply mode switching includes supplying power to an electronic load with a first voltage; switching to a second voltage; maintaining coupling of the electronic load with the second voltage while a voltage across the electronic load is less than a reference voltage; and switching to a third voltage when the voltage is greater than or equal to the reference voltage and the third voltage is less than the second voltage.
    Type: Grant
    Filed: August 21, 2020
    Date of Patent: May 31, 2022
    Assignee: QUALCOMM INCORPORATED
    Inventors: Kshitij Yadav, Vijayakumar Dhanasekaran, Yan Wang