Abstract: Various embodiments are directed to a method for protecting an electronic comprising: depositing a first epoxy resin on the electronic component; curing the first epoxy resin to form a first cured epoxy layer, disposing a polyimide film on the first cured epoxy layer to form a polyimide layer, depositing a second epoxy resin on the polyimide layer, and curing the second epoxy resin to form a second cured epoxy layer. The first cured epoxy layer, the polyimide layer, and the second epoxy layer form a multi-layered protective coating that is configured at least in part to protect the electronic component from at least adverse effects from varying light intensities.

Abstract: Example methods, apparatuses, and computer program products for measuring fluid volumes are provided. An example fluid volume measuring assembly includes a first perforated tube, a total fluid volume measuring device, and a non-blood fluid volume measuring device. In some examples, the total fluid volume measuring device includes a membrane sack positioned in the first perforated tube and a first pressure sensor positioned in the membrane sack. In some examples, the non-blood fluid volume measuring device includes a second perforated tube covered by a filter paper and positioned in the first perforated tube and a second pressure sensor positioned in the second perforated tube.

Abstract: Example apparatuses and systems for a combined temperature and pressure sensing device with improved electronic protection are provided. An example apparatus includes a media isolation chamber assembly having a sleeve member and a bellows member, a first circuit board element disposed in the bellows member and encapsulated by insulator media in the bellows member, a pressure sensing element disposed in the bellows member and electrically coupled to the first circuit board element; and a temperature sensing element disposed in the sleeve member and electrically coupled to the first circuit board element.

Abstract: Example methods, apparatuses and systems for a combined temperature and pressure sensing device are provided. An example apparatus includes a media isolation chamber assembly having a sleeve member and a bellows member, a first circuit board element disposed in the bellows member and encapsulated by insulator media in the bellows member, a pressure sensing element disposed in the bellows member and electrically coupled to the first circuit board element; and a temperature sensing element disposed in the sleeve member and electrically coupled to the first circuit board element.

Abstract: Example apparatuses and systems for a combined temperature and pressure sensing device with improved electronic protection are provided. An example apparatus includes a media isolation chamber assembly having a sleeve member and a bellows member, a first circuit board element disposed in the bellows member and encapsulated by insulator media in the bellows member, a pressure sensing element disposed in the bellows member and electrically coupled to the first circuit board element; and a temperature sensing element disposed in the sleeve member and electrically coupled to the first circuit board element.

Abstract: Methods and apparatuses related to freeze resistant sensing assemblies are provided. An example pressure sensing assembly may include: a first member defining an aperture, the aperture comprising an inner opening disposed on an inner surface of the first member and an outer opening disposed on an outer surface of the first member; a protection diaphragm disposed on the inner surface of the first member; and a sensing diaphragm disposed in a second member fastened to the first member.

Abstract: Example methods, apparatuses and systems for a combined temperature and pressure sensing device are provided. An example apparatus includes a media isolation chamber assembly having a sleeve member and a bellows member, a first circuit board element disposed in the bellows member and encapsulated by insulator media in the bellows member, a pressure sensing element disposed in the bellows member and electrically coupled to the first circuit board element; and a temperature sensing element disposed in the sleeve member and electrically coupled to the first circuit board element.

Abstract: Apparatus and associated methods relate to a compact gas sensor (CGS) including a housing with a central stepped cavity with one or more first lead contact(s) forming a portion of a base plane in a bottom of the cavity and one or more second lead contact(s) forming a portion of a stepped plane higher than the base plane, the cavity sized to receive a chemically based stack of material made up of a bottom diffusion electrode layer, a middle electrolyte gel layer, and a top diffusion electrode layer. The bottom diffusion electrode layer is in electrical contact with the first lead contact(s). The top diffusion electrode layer electrically couples to the second lead contact(s) via an overlaying micro electromechanical system (MEMS) element layer with conductive coating. In an illustrative example, the CGS may provide gas sensing in small spaces.

Abstract: Methods and apparatuses related to freeze resistant sensing assemblies are provided. An example pressure sensing assembly may include: a first member defining an aperture, the aperture comprising an inner opening disposed on an inner surface of the first member and an outer opening disposed on an outer surface of the first member; a protection diaphragm disposed on the inner surface of the first member; and a sensing diaphragm disposed in a second member fastened to the first member.

Abstract: Apparatus and associated methods relate to a compact gas sensor (CGS) including a housing with a central stepped cavity with one or more first lead contact(s) forming a portion of a base plane in a bottom of the cavity and one or more second lead contact(s) forming a portion of a stepped plane higher than the base plane, the cavity sized to receive a chemically based stack of material made up of a bottom diffusion electrode layer, a middle electrolyte gel layer, and a top diffusion electrode layer. The bottom diffusion electrode layer is in electrical contact with the first lead contact(s). The top diffusion electrode layer electrically couples to the second lead contact(s) via an overlaying micro electromechanical system (MEMS) element layer with conductive coating. In an illustrative example, the CGS may provide gas sensing in small spaces.

Abstract: Supercritical carbon dioxide may be utilized to remove resistant residues such as those residues left when etching dielectrics in fluorine-based plasma gases. The supercritical carbon dioxide may include an oxidizer in one embodiment.

Abstract: The microelectronic device interconnects are fabricated by a process that utilizes a silicon-based interlayer dielectric material layer, such as carbon-doped oxide, and a chemical mixture selective to materials used in the formation of the interconnects, including, but not limited to, copper, cobalt, tantalum, and/or tantalum nitride, to remove the interlayer dielectric material layer between adjacent interconnects thereby forming air gaps therebetween.

Abstract: Embodiments of the invention include apparatuses and methods relating to air gap interconnect structures having interconnects protected by a sealant. In various embodiments, the sealant includes alumina or silicon nitride. In some embodiments, the interconnect structures include cobalt alloy liners and cobalt shunts to encase a conductive material.

Abstract: An aqueous solution composition may include an organic base hydroxide, potassium hydroxide, a compound selected from the group of compounds consisting of 2-mercaptobenzimidazole, 1-Phenyl-1H-tetrazole-5-thiol and 2-MerCaptoBenzoThiazole, hydrogen peroxide and deionized water. A method for removing photoresist and anti-reflective coating from a wafer using such a solution is also disclosed.

Abstract: A method may comprise assembling a first dielectric ensemble that comprises a first dielectric layer exhibiting a first porosity, a second dielectric layer exhibiting a second porosity and a third dielectric layer exhibiting a third porosity, and fabricating a first metal line in the dielectric ensemble. A chemical may be applied on the third layer to pass through and dissolve a portion of the second layer. The third layer acts to prevent a via that is partially landed on the dielectric from exposing the air gap underneath.

Abstract: Electric fields may be advantageously used in various steps of photolithographic processes. For example, prior to the pre-exposure bake, photoresists that have been spun-on the wafer may be exposed to an electric field to orient aggregates or other components within the unexposed photoresist. By aligning these aggregates or other components with the electric field, line edge roughness may be reduced, for example in connection with 193 nanometer photoresist. Likewise, during exposure, electric fields may be applied through uniquely situated electrodes or using a radio frequency coil. In addition, electric fields may be applied at virtually any point in the photolithography process by depositing a conductive electrode, which is subsequently removed during development. Finally, electric fields may be applied during the developing process to improve line edge roughness.

Abstract: Electric fields may be advantageously used in various steps of photolithographic processes. For example, prior to the pre-exposure bake, photoresists that have been spun-on the wafer may be exposed to an electric field to orient aggregates or other components within the unexposed photoresist. By aligning these aggregates or other components with the electric field, line edge roughness may be reduced, for example in connection with 193 nanometer photoresist. Likewise, during exposure, electric fields may be applied through uniquely situated electrodes or using a radio frequency coil. In addition, electric fields may be applied at virtually any point in the photolithography process by depositing a conductive electrode, which is subsequently removed during development. Finally, electric fields may be applied during the developing process to improve line edge roughness.

Abstract: A method for sealing a porous dielectric layer atop a substrate, wherein the dielectric layer is patterned to form at least a trench and at least a via, comprises applying a first plasma to a surface of the dielectric layer to silanolize the surface, treating the surface of the dielectric layer with a silazane to form a monolayer of silane molecules on the surface, and applying a second plasma to the surface of the dielectric layer to induce a polymerization of at least a portion of the silane molecules. The polymerized silane molecules form a cross-linked matrix that builds over a substantial portion of the surface of the dielectric layer and seals at least some of the exposed pores.

Abstract: The microelectronic device interconnects are fabricated by a process that utilizes a silicon-based interlayer dielectric material layer, such as carbon-doped oxide, and a chemical mixture selective to materials used in the formation of the interconnects, including, but not limited to, copper, cobalt, tantalum, and/or tantalum nitride, to remove the interlayer dielectric material layer between adjacent interconnects thereby forming air gaps therebetween.

Abstract: Embodiments of the invention include apparatuses and methods relating to air gap interconnect structures having interconnects protected by a sealant. In various embodiments, the sealant includes alumina or silicon nitride. In some embodiments, the interconnect structures include cobalt alloy liners and cobalt shunts to encase a conductive material.