Abstract: One embodiment of the invention is a semiconductor system (1400) of arrays (1401, 1402, etc.) of packaged devices. Each array includes a sheet-like substrate (1411, 1412, etc.) made of insulating material integral with conductive horizontal lines and vertical vias, and terminals on the surfaces. Semiconductor components, which may include more than one active or passive chips, or chips of different sizes, are attached to the substrate; the electrical connections may include flip-chip, wire bond, or combination techniques. Encapsulation compound (1412, 1422, etc.), which adheres to the substrate, embeds the connected components. Metal posts (1431, 1432, etc.) traverse the encapsulation compound vertically, connecting the substrate vias with pads on the encapsulation surface. The pads are covered with solder bodies used to connect to the next-level device array so that a 3-dimensional system of packaged devices is formed.

Abstract: Techniques are described for facilitating interactions between computing systems, such as by performing transactions between parties that are automatically authorized via a third-party transaction authorization system. In some situations, the transactions are programmatic transactions involving the use of fee-based Web services by executing application programs, with the transaction authorization system authorizing and/or providing payments in accordance with private authorization instructions previously specified by the parties. The authorization instructions may include predefined instruction rule sets that regulate conditions under which a potential transaction can be authorized, with the instruction rule sets each referenced by an associated reference token.

Abstract: Techniques are described for facilitating interactions between computing systems, such as by performing transactions between parties that are automatically authorized via a third-party transaction authorization system. In some situations, the transactions are programmatic transactions involving the use of fee-based Web services by executing application programs, with the transaction authorization system authorizing and/or providing payments in accordance with private authorization instructions previously specified by the parties. The authorization instructions may include predefined instruction rule sets that regulate conditions under which a potential transaction can be authorized, with the instruction rule sets each referenced by an associated reference token.

Abstract: Techniques are described for facilitating interactions between computing systems, such as by performing transactions between parties that are automatically authorized via a third-party transaction authorization system. In some situations, the transactions are programmatic transactions involving the use of fee-based Web services by executing application programs, with the transaction authorization system authorizing and/or providing payments in accordance with private authorization instructions previously specified by the parties. The authorization instructions may include predefined instruction rule sets that regulate conditions under which a potential transaction can be authorized, with the instruction rule sets each referenced by an associated reference token.

Abstract: Techniques are described for facilitating interactions between computing systems, such as by performing transactions between parties that are automatically authorized via a third-party transaction authorization system. In some situations, the transactions are programmatic transactions involving the use of fee-based Web services by executing application programs, with the transaction authorization system authorizing and/or providing payments in accordance with private authorization instructions previously specified by the parties. The authorization instructions may include predefined instruction rule sets that regulate conditions under which a potential transaction can be authorized, with the instruction rule sets each referenced by an associated reference token.

Abstract: A semiconductor device (100A) with plastic encapsulation compound (102) and metal sheets (103a and 104) on both surfaces, acting as heat spreaders. One or more thermal conductors (103a) of preferably uniform height connect one sheet (103b) and the chip surface (101a); the number of conductors is scalable with the chip size. Each conductor consists of an elongated wire loop (preferably copper) with the wire ends attached to a pad (105), preferably both ends to the same pad. The major loop diameter is approximately normal to the first surface and the loop vertex in contact with the sheet (103b). The substrate (104, preferably a second metal sheet) covers at least portions of the second package surface and is thermally conductively connected to the chip.

Abstract: Techniques are described for facilitating interactions between computing systems, such as via a third-party transaction authorization system that automatically authorizes transactions between parties. In some situations, the transactions are programmatic transactions involving the use of fee-based Web services by executing application programs, with the transaction authorization system authorizing and/or providing payments for transactions between Web service provider and consumer parties in accordance with private authorization instructions previously specified by the parties. The authorization instructions may include predefined instruction rule sets that regulate conditions under which a potential transaction can be authorized, with the instruction rule sets each referenced by an associated reference token.

Abstract: An electronic package comprising a semiconductor device, a heat spreader layer, and a thermal interface material layer located between the semiconductor device and the heat spreader layer. The thermal interface material layer includes a resin layer having heat conductive particles suspended therein. A portion of the particles are exposed on at least one non-planar surface of the resin layer such that the portion of exposed particles occupies a majority of a total area of a horizontal plane of the non-planar surface.

Abstract: A semiconductor device (100A) with plastic encapsulation compound (102) and metal sheets (103a and 104) on both surfaces, acting as heat spreaders. One or more thermal conductors (103a) of preferably uniform height connect one sheet (103b) and the chip surface (101a); the number of conductors is scalable with the chip size. Each conductor consists of an elongated wire loop (preferably copper) with the wire ends attached to a pad (105), preferably both ends to the same pad. The major loop diameter is approximately normal to the first surface and the loop vertex in contact with the sheet (103b). The substrate (104, preferably a second metal sheet) covers at least portions of the second package surface and is thermally conductively connected to the chip.

Abstract: A thin film device, such as an intravascular stent, is disclosed. The device is formed of a seamless expanse of thin-film (i) formed of a sputtered nitinol shape memory alloy, defining, in an austenitic state, an open, interior volume, having a thickness between 0 5-50 microns, having an austenite finish temperature Af below 37° C.; and demonstrating a stress/strain recovery greater than 3% at 37° C. The expanse can be deformed into a substantially compacted configuration in a martensitic state, and assumes, in its austenitic state, a shape defining such open, interior volume. Also disclosed is a sputtering method for forming the device.

Abstract: Techniques are described for facilitating interactions between computing systems, such as by using an authorization system to automatically authorize financial payments between parties in accordance with previously specified private authorization instructions of at least one of the parties. In some situations, some or all of the payments are associated with commerce-related or other transactions, such as transactions initiated by a consumer via the Web to acquire items from a retailer. The authorization instructions may include predefined instruction sets that regulate conditions under which a potential payment can be authorized, with the instruction sets each associated in some situations with a reference. After one or more parties each supply one or more such references or otherwise indicate one or more such instruction sets for use with a potential payment, the authorization system can determine whether to authorize the payment based on whether the instruction sets are compatible or otherwise satisfied.

Abstract: A semiconductor device (100A) with plastic encapsulation compound (102) and metal sheets (103a and 104) on both surfaces, acting as heat spreaders. One or more thermal conductors (103a) of preferably uniform height connect one sheet (103b) and the chip surface (101a); the number of conductors is scalable with the chip size. Each conductor consists of an elongated wire loop (preferably copper) with the wire ends attached to a pad (105), preferably both ends to the same pad. The major loop diameter is approximately normal to the first surface and the loop vertex in contact with the sheet (103b). The substrate (104, preferably a second metal sheet) covers at least portions of the second package surface and is thermally conductively connected to the chip.

Abstract: The high current capabilities of a lateral npn transistor for application as a protection device against degradation due to electrostatic discharge (ESD) events are improved by adjusting the electrical resistivity of the material through which the collector current flows from the avalanching pn-junction to the wafer backside contact. As expressed in terms of the second threshold current improvements by a factor of 4 are reported. Two implant sequences are described which apply local masking and standard implant conditions to achieve the improvements without adding to the total number of process steps. The principle of p-well engineering is extended to ESD protection devices employing SCR-type devices.

Abstract: A semiconductor device contact structure practically eliminating the copper diffusion into the solder as well as the current crowding at the contact with the subsequent electromigration in the solder. A column-like electroplated copper stud (108) is on each contact pad. The stud is sized to provide low, uniform electrical resistance in order to spread the current from the contact to an approximately uniform, low density. Preferably, the stud height (108a) is at least ten times the thickness of the copper interconnect layer (104). Stud (108) is capped by an electroplated nickel layer (109) thick enough (preferably about 2 ?m) to suppress copper diffusion from stud (108) into solder body (120), thus practically inhibiting intermetallic compound formation and Kirkendall voiding.

Abstract: In a method and system for dicing a wafer (220), an ultraviolet (UV) laser (210) is aligned with a street (222) on the wafer (220). A thickness of the wafer (220) is at most 400 times a wavelength of the UV laser (210). When energized, the UV laser (210) generates an adjustable amount of energy in the form of a plurality of laser pulses (212) that are focused on the street (222). The amount of energy provided to the wafer (220) is adjustable in accordance to the thickness. The plurality of laser pulses (212) perform the dicing of the wafer (220) along the street (222) by ablating material from the wafer (220).

Abstract: Techniques are described for facilitating interactions between computing systems, such as by performing transactions between parties that are automatically authorized via a third-party transaction authorization system. In some situations, the transactions are programmatic transactions involving the use of fee-based Web services by executing application programs, with the transaction authorization system authorizing and/or providing payments in accordance with private authorization instructions previously specified by the parties. The authorization instructions may include predefined instruction rule sets that regulate conditions under which a potential transaction can be authorized, with the instruction rule sets each referenced by an associated reference token.

Abstract: Techniques are described for facilitating interactions between computing systems, such as by performing transactions between parties that are automatically authorized via a third-party transaction authorization system. In some situations, the transactions are programmatic transactions involving the use of fee-based Web services by executing application programs, with the transaction authorization system authorizing and/or providing payments in accordance with private authorization instructions previously specified by the parties. The authorization instructions may include predefined instruction rule sets that regulate conditions under which a potential transaction can be authorized, with the instruction rule sets each referenced by an associated reference token.

Abstract: In a method and system for fabricating a semiconductor device (200, 300 or 400), a portion of a metal sheet to form a leadframe (210, 310 or 410) having a lead finger (220, 320 or 430) is removed to form a lead finger lock (260, 360 or 460). The lead finger lock (260, 360 or 460) is disposed within a configurable distance of a wirebonding joint (240, 340 or 440) located on a surface of the lead finger (220, 320 or 430). An integrated circuit (IC) chip (290, 390 or 490) is attached to the leadframe (210, 310 or 410). A conductive pad end (232, 332 or 432) of a bond wire (230, 330 or 430) is bonded to the IC chip (290, 390 or 490) and a lead finger end (234, 334 or 434) of the bond wire is bonded to an inner end (222, 322 or 422) of the lead finger at the wirebonding joint (240, 340 or 440). The IC chip, the leadframe, the lead finger, and the wirebonding are encapsulated with a molding compound (MC) (250, 350 or 450).

Abstract: In a method and system for relieving stress induced within a dielectric layer of a semiconductor device (100), areas in the dielectric layer (236, 238, 242) where the stress exceeds a threshold are identified. The areas, which are in parallel alignment with electrical interconnects such as conductive bumps (130), include a selected number of outer rows of the conductive bumps (130) having a high stress level. Within the identified areas where the stress exceeds the threshold, patterned zones (250) having an adjustable zone density are provided by adding reinforcing elements (240) to relieve the stress below the threshold.

Abstract: The access terminal is configured to wirelessly send to a data system a request that the data system assign an access terminal identifier (ATI) to the access terminal. The access terminal delays transmission of the request until after a user of the access terminal has employed the access terminal to request a packet data service from the data system. In some instances, the data system is an Evolution, Data Only (EV-DO) system and the access terminal identifier (ATI) is a Unicast Access Terminal Identifier (UATI) generated by the Evolution, Data Only (EV-DO) system.