Abstract: A power amplifier controller circuit controls a power amplifier based upon an amplitude correction signal indicating the amplitude difference between the amplitude of the input signal and an attenuated amplitude of the output signal. The power amplifier controller circuit comprises an amplitude control loop and a phase control loop. The amplitude control loop adjusts the supply voltage to the power amplifier based upon the amplitude correction signal. The amplitude correction signal may also be split into two or more signals with different frequency ranges and provided respectively to different types of power supplies with different efficiencies to generate the adjusted supply voltage to the power amplifier. The phase control loop adjusts the phase of the input signal based upon a phase error signal indicating a phase difference between phases of the input signal and the output signal to reduce phase distortion generated by the power amplifier.

Abstract: A radio system includes a radio frequency (RF) integrated circuit (IC), a baseband digital signal processing (DSP) IC, and a serial digital interface coupling data there-between. In one embodiment of the invention, the RF IC has an input receiver to receive a serial digital transmission bit stream from a digital signal processing integrated circuit; a data recoverer coupled to the input receiver to recover digital data bits from the serial digital transmission bit stream; a low pass filter coupled to the data recoverer convert the digital data bits into an analog transmission signal; a mixer coupled to the low pass filter to up-convert the analog transmission signal from a baseband frequency to a second selectable carrier frequency as a transmit radio frequency signal; and an amplifier coupled to the mixer and an antenna, the amplifier to amplify the transmit radio frequency signal for broadcast over the antenna.

Abstract: A radio system includes a radio frequency (RF) integrated circuit (IC) and a baseband digital signal processing (DSP) IC. A serial digital interface couples data between the RF IC and the DSP IC to provide a high data rate and low noise. In one embodiment, the RF IC has a single bit sigma delta modulator to convert an analog signal into a serial digital bit stream, and a differential output driver to drive the serial digital bit stream as a differential data signal. In one embodiment, the DSP IC has a differential input receiver to receive the differential data signal and generate the serial digital bit stream therein, a decimator to lower the data rate of the serial digital bit stream and convert it into parallel digital data samples, and a demodulator to digitally demodulate the parallel digital data samples into data words for digital signal processing.

Abstract: A wireless radio for wireless networking communication systems includes a radio frequency (RF) transceiver integrated circuit (IC) and a baseband digital signal processing (DSP) IC. A bidirectional serial digital interface couples data between the RF transceiver IC and the DSP IC to provide a high data rate and low noise. The bidirectional serial digital interface includes a first serial data connection and a second serial data connection. In one embodiment, the RF transceiver IC has a single bit sigma delta A/D modulator to convert an analog signal into a first serial digital bit stream for communication over the first serial data connection. In one embodiment, the DSP IC has a single bit sigma delta digital modulator to generate a second serial digital bit stream for communication over the second serial data connection.