Abstract: A device is presented. The device includes an electromagnetic guiding device to provide electromagnetic radiation, a reflector that reflects a portion of the electromagnetic radiation to generate a reflected portion of the electromagnetic radiation, wherein the reflector is fully immersed in a multiphase fluid, and a processing subsystem that analyzes the multiphase fluid based upon at least a portion of the reflected portion of the electromagnetic radiation, wherein a principal optical axis of the electromagnetic guiding device substantially aligns with a principal optical axis of the reflector.

Abstract: A holding is presented. The holding device includes a male connector comprising a first male extension and a second male extension that extend out of opposite surfaces of a male central disk, an electromagnetic guiding device continuously passing through a central hole that continuously passes through the first male extension, the male central disk and the second male extension, a reflector that is in a direct physical contact with a first end of the electromagnetic guiding device that ends at a top surface of the first male extension, and a holder that covers the first male extension to hold the reflector, and maintain the physical contact between the first end of the electromagnetic guiding device and the reflector.

Abstract: A gas sensor is disclosed. The gas sensor includes a gas sensing layer, at least one electrode, an adhesion layer, and a response modification layer adjacent to said gas sensing layer and said layer of adhesion. A system having an exhaust system and a gas sensor is also disclosed. A method of fabricating the gas sensor is also disclosed.

Abstract: A method of forming a silicon carbide transient voltage suppressor (TVS) assembly and a system for a transient voltage suppressor (TVS) assembly are provided. The TVS assembly includes a semiconductor die in a mesa structure that includes a first layer of a first wide band gap semiconductor having a conductivity of a first polarity, a second layer of the first or a second wide band gap semiconductor having a conductivity of a second polarity coupled in electrical contact with the first layer wherein the second polarity is different than the first polarity. The TVS assembly also includes a third layer of the first, the second, or a third wide band gap semiconductor having a conductivity of the first polarity coupled in electrical contact with the second layer. The layer having a conductivity of the second polarity is lightly doped relative to the layers having a conductivity of the first polarity.

Abstract: A gas sensor is disclosed. The gas sensor includes a gas sensing layer, at least one electrode, an adhesion layer, and a response modification layer adjacent to said gas sensing layer and said layer of adhesion. A system having an exhaust system and a gas sensor is also disclosed. A method of fabricating the gas sensor is also disclosed.

Abstract: A high accuracy wireless sensing platform assembly comprising a sensor subassembly that is configured to obtain measurement data from a device in response to a measurand; a data transceiver assembly that is configured to communicate with an antenna assembly; a parameter coder, in communication with the sensor subassembly, that is configured to control the data transceiver assembly and/or the sensor subassembly, based on the measurement data; and a resonant circuit that is formed by the data transceiver, the sensor subassembly, and/or the parameter coder. Embodiments are capable of provide robust performance and high accuracy in harsh (e.g., hot environments). The present invention has been described in terms of specific embodiment(s), and it is recognized that equivalents, alternatives, and modifications, aside from those expressly stated, are possible and within the scope of the appending claims.

Abstract: A method of manufacturing a heterostructure device is provided that includes implantation of ions into a portion of a surface of a multi-layer structure. Iodine ions are implanted between a first region and a second region to form a third region. A charge is depleted from the two dimensional electron gas (2DEG) channel in the third region to form a reversibly electrically non-conductive pathway from the first region to the second region. On applying a voltage potential to a gate electrode proximate to the third region allows electrical current to flow from the first region to the second region.

Abstract: An integrated circuit includes a plurality of transistors. Each transistor is associated with a corresponding body terminal. At least one transistor is reverse biased at a first voltage level, and at least one other transistor is reverse biased at a second voltage level that is different from the first voltage level. Each body terminal is electrically isolated from every other body terminal via an isolation barrier. A transistor that is reverse biased at the first voltage level is electrically connected to a transistor that is reverse biased at the second voltage level, such that the electrically connected transistors operate to interact with each other while the respective body voltage levels are different from each other and are changing independently of each other during operation of the integrated circuit.

Abstract: A method of forming a silicon carbide transient voltage suppressor (TVS) assembly and a system for a transient voltage suppressor (TVS) assembly are provided. The TVS assembly includes a semiconductor die in a mesa structure that includes a first layer of a first wide band gap semiconductor having a conductivity of a first polarity, a second layer of the first or a second wide band gap semiconductor having a conductivity of a second polarity coupled in electrical contact with the first layer wherein the second polarity is different than the first polarity. The TVS assembly also includes a third layer of the first, the second, or a third wide band gap semiconductor having a conductivity of the first polarity coupled in electrical contact with the second layer. The layer having a conductivity of the second polarity is lightly doped relative to the layers having a conductivity of the first polarity.

Abstract: A method includes providing a substrate with at least one semiconducting layer. The method also includes forming a plurality of isolation barriers within the at least one semiconducting layer, thereby forming a plurality of device islands. The method further includes inserting a plurality of electronic devices into a portion of the at least one semiconducting layer such that each electronic device is substantially isolated from each other electronic device by the device islands.

Abstract: A method of forming a silicon carbide transient voltage suppressor (TVS) assembly and a system for a transient voltage suppressor (TVS) assembly are provided. The TVS assembly includes a semiconductor die in a mesa structure that includes a first layer of a first wide band gap semiconductor having a conductivity of a first polarity, a second layer of the first or a second wide band gap semiconductor having a conductivity of a second polarity coupled in electrical contact with the first layer wherein the second polarity is different than the first polarity. The TVS assembly also includes a third layer of the first, the second, or a third wide band gap semiconductor having a conductivity of the first polarity coupled in electrical contact with the second layer. The layer having a conductivity of the second polarity is lightly doped relative to the layers having a conductivity of the first polarity.

Abstract: A method of forming a silicon carbide transient voltage suppressor (TVS) assembly and a system for a transient voltage suppressor (TVS) assembly are provided. The TVS assembly includes a semiconductor die in a mesa structure that includes a first layer of a first wide band gap semiconductor having a conductivity of a first polarity, a second layer of the first or a second wide band gap semiconductor having a conductivity of a second polarity coupled in electrical contact with the first layer wherein the second polarity is different than the first polarity. The TVS assembly also includes a third layer of the first, the second, or a third wide band gap semiconductor having a conductivity of the first polarity coupled in electrical contact with the second layer. The layer having a conductivity of the second polarity is lightly doped relative to the layers having a conductivity of the first polarity.

Abstract: A high accuracy wireless sensing platform assembly comprising a sensor subassembly that is configured to obtain measurement data from a device in response to a measurand; a data transceiver assembly that is configured to communicate with an antenna assembly; a parameter coder, in communication with the sensor subassembly, that is configured to control the data transceiver assembly and/or the sensor subassembly, based on the measurement data; and a resonant circuit that is formed by the data transceiver, the sensor subassembly, and/or the parameter coder. Embodiments are capable of provide robust performance and high accuracy in harsh (e.g., hot environments). The present invention has been described in terms of specific embodiment(s), and it is recognized that equivalents, alternatives, and modifications, aside from those expressly stated, are possible and within the scope of the appending claims.

Abstract: A sensor assembly includes an outer housing and at least one high-impedance sensing device positioned within the outer housing. The sensor assembly also includes a buffering circuit comprising at least one wide bandgap semiconductor device positioned within the outer housing. The buffering circuit is operatively coupled to the at least one high-impedance sensing device.

Abstract: A method of manufacturing a heterostructure device is provided that includes implantation of ions into a portion of a surface of a multi-layer structure. Iodine ions are implanted between a first region and a second region to form a third region. A charge is depleted from the two dimensional electron gas (2DEG) channel in the third region to form a reversibly electrically non-conductive pathway from the first region to the second region. On applying a voltage potential to a gate electrode proximate to the third region allows electrical current to flow from the first region to the second region.

Abstract: A method includes providing a wide bandgap semiconductor substrate that includes a first transistor and a second transistor defined thereon. The method also includes coupling the first transistor to the second transistor. The method further includes coupling a bias circuit to the first transistor and the second transistor and forming a junction therebetween. The method also includes coupling the first transistor to a first voltage source and coupling the second transistor to a second voltage source. The first voltage source and the second voltage source are configured to define a predetermined differential input voltage.

Abstract: A method includes providing a substrate with at least one semiconducting layer. The method also includes forming a plurality of isolation barriers within the at least one semiconducting layer, thereby forming a plurality of device islands. The method further includes inserting a plurality of electronic devices into a portion of the at least one semiconducting layer such that each electronic device is substantially isolated from each other electronic device by the device islands.

Abstract: An apparatus includes a set of first metal contact pads disposed on a low temperature co-fired ceramic substrate. A plurality of metalized interconnectors extend between a digital electronic component and the low temperature co-fired ceramic substrate. The apparatus is configured to operate at a temperature greater than 250 degrees Celsius.

Abstract: A heterostructure device includes a semiconductor multi-layer structure that has a first region, a second region and a third region. The first region is coupled to a source electrode and the second region is coupled to a drain electrode. The third region is disposed between the first region and the second region. The third region provides a switchable electrically conductive pathway from the source electrode to the drain electrode. The third region includes iodine ions. A system includes a heterostructure field effect transistor that includes the device.

Abstract: There is provided a method for dimension profiling of a semiconductor device. The method involves incorporating a feature comprising a detectable element into the device, and thereafter detecting the detectable element to determine a dimension of the feature. This information can be used for the determination of a dimension of buried channels, and also for end-point detection of CMP processes.