Abstract: A synchronization burst processor (56) used in a processing satellite (12) in a satellite based communications system (10) is provided with a sync burst memory (72), a first double correlator (74), a second double correlator (76) and a modulus module (78). The sync burst memory (72) stores at least one sync burst (52) transmitted from a terrestrial terminal (14) to the processing satellite (12) where the sync burst (52) is formed from a quadrature pair sample set {p, q}. The first double correlator (74) performs an early correlation and a late correlation of the p samples relative to a sync burst slot (50) to generate an early correlation Pe and a late correlation Pl. The second double correlator (76) performs an early correlation and a late correlation of the q samples relative to the sync burst slot (50) to generate an early correlation Qe and a late correlation Ql.

Abstract: The invention is a digital channelizer and a process for dividing an input bandwidth into at least some of N channels. A digital channelizer which divides an input bandwidth into at least some of N channels in accordance with the invention includes an analog to digital converter (14); a demultiplexer (16), coupled to the analog to digital converter, a window presum (102) having N outputs, coupled to the parallel data streams, each output being a function of a window presum function and data words from a plurality of the parallel data streams; and a cyclic shift (24′), coupled to I output groups of data words.

Abstract: The invention is an apparatus and process for performing a discrete Fourier transform and a digital channelizer which divides an input bandwidth into at least some of N channels. An apparatus for performing a discrete Fourier transform in accordance with the invention includes at least one discrete Fourier transform computation stage (304, 305′, 402, 410, 412, 414, 419), the at least one discrete Fourier transform computation stage having N inputs representing preselected frequency bands with each input containing an input signal containing real data and P actual outputs each containing an output signal, P being less than N, at least one of the P actual output signals containing a conjugate of one of the N input frequency bands; and a processing device (602, 702), coupled to at least one P actual output containing a signal which is a conjugate, which processes the conjugate as representative of one of the N input frequency bands.

Abstract: The invention is a digital channelizer and a process for dividing an input bandwidth into at least some of N channels. A digital channelizer which divides an input bandwidth into at least some of N channels in accordance with the invention includes a window presum (102); a cyclic shift (24′), coupled to the I output groups of date words, having I cyclic shift paths, each cyclic shift path being responsive to a different output group of data words to produce I output groups of data words, each cyclic shift path comprising a plurality of word shifting elements each responsive to a group of data words; and a discrete Fourier transform (26′) coupled to the I output groups of cyclically shifted data words outputted from the cyclic shift.

Abstract: A digital channelizer and a process for dividing input bandwidth into at least some of N channels are disclosed. The digital channelizer which divides an input bandwidth into at least some of N channels in accordance with the invention includes an analog to digital converter (14), a demodulator (16) coupled to the analog to digital converter, a window presum (102) coupled to the parallel streams of data words and a discrete Fourier transform apparatus (26′), coupled to the N outputs of the window presum, having N inputs and which performs a discrete Fourier transform on the N inputs to output at least some of the N channels.

Abstract: The invention is a demodulator (50, 100) and a method of data reception and testing of a demodulator. A demodulator in accordance with the invention includes an input signal source (52, 102) having an output which during data reception is a data signal and which during testing of the demodulator is a reference signal; a tuner (54, 101) having a tuner input coupled to the output of the input signal source and a tuner output, the tuner including a frequency converter (20, 36) which frequency shifts the data signal to a lower carrier frequency during data reception to cause the tuner to output at the tuner output the lower carrier frequency modulated with the data signal and which upwardly frequency shifts the reference signal to a test carrier frequency during the testing; and a test data source (56, 105) which applies a test data signal to the tuner during the testing to cause the tuner to output at the tuner output the test carrier frequency modulated with the test data signal.

Abstract: A system and method for frequency dehopping of spread spectrum communication signals includes a downconverter having two mixer stages, each mixer stage providing coarse frequency dehopping. The local oscillator injection frequency of each mixer stage is selectable by way of a plurality of relatively easily generated tones. The output of the second mixer stage is sampled by an analog-to-digital converter to enable fine tuning dehopping to be performed in the digital domain and subsequently demodulated in a demodulator circuit.