Patents by Inventor Vincent PIERRE

Vincent PIERRE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200007374
    Abstract: A method including receiving a data subframe having a plurality of symbols, determining a location of invalid pseudo time-domain samples in the data subframe, and discarding invalid pseudo time domain samples and recovering valid pseudo time domain samples to produce an updated data subframe, and processing the updated data subframe to produce demodulated data.
    Type: Application
    Filed: June 25, 2019
    Publication date: January 2, 2020
    Inventor: Vincent Pierre Martinez
  • Publication number: 20190334919
    Abstract: One feature pertains to a device that includes memory circuits having resource groups and access control circuitry. The access control circuitry establishes a tiered resource group access control scheme where security and access control properties of each resource group are managed by at least one of a hard governor execution environment or at least one soft governor execution environment. The access control circuitry also enforces access permissions of each resource group set by at least one of the hard governor execution environment or the at least one soft governor execution environment of each resource group.
    Type: Application
    Filed: April 27, 2018
    Publication date: October 31, 2019
    Inventor: Vincent Pierre LE ROY
  • Publication number: 20190278914
    Abstract: Techniques for providing data protection in an integrated circuit are provided. An example method according to these techniques includes determining that an unauthorized update has been made to software or firmware associated with the integrated circuit, and corrupting an anti-replay counter (ARC) value, maintained in a one-time programmable memory of the integrated circuit and used by the integrated circuit to protect contents of a non-volatile memory, responsive to determining that the unauthorized update has been made to the software or the firmware.
    Type: Application
    Filed: March 7, 2019
    Publication date: September 12, 2019
    Inventors: Vincent Pierre LE ROY, Baranidharan MUTHUKUMARAN, David TAMAGNO
  • Patent number: 10338996
    Abstract: A pipelined decoder for storaging of soft bits and hard bits associated with code blocks of a transmission. The proposed circuit reduces the amount of memory needed at the receiver level for soft bits and hard bits, in a pipelined decoder. Namely, with the solution of the subject application, both the LLRs and hard bits associated with a given code block are available when the CRC value is determined. Hence, the effect obtained non-pipelined decoder is achieved by the pipelined decoder of the subject application. A receiver for a wireless communication system, a method and a computer program are also disclosed.
    Type: Grant
    Filed: June 29, 2015
    Date of Patent: July 2, 2019
    Assignee: NXP USA, Inc.
    Inventors: Vincent Pierre Martinez, Volker Dietmar Wahl
  • Publication number: 20190192430
    Abstract: The present invention relates to gelling compositions, which changes from liquid state to gel state in function of temperature comprising: at least a poloxamer or mixture of poloxamers; at least a gelling agent; and at least an anticancer agent. Said compositions are advantageously used for local administration of an anticancer agent. Said compositions are useful for size-reduction of a tumour before surgical removal of said tumour, for preventing tumour recurrence after surgical removal of a tumour, and/or treating small tumours. They are therefore useful for the treatment of cancer, preferably a cancer of a wall of the digestive system or a gynaecologic cancer. The present invention also relates to a method for preparing said gelling compositions.
    Type: Application
    Filed: September 16, 2016
    Publication date: June 27, 2019
    Applicants: Centre National de la Recherche Scientifique (CNRS), Universite Paris Descartes, Assistance Publique-Hopitaux de Paris, Ecole Nationale Superieure de Chimie de Paris, Institut National de la Sante et de la Recherche Medicale (INSERM)
    Inventors: Nathalie Mignet, Vincent Pierre-Marie Boudy, Johanne Seguin, Daniel Scherman, Yoran Beldengrun
  • Patent number: 10284410
    Abstract: Aspects of the present disclosure are directed to processing signals received from different sources, such as may be relevant to receiving signals having respective time-offsets based upon a distance via which the respective signals travel, and/or due to an oscillator clock mismatch. As may be implemented in accordance with one or more embodiments, respective fast Fourier transform (FFT) series are generated for symbols in respective ones of communications received in parallel. For each message that the receiver is trying to decode, channel estimation is performed on the respective FFT series, and one of the FFT series is selected based upon metrics indicative of interference in the respective FFT series, for that particular message. A decoding timing window is set based on the selected FFT series, and the selected FFT series is decoded.
    Type: Grant
    Filed: August 28, 2018
    Date of Patent: May 7, 2019
    Assignee: NXP B.V.
    Inventor: Vincent Pierre Martinez
  • Patent number: 10243596
    Abstract: A radio frequency (RF) transceiver includes a transmitter portion configured to transmit RF signals at an output of a power amplifier (PA). A receiver portion has an input coupled to the output of the PA. The receiver portion includes a switch coupled to feedback first baseband signals to the transmitter portion during a feedback mode. The first baseband signals are based on the first RF signals received at the input of the receiver portion. A pre-distortion processing unit is coupled to receive the first baseband signals. In turn, the distortion processing unit provides pre-distortion feedback signals to the transmitter portion.
    Type: Grant
    Filed: January 11, 2018
    Date of Patent: March 26, 2019
    Assignee: NXP USA, INC.
    Inventors: Samuel Kerhuel, Wim Joseph Rouwet, Vincent Pierre Martinez
  • Patent number: 10217498
    Abstract: Techniques for preventing tampering with programmable read-only memory of an integrated circuit are provided. A method according to these techniques includes performing a randomized read of data stored in the programmable read-only memory based on an input from an entropy source, writing the data to one or more registers of the integrated circuit, and initializing one or more components of the integrated circuit using the data stored in the one or more registers.
    Type: Grant
    Filed: September 12, 2016
    Date of Patent: February 26, 2019
    Assignee: QUALCOMM Incorporated
    Inventors: Vincent Pierre Le Roy, Bhadri Kubendran
  • Patent number: 10210116
    Abstract: In certain aspects of the disclosure, an apparatus includes first and second semaphore registers disposed in a first power domain. A common address bus is coupled to the first and second semaphore registers, and a semaphore lock is disposed in the first power domain and coupled to the first and second semaphore registers. The semaphore lock is controlled by the first and second semaphore registers, and controls whether a signal from a second power domain is permitted to propagate to the first power domain. The first and second semaphore registers may be associated with first and second register addresses, respectively, which are selected to provide a substantially maximized Hamming distance between them. The first and second semaphore registers may have a write order expectation enforced between them.
    Type: Grant
    Filed: April 27, 2017
    Date of Patent: February 19, 2019
    Assignee: QUALCOMM Incorporated
    Inventors: Michael Kevin Batenburg, Vincent Pierre Le Roy, Praveen Kumar Origanti
  • Publication number: 20180331871
    Abstract: A downlink cellular communication signal processing method includes storing resource elements from multiple resource element sequences into multiple sets of consecutive data bins of a composite signal input grid that also includes guard band bins between the sets of data bins. A frequency-domain to time-domain transformation of all values within the composite signal input grid is performed to produce a sequence of time-domain samples (e.g., a portion of an OFDM symbol). The transformation has a number of points equal to or greater than the number of bins in the multiple sets of data bins and the guard band bins. An uplink processing method includes performing a time-domain to frequency-domain transformation on a sequence of time-domain samples to produce resource elements in multiple sets of consecutive data bins of a composite signal output grid that also includes guard band bins between the sets of data bins.
    Type: Application
    Filed: May 14, 2018
    Publication date: November 15, 2018
    Inventor: Vincent Pierre MARTINEZ
  • Patent number: 10127405
    Abstract: Techniques for maintaining an anti-replay counter (ARC) for providing data protection in an integrated circuit are provided. A method according to these techniques includes determining a static baseline value based on an ARC value stored in a programmable read-only memory of the integrated circuit, determining the ARC value based on the static baseline value and a transient component, and storing the ARC value in a volatile memory of the integrated circuit.
    Type: Grant
    Filed: June 13, 2016
    Date of Patent: November 13, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: Vincent Pierre Le Roy, Olivier Jean Benoit
  • Patent number: 10126960
    Abstract: Techniques for providing data protection in an integrated circuit are provided. A method according to these techniques includes maintaining an anti-replay counter value in a volatile memory of the integrated circuit, the anti-replay counter value being associated with data stored in an off-chip, non-volatile memory in which the integrated circuit is configured to store the data, monitoring an external power source, and writing the anti-replay counter value to a programmable read-only memory of the integrated circuit responsive to a loss of power to the integrated circuit from the external power source.
    Type: Grant
    Filed: June 13, 2016
    Date of Patent: November 13, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: Olivier Jean Benoit, Vincent Pierre Le Roy
  • Publication number: 20180314786
    Abstract: A method of non-destructive checking of a component for aeronautics, the method including the following steps of acquiring a volume by tomographic imaging, of generating by computer simulation a surface corresponding to the component to be analyzed, of registering the volume and the surface by optimizing a similarity criterion defined by a function taking into account the correlation between normal vectors of a field of normal vectors of the surface displaced by transformation and a gradient of a gradient field of the volume, the optimization being performed as a function of transformations for determining the optimal transformation which maximizes the similarity criterion, of storing the optimal transformation, of establishing the correspondence between the surface and the volume obtained with the aid of the optimal transformation.
    Type: Application
    Filed: November 24, 2016
    Publication date: November 1, 2018
    Applicant: SAFRAN
    Inventors: Yann LE GUILLOUX, Benoit Vincent Pierre LASJAUNIAS, Vincent Jerome MORARD, Estelle PARRA
  • Publication number: 20180316180
    Abstract: In certain aspects of the disclosure, a chip includes an isolation device, wherein the isolation device is configured to allow a signal to pass from a first circuit in a first power domain to a second circuit in a second power domain via a signal line that crosses between the first and second power domains when the isolation device is disabled, and to clamp a portion of the signal line in the second power domain to a logic state when the isolation device is enabled. The chip also includes a failure detector configured to detect an imminent power failure of at least one of the first power domain or the second power domain, and to enable the isolation device in response to detection of the imminent power failure.
    Type: Application
    Filed: April 27, 2017
    Publication date: November 1, 2018
    Inventors: Michael Kevin Batenburg, Vincent Pierre Le Roy, Praveen Kumar Origanti
  • Publication number: 20180314659
    Abstract: In certain aspects of the disclosure, an apparatus includes first and second semaphore registers disposed in a first power domain. A common address bus is coupled to the first and second semaphore registers, and a semaphore lock is disposed in the first power domain and coupled to the first and second semaphore registers. The semaphore lock is controlled by the first and second semaphore registers, and controls whether a signal from a second power domain is permitted to propagate to the first power domain. The first and second semaphore registers may be associated with first and second register addresses, respectively, which are selected to provide a substantially maximized Hamming distance between them. The first and second semaphore registers may have a write order expectation enforced between them.
    Type: Application
    Filed: April 27, 2017
    Publication date: November 1, 2018
    Inventors: Michael Kevin BATENBURG, Vincent Pierre LE ROY, Praveen Kumar ORIGANTI
  • Publication number: 20180291838
    Abstract: The present disclosure relates to a hydraulic control system for a thrust reverser of an aircraft turbofan nacelle. The hydraulic control system includes devices for actuating and controlling the reverser having hydraulic locks and cylinders, the corresponding hydraulic solenoid valves, and sensors. The turbofan includes a full-authority electronic computer or aircraft having an avionics computer that gives reverse thrust commands. The system further includes an electronic concentration module, different from the computer, which concentrates the data relating to the operation of the reverser actuation and control devices. The module includes internal contact switches for controlling the solenoid valves, a device for monitoring the sensors, a device for analog or digital processing of the data, and a bus for communication with the computer.
    Type: Application
    Filed: June 14, 2018
    Publication date: October 11, 2018
    Applicant: Safran Nacelles
    Inventor: Vincent Pierre Germain LE COQ
  • Patent number: 10079323
    Abstract: The invention pertains to a framing structure for a solar panel made from a polymer composition (C) comprising at least one polyamide polymer [polyamide (A)], and at least one reinforcing filler [filler (F)], the framing structure being characterized by having a top surface and a bottom surface, said top surface having a depressed central portion sized for receiving a solar panel. It also relates to a method for manufacturing the same, to a method for assembly a solar panel into said framing structure, to a solar panel assembly comprising the same, and to a method for fixing said solar panel assembly onto a support (e.g. a roof).
    Type: Grant
    Filed: February 22, 2013
    Date of Patent: September 18, 2018
    Assignee: SOLVAY SPECIALTY POLYMERS USA, LLC.
    Inventors: Vincent Pierre Meunier, Jeffrey A. Hrivnak, Glenn P. Desio, Philippe Brasseur
  • Publication number: 20180075888
    Abstract: Techniques for preventing tampering with programmable read-only memory of an integrated circuit are provided. A method according to these techniques includes performing a randomized read of data stored in the programmable read-only memory based on an input from an entropy source, writing the data to one or more registers of the integrated circuit, and initializing one or more components of the integrated circuit using the data stored in the one or more registers.
    Type: Application
    Filed: September 12, 2016
    Publication date: March 15, 2018
    Inventors: Vincent Pierre Le Roy, Bhadri Kubendran
  • Patent number: 9897019
    Abstract: An engine includes at least one spark plug, an ignition advance management device to determine and to apply an optimum ignition advance of the spark plug, and an exhaust gas recirculation device equipped with a gas recirculation control valve. A control device for the internal combustion engine includes a first actuator to force opening and closing of the control valve, a map in which are stored theoretical ignition advance values as a function of engine speed and engine load, a first calculator to calculate a diagnostic criterion as a function of the theoretical ignition advance determined from the map and the optimum ignition advance, and a comparator to compare the diagnostic criterion to a control valve failure threshold.
    Type: Grant
    Filed: November 14, 2014
    Date of Patent: February 20, 2018
    Assignee: RENAULT S.A.S.
    Inventors: Vincent-Pierre Avons, Cedric Harter
  • Patent number: 9900141
    Abstract: A receiving apparatus for SNR estimation of a signal such as the LTE PUCCH, transmitted over a channel of an OFDM wireless communication system. The proposed apparatus brings determines the noise power level in the frequency domain based on a noise covariance matrix where timing errors are back compensated in the equation since timing error is expressed a complex exponential therein. Contrary to the common methods used for determining the noise power level, in the present invention deriving the channel estimate components from the pilot symbol(s) comprised in the received signal is not required. Based on the present invention, user's transmit power is reduced thereby improving battery power longevity. Further, since interference is reduced, more users may be multiplexed together in the same resources. A method and a computer program product are also claimed.
    Type: Grant
    Filed: August 31, 2015
    Date of Patent: February 20, 2018
    Assignee: NXP USA, Inc.
    Inventors: Samuel Kerhuel, Vincent Pierre Martinez