Patents by Inventor Vineet Kahlon
Vineet Kahlon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20120079483Abstract: Method provides a fully automatic lock insertion procedure to enforce critical sections that guarantees deadlock freedom and tries to minimize the lengths of the resulting critical sections. Method encapsulates regions of code meant to be executed atomically in a critical section induced by a pair of lock unlock statements and enlarges the critical section of the first thread by propagating the newly introduced lock statement backwards till it no longer participates in a deadlock. If the newly introduced lock statement participates in a deadlock, the process terminates. If lock statement of the second thread participates in a deadlock the method enlarges the critical section of the second thread by propagating the newly introduced lock statement backwards until it no longer participates in a deadlock.Type: ApplicationFiled: September 28, 2011Publication date: March 29, 2012Applicant: NEC LABORATORIES AMERICA, INC.Inventor: Vineet Kahlon
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Patent number: 8141049Abstract: A system and method for pointer analysis for computer program verification includes forming a subset or cluster of pointers from pointers in a program by applying increasingly accurate alias analyses in a cascaded fashion such that each analysis works on a subset of pointers generated by a previous analysis's results. Aliases are computed for any pointer by computing aliases in the subsets in parallel instead of an entire program. For carrying out context and flow-sensitive alias analysis, function summaries are computed on small subsets in a top-down manner based on the points-to hierarchy which reduces the sizes of the summaries.Type: GrantFiled: February 14, 2008Date of Patent: March 20, 2012Assignee: NEC Laboratories America, Inc.Inventor: Vineet Kahlon
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Patent number: 8136098Abstract: A static, inter-procedural dataflow analysis is used to debug multi-threaded programs which heretofore have been thought unsuitable for concurrent multi-threaded analysis.Type: GrantFiled: July 12, 2007Date of Patent: March 13, 2012Assignee: NEC Laboratories America, Inc.Inventors: Vineet Kahlon, Aarti Gupta
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Publication number: 20110276969Abstract: A system and method are disclosed for removing locks from a concurrent program. A set of behaviors associated with a concurrent program are modeled as causality constraints. The causality constraints which preserve the behaviors of the concurrent program are identified. Having identified the behavior preserving causality constraints, the corresponding lock and unlock statements in the concurrent program are identified which enforce the identified causality constraints. All identified lock and unlock statements are retained, while all other lock and unlock statements are discarded.Type: ApplicationFiled: January 18, 2011Publication date: November 10, 2011Applicant: NEC Laboratories America, Inc.Inventors: VINEET KAHLON, Chao Wang
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Publication number: 20110167412Abstract: A system and method for predictive analysis includes generating an execution trace on an instrumented version of source code for a multithreaded computer program. Interleavings which potentially lead to a violation in the program are statically generated by performing a static predictive analysis using a Universal Causality Graph (UCG) to generate alternative interleavings that might lead to an error. The UCG includes a unified happens-before model for the concurrent program and a property being analyzed. The interleavings are symbolically checked to determine errors in the program.Type: ApplicationFiled: October 19, 2010Publication date: July 7, 2011Applicant: NEC Laboratories America, Inc.Inventors: Vineet Kahlon, Chao Wang
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Publication number: 20110010693Abstract: A system and method for model checking of concurrent multi-threaded programs with bounded lock chains includes analyzing individual program threads in a concurrent multi-threaded program to determine sets of reachable states and lock access patterns for bounded lock chains by tracking sets of states reachable from a given set of states and tracking lock acquisitions and releases by maintaining a bi-directional lock causality graph. Analysis results from multiple threads are combined using an acceptance condition of the lock causality graph to determine whether there is a violation of a correctness property in the concurrent multi-threaded program.Type: ApplicationFiled: April 2, 2010Publication date: January 13, 2011Applicant: NEC Laboratories America, Inc.Inventor: Vineet Kahlon
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Publication number: 20100235817Abstract: A system and method for analyzing a concurrent program employ asynchronous function calls for communication and recursion. A control flow graph is constructed based on a context-sensitive pointer analysis, whereupon encountering a function pointer, a points-to set of the function pointer is computed in a context-sensitive fashion to determine a set of potential function calls. The context-sensitive pointer analysis is terminated when no new potential function calls are encountered and where the potential function calls may contribute new data races other than those that exist in the contexts traversed thus far. To decide this, a characterization of pointer aliasing based upon complete update sequences is employed. A set of contexts that may contribute to different data races are enumerated by tracking update sequences for function and lock pointers and pointers that are shared or point to shared memory locations. Data race detection is carried out on the control flow graph.Type: ApplicationFiled: February 8, 2010Publication date: September 16, 2010Applicant: NEC Laboratories America, Inc.Inventors: VINEET KAHLON, Nishant Sinha, Yun Zhang, Eric J. Kruus
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Patent number: 7784035Abstract: A method for the static analysis of concurrent multi-threaded software which bypasses the state explosion situation that plagues the prior art, thereby making our method scalable while—at the same time—producing no loss in precision. Our inventive method maintains patterns of lock acquisition and lock release by individual threads by constructing augmented versions of the threads. Once the augmented versions have been constructed, our inventive method verifies the concurrent program using existing tools for the verification of sequential programs—thereby greatly reducing implementation overhead. Finally, our inventive augmentation and method is carried out in an automatic manner—without requiring user intervention.Type: GrantFiled: July 5, 2005Date of Patent: August 24, 2010Assignee: NEC Laboratories America, Inc.Inventors: Vineet Kahlon, Aarti Gupta
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Patent number: 7783470Abstract: A system and method for computing dataflow in concurrent programs of a computer system, like device drivers which control computer hardware like disk drives, audio speakers, etc., includes, given a concurrent program that includes many similar components, initializing a set of reachable control states for interaction between concurrent programs. Based on the set of reachable control states, synchronization constructs are removed between the control states. The synchronization constructs are replaced with internal transitions. New reachable control states uncovered by the removal of the synchronization constructs are added where the new reachable control states are discovered using model checking for single threads. Data race freedom of the plurality of concurrent programs is verified by reviewing a complete set of reachable control states.Type: GrantFiled: October 4, 2007Date of Patent: August 24, 2010Assignee: NEC Laboratories America, Inc.Inventor: Vineet Kahlon
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Publication number: 20100070955Abstract: A computer-implemented pointer alias-analysis for concurrent software programs utilizing a divide-and-conquer approach, transaction level summarization and parallelization.Type: ApplicationFiled: July 8, 2009Publication date: March 18, 2010Applicant: NEC LABORATORIES AMERICAInventor: Vineet Kahlon
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Publication number: 20090204968Abstract: A system and method for analyzing concurrent programs that guarantees optimality in the number of thread inter-leavings to be explored. Optimality is ensured by globally constraining the inter-leavings of the local operations of its threads so that only quasi-monotonic sequences of threads operations are explored. For efficiency, a SAT/SMT solver is used to explore the quasi-monotonic computations of the given concurrent program. Constraints are added dynamically during exploration of the concurrent program via a SAT/SMT solver to ensure quasi-montonicity for model checking.Type: ApplicationFiled: February 6, 2009Publication date: August 13, 2009Applicant: NEC Laboratories America, Inc.Inventors: Vineet Kahlon, Chao Wang, Aarti Gupta
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Publication number: 20090193417Abstract: A system and method for dataflow analysis includes inputting a concurrent program comprised of threads communicating via synchronization primitives and shared variables. Synchronization constraints imposed by the primitives are captured as an intersection problem for bounded languages. A transaction graph is constructed to perform dataflow analysis. The concurrent program is updated in accordance with the dataflow analysis.Type: ApplicationFiled: January 15, 2009Publication date: July 30, 2009Applicant: NEC LABORATORIES AMERICA, INC.Inventor: Vineet Kahlon
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Publication number: 20090193416Abstract: A system and method for deciding reachability includes inputting a concurrent program having threads interacting via locks for analysis. Bounds on lengths of paths that need to be explored are computed to decide reachability for lock patterns by assuming bounded lock chains. Reachability is determined for a pair of locations using a bounded model checker. The program is updated in accordance with the reachability determination.Type: ApplicationFiled: January 15, 2009Publication date: July 30, 2009Applicant: NEC LABORATORIES AMERICA, INC.Inventor: Vineet Kahlon
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Publication number: 20090125887Abstract: A system and method for program verification includes generating a product transaction graph for a concurrent program, which captures warnings for potential errors. The warnings are filtered to remove bogus warnings, by using constraints from synchronization primitives and invariants that are derived by performing one or more dataflow analysis methods for concurrent programs. The dataflow analysis methods are applied in order of overhead expense. Concrete execution traces are generated for remaining warnings using model checking.Type: ApplicationFiled: September 30, 2008Publication date: May 14, 2009Applicant: NEC LABORATORIES AMERICA, INC.Inventors: Vineet Kahlon, Sriram Sankarnarayanan, Aarti Gupta
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Publication number: 20090089783Abstract: A system and method for conducting symbolic partial order reduction for concurrent systems includes determining a guarded independence relation which includes transitions from different threads that are independent for a set of states, when a condition or predicate holds. Partial order reduction is performed using the guarded independence relation to permit automatic pruning of redundant thread interleavings when the guarded independence condition holds.Type: ApplicationFiled: July 29, 2008Publication date: April 2, 2009Applicant: NEC LABORATORIES AMERICA, INC.Inventors: Chao Wang, Zijiang Yang, Vineet Kahlon, Aarti Gupta
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Publication number: 20080282221Abstract: A system and method for program verification by model checking in concurrent programs includes modeling each of a plurality of program threads as a circuit model, and generating a full circuit for an entire program by combining the circuit models including constraints which enforce synchronous execution of the program threads. The program is verified using the synchronous execution to reduce an amount of memory needed to verify the program and a number of steps taken to uncover an error.Type: ApplicationFiled: March 25, 2008Publication date: November 13, 2008Applicant: NEC LABORATORIES AMERICA, INC.Inventors: VINEET KAHLON, AARTI GUPTA
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Publication number: 20080229286Abstract: A system and method for pointer analysis for computer program verification includes forming a subset or cluster of pointers from pointers in a program by applying increasingly accurate alias analyses in a cascaded fashion such that each analysis works on a subset of pointers generated by a previous analysis's results. Aliases are computed for any pointer by computing aliases in the subsets in parallel instead of an entire program. For carrying out context and flow-sensitive alias analysis, function summaries are computed on small subsets in a top-down manner based on the points-to hierarchy which reduces the sizes of the summaries.Type: ApplicationFiled: February 14, 2008Publication date: September 18, 2008Applicant: NEC LABORATORIES AMERICA, INC.Inventor: Vineet Kahlon
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Publication number: 20080178156Abstract: A system and method for race warning generation for computer program verification includes determining shared variables and determining context-sensitive points-to sets for lock pointers by focusing on pointers that may affect aliases of lock pointers, and by leveraging function summarization. Locksets are determined at locations where shared variables are accessed using the points-to sets for lock pointers. Warnings are based on disjointness of locksets.Type: ApplicationFiled: December 12, 2007Publication date: July 24, 2008Applicant: NEC Laboratories America, Inc.Inventors: Vineet Kahlon, Yu Yang, Sriram Sankaranarayanan, Aarti Gupta
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Publication number: 20080086723Abstract: A system and method for computing dataflow in concurrent programs of a computer system, includes, given a family of threads (U1, . . . , Um) and a Linear Temporal Logic (LTL) property, f, for a concurrent program, computing a cutoff for the LTL property, f, where c is called the cutoff if for all n greater than or equal to c, Un satisfies f if Uc satisfies f. The cutoff is computed using weighted multi-automata for internal transitions of the threads. Model checking a cutoff number of processes is performed to verify race freedom in the concurrent program.Type: ApplicationFiled: October 4, 2007Publication date: April 10, 2008Applicant: NEC Laboratories America, Inc.Inventor: Vineet Kahlon
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Publication number: 20080086296Abstract: A system and method for computing dataflow in concurrent programs of a computer system, like device drivers which control computer hardware like disk drives, audio speakers, etc., includes, given a concurrent program that includes many similar components, initializing a set of reachable control states for interaction between concurrent programs. Based on the set of reachable control states, synchronization constructs are removed between the control states. The synchronization constructs are replaced with internal transitions. New reachable control states uncovered by the removal of the synchronization constructs are added where the new reachable control states are discovered using model checking for single threads. Data race freedom of the plurality of concurrent programs is verified by reviewing a complete set of reachable control states.Type: ApplicationFiled: October 4, 2007Publication date: April 10, 2008Applicant: NEC Laboratories America, Inc.Inventor: Vineet Kahlon