Patents by Inventor Vineet Kahlon

Vineet Kahlon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080086722
    Abstract: A static, inter-procedural dataflow analysis is used to debug multi-threaded programs which heretofore have been thought unsuitable for concurrent multi-threaded analysis.
    Type: Application
    Filed: July 12, 2007
    Publication date: April 10, 2008
    Applicant: NEC LABORATORIES AMERICA
    Inventors: Vineet KAHLON, Aarti GUPTA
  • Publication number: 20070143742
    Abstract: A set of techniques for analyzing concurrent programs that combines the power of symbolic model checking to explore large state spaces, and partial order and transaction-based reduction techniques to manage the size of explored state space.
    Type: Application
    Filed: December 15, 2006
    Publication date: June 21, 2007
    Applicant: NEC LABORATORIES AMERICA
    Inventors: Vineet KAHLON, Aarti GUPTA, Nishant SINHA
  • Publication number: 20070011671
    Abstract: A method for the static analysis of concurrent multi-threaded software which bypasses the state explosion situation that plagues the prior art, thereby making our method scalable while—at the same time—producing no loss in precision. Our inventive method maintains patterns of lock acquisition and lock release by individual threads by constructing augmented versions of the threads. Once the augmented versions have been constructed, our inventive method verifies the concurrent program using existing tools for the verification of sequential programs—thereby greatly reducing implementation overhead. Finally, our inventive augmentation and method is carried out in an automatic manner—without requiring user intervention.
    Type: Application
    Filed: July 5, 2005
    Publication date: January 11, 2007
    Applicant: NEC Laboratories America, Inc.
    Inventors: Vineet Kahlon, Aarti Gupta
  • Publication number: 20060218534
    Abstract: A technique for model checking of multi-threaded software is herein disclosed which advantageously can be used to verify correctness properties expressed using temporal logic, e.g., linear time temporal logic and branching time temporal logic. The model checking problem of a concurrent system is decomposed into a plurality of model checking problems on individual threads of the multi-threaded software.
    Type: Application
    Filed: March 24, 2006
    Publication date: September 28, 2006
    Applicant: NEC LABORATORIES AMERICA, INC.
    Inventors: Vineet Kahlon, Aarti Gupta