Patents by Inventor Vinod Kumar

Vinod Kumar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12647127
    Abstract: Embodiments included herein are directed towards a sampler circuit. Embodiments may include a first positive-channel metal oxide semiconductor (PMOS) or negative-channel metal oxide semiconductor (NMOS) transistor that may be operatively connected to a voltage source and a first output node. A cross-coupled PMOS/NMOS pair may be operatively connected to the first PMOS/NMOS transistor, respectively, and a pair of first stage output nodes may be operatively connected to the cross-coupled PMOS/NMOS pair, respectively, where the pair of first stage output nodes may include a positive node and a negative node. An input differential pair may be operatively connected to the pair of first stage output nodes, and an offset current digital-to-analog converter (DAC) may be operatively connected to a first side of the input differential pair, while an offset current DAC replica may be operatively connected to a second side of the input differential pair.
    Type: Grant
    Filed: June 21, 2024
    Date of Patent: June 2, 2026
    Assignee: Cadence Design Systems, Inc.
    Inventors: Hajee Mohammed Shuaeb Fazeel, Vinod Kumar, Thomas Evan Wilson
  • Patent number: 12633915
    Abstract: The present disclosure describes a dynamic switching circuit that may include an interface that may be configured to receive a variable external signal. The dynamic switching circuit may include a maximum voltage circuit that may be operatively connected to the interface. The maximum voltage circuit may include a first PMOS switch and a first NMOS switch and may provide a maximum signal configured to place the first PMOS switch into an off-state and to place the first NMOS switch into an on-state. The maximum voltage circuit may also include a minimum voltage circuit that may be operatively connected to the interface. The minimum voltage circuit may include a second PMOS switch and a second NMOS switch and may provide a minimum signal configured to place the second NMOS switch into an off-state and to place the second PMOS switch into an on-state.
    Type: Grant
    Filed: April 5, 2024
    Date of Patent: May 19, 2026
    Assignee: Cadence Design Systems, Inc.
    Inventors: Vipul Jain, Vinod Kumar, Hajee Mohammed Shuaeb Fazeel
  • Publication number: 20260049577
    Abstract: A gas turbine engine includes a turbomachine comprising a low pressure (LP) spool and a high pressure (HP) spool that rotate about a central axis, an electric motor mechanically coupled to the LP spool for selectively rotating the LP spool, a starter assembly mechanically coupled to the HIP spool for selectively rotating the HP spool, and a controller in operative communication with the electric motor and the starter assembly, the controller being configured to operate the electric motor to rotate the LP spool and operate the starter assembly to rotate the HIP spool during engine startup.
    Type: Application
    Filed: October 27, 2025
    Publication date: February 19, 2026
    Inventors: Vinod Kumar, Shankar Jayaraman
  • Patent number: 12546787
    Abstract: The present invention discloses a kit and a novel method of extraction of a progesterone metabolite from feces/dung sample. The present invention also discloses a paper-based microfluidic device for detection of the progesterone metabolite for early determination of pregnancy in cattle and buffaloes. The invention further discloses antibodies developed against said metabolite, method of extraction, methods for fabricating the paper-based microfluidic devices and methods for inexpensive, rapid and non-invasive determination of pregnancy in early stages in cattle and buffaloes.
    Type: Grant
    Filed: March 5, 2020
    Date of Patent: February 10, 2026
    Assignee: COUNCIL OF SCIENTIFIC & INDUSTRIAL RESEARCH
    Inventors: Govindhaswamy Umapathy, Amit Asthana, Mohan Rao Chintalagiri, Vinod Kumar, Suresh Gopi
  • Patent number: 12480449
    Abstract: A gas turbine engine includes a turbomachine comprising a low pressure (LP) spool and a high pressure (HP) spool that rotate about a central axis, an electric motor mechanically coupled to the LP spool for selectively rotating the LP spool, a starter assembly mechanically coupled to the HP spool for selectively rotating the HP spool, and a controller in operative communication with the electric motor and the starter assembly, the controller being configured to operate the electric motor to rotate the LP spool and operate the starter assembly to rotate the HP spool during engine startup.
    Type: Grant
    Filed: December 14, 2022
    Date of Patent: November 25, 2025
    Assignee: General Electric Company
    Inventors: Vinod Kumar, Shankar Jayaraman
  • Patent number: 12425032
    Abstract: Embodiments included herein are directed towards a ring voltage-controlled oscillator based phase locked loop circuit. Embodiments may include an integral path including a plurality of resistors and a plurality of transistors configured to correct low frequency variations and a proportional path in electrical communication with the integral path, the proportional path including a plurality of transistors and a source degeneration circuit. Embodiments may further include a decoupling capacitor located at a ring voltage-controlled oscillator node in electrical communication with the proportional path, wherein the source degeneration circuit operates to cancel any effect from the ring voltage-controlled oscillator node.
    Type: Grant
    Filed: September 27, 2023
    Date of Patent: September 23, 2025
    Assignee: Cadence Design Systems Inc.
    Inventors: Prakash Kumar Lenka, Sumit Gupta, Vinod Kumar, Jitendra Kumar Yadav, Virvasav Sinha, Rajashekhar Krishnamurthy Rao
  • Patent number: 12212315
    Abstract: Methods and systems are provided for transmitting data using thin-oxide devices. The methods and system generate a first bias voltage and a second bias voltage based on a power supply voltage of the second voltage domain, the first bias voltage value representing a high-level voltage signal of the first voltage domain, and the second bias voltage representing a low-level voltage signal of the second voltage domain and its value corresponds to a difference between the second voltage domain and the first voltage domain. The methods and systems generate an output of the thin-oxide device interface using first and second thin-oxide devices, the output of the thin-oxide device interface having a range corresponding to the second voltage domain.
    Type: Grant
    Filed: January 4, 2023
    Date of Patent: January 28, 2025
    Assignee: Cadence Design Systems, Inc.
    Inventor: Vinod Kumar
  • Patent number: 12205673
    Abstract: Various embodiments described herein provide for a read data strobe (RDQS) path having variation compensation (e.g., voltage and temperature compensation), delay lines, or both, where the RDQS path can be included by a physical (PHY) interface for a memory device, such as a Double Data Rate (DDR) Dynamic Random-Access Memory (DRAM) memory device.
    Type: Grant
    Filed: September 15, 2022
    Date of Patent: January 21, 2025
    Assignee: Cadence Design Systems, Inc.
    Inventors: Hari Anand Ravi, Sachin Ramesh Gugwad, Jitendra Kumar Yadav, Thomas Evan Wilson, Vinod Kumar
  • Patent number: 12107578
    Abstract: Methods and systems are provided for performing voltage level shifting using thin-oxide devices. The methods and systems convert an input signal associated with a first voltage domain to output signals associated with the first and second voltage domains. A first set of thin-oxide devices generate a first output signal at the high-level voltage signal when the input signal comprises a high logic level and generate the first output signal at a ground level voltage signal when the input signal comprises a low logic level. A second set of thin-oxide devices generate a second output signal at a power supply voltage level of the second voltage domain when the input signal comprises the high logic level and generate the second output signal at the second bias voltage when the input signal comprises the low logic level.
    Type: Grant
    Filed: December 5, 2022
    Date of Patent: October 1, 2024
    Assignee: Cadence Design Systems, Inc.
    Inventor: Vinod Kumar
  • Publication number: 20240300662
    Abstract: A hybrid gas turbine engine for use on an aircraft includes a motor/generator and gas turbine engine placed in parallel power communication with a rotating bladed component, such as an aircraft propeller, through a combining gear box. Power can be modulated with the propeller using the motor/generator. An aircraft having the aircraft propeller can also include several aircraft systems such as an air data computer, automatic flight control system (AFCS), a guidance and navigation system, a full authority digital engine controller/flight control computer (FADEC/FCC), and a fault detection and mitigation controller (FDMC). Data from each of these respective systems can be communicated over an aircraft data bus. In one form data from the AFCS and guidance and navigation system can be provided over the aircraft bus to the FDMC to modulate power to the propeller and in some forms act as a backup to the FADEC/FCC.
    Type: Application
    Filed: March 8, 2023
    Publication date: September 12, 2024
    Inventors: Vinod Kumar, Kevin Richard Graziano
  • Patent number: 12040798
    Abstract: Embodiments included herein are directed towards a voltage-temperature drift resistant and power efficient clock distribution circuit. Embodiments may include a current generator and a voltage generator configured to receive an input from the current generator. Embodiments may also include a regulator which may be configured to receive a reference voltage from the voltage generator as an input and to generate regulated voltage as output. The clock distribution path may operate on a regulated voltage, the regulated voltage having a value proportional to a threshold value associated with a plurality of devices included in the clock distribution path.
    Type: Grant
    Filed: April 28, 2022
    Date of Patent: July 16, 2024
    Assignee: Cadence Design Systems, Inc.
    Inventors: Vinod Kumar, Prakash Kumar Lenka, Harsh Anil Shakrani
  • Patent number: 11925474
    Abstract: The present disclosure is directed to systems and methods for developing an individual-specific patient baseline for a target patient. An exemplary method involves: determining one or more acuity scores for the target patient; identifying patient health data corresponding to one or more low acuity time periods; storing retrospective clinical data from a group of patients in a second database; comparing the patient health data corresponding to the one or more low acuity time periods with retrospective clinical data from a group of patients by identifying one or more patient subgroups; determining the individual-specific patient baseline using an adaptive baseline selection algorithm, wherein the adaptive baseline selection algorithm is used to determine whether to determine the individual-specific patient baseline using patient health data or using retrospective clinical data from one or more patient subgroups; and displaying, using a user interface, the individual-specific patient baseline.
    Type: Grant
    Filed: July 2, 2020
    Date of Patent: March 12, 2024
    Assignee: KONINKLIJKE PHILIPS N.V.
    Inventors: Claire Yunzhu Zhao, Bryan Conroy, Mohammad Shahed Sorower, David Paul Noren, Kailash Swaminathan, Chaitanya Kulkarni, Ting Feng, Kristen Tgavalekos, Emma Holdrich Schwager, Erina Ghosh, Vinod Kumar, Vikram Shivanna, Srinivas Hariharan, Daniel Craig McFarlane
  • Publication number: 20240060452
    Abstract: A gas turbine engine includes a turbomachine comprising a low pressure (LP) spool and a high pressure (HP) spool that rotate about a central axis, an electric motor mechanically coupled to the LP spool for selectively rotating the LP spool, a starter assembly mechanically coupled to the HP spool for selectively rotating the HP spool, and a controller in operative communication with the electric motor and the starter assembly, the controller being configured to operate the electric motor to rotate the LP spool and operate the starter assembly to rotate the HP spool during engine startup.
    Type: Application
    Filed: December 14, 2022
    Publication date: February 22, 2024
    Inventors: Vinod Kumar, Shankar Jayaraman
  • Patent number: 11874788
    Abstract: Embodiments included herein are directed towards a transmitter circuit. The circuit may include a most significant bit (“MSB”) main driver and a most significant bit boost driver operatively connected to the MSB main driver. The circuit may also include a least significant bit (“LSB”) main driver and a least significant bit boost driver operatively connected to the LSB main driver, wherein the MSB main driver and the LSB main driver are configured to receive two parallel non-return-to-zero (“NRZ”) data inputs.
    Type: Grant
    Filed: June 24, 2022
    Date of Patent: January 16, 2024
    Assignee: Cadence Design Systems, Inc.
    Inventor: Vinod Kumar
  • Patent number: 11823427
    Abstract: An automatic artwork review system validates an artwork or a product label based on a received label specification document. Text extracted from the product label is chunked into sentences and words. Character-wise comparison is executed to identify the best match text from the label specification document for the sentence chunks from the product label. If the corresponding best match texts bears a similarity higher than a predetermined threshold to selected text including one or more sentence chunks, no errors are raised. If the similarity of the best match text to the selected text is not higher than the predetermined threshold, the specific errors occurring in the selected text and the particular portions where such errors are present are identified. The information regarding the errors can be output via one or more of an output user interface or a label compliance report.
    Type: Grant
    Filed: June 24, 2021
    Date of Patent: November 21, 2023
    Assignee: ACCENTURE GLOBAL SOLUTIONS LIMITED
    Inventors: Shobhit Shrotriya, Rajneesh Soni, Sanjib Ghosh, Vinod Kumar, Gandam Seema Moses, Deepak Kumar Arjun, Partha Sarathy Paramanik
  • Patent number: 11816451
    Abstract: This disclosure relates to method and system for identifying common requirements from applications. The method includes receiving a plurality of requirements from a plurality of applications. For at least two of the plurality of requirements, the method further includes determining a similarity index through each of a set of analysis techniques. For at least two of the plurality of requirements, the method further includes calculating a final similarity index based on the similarity index determined through each of a set of analysis techniques. The method further includes generating a similarity matrix for the plurality of requirements based on the final similarity index. The method further includes generating a hierarchical cluster tree for the plurality of requirements based on the final similarity index corresponding to each of the plurality of requirements.
    Type: Grant
    Filed: February 14, 2022
    Date of Patent: November 14, 2023
    Assignee: HCL Technologies Limited
    Inventors: Krishna Kumar Gopal, Hareendran M, Shrwan Kumar, Vinod Kumar, Maheswari V. S
  • Patent number: 11775196
    Abstract: Methods, apparatus, and processor-readable storage media for generating data replication configurations using AI techniques are provided herein. An example computer-implemented method includes obtaining input data pertaining to at least one data replication operation; determining a set of configuration parameters for the at least one data replication operation by applying one or more AI techniques to at least a portion of the input data; and performing one or more automated actions based at least in part on the determined set of configuration parameters for the at least one data replication operation.
    Type: Grant
    Filed: May 27, 2020
    Date of Patent: October 3, 2023
    Assignee: EMC IP Holding Company LLC
    Inventors: Kasnadi Sitaram Nandan, Mohit Kolluri, Vinod Kumar, Sujay Prasheel Sundaram, Sarat Manchiraju, Bijan Kumar Mohanty, Hung T. Dinh, Subrato Nath, Naveen Silvester
  • Patent number: 11677593
    Abstract: Various embodiments provide for a data sampler with built-in decision feedback equalization (DFE) and offset cancellation. For some embodiments, two or more data samplers described herein can be used to implement a data signal receiver circuit, which can use those two or more data samplers to facilitate half-rate or quarter-rate data sampling.
    Type: Grant
    Filed: May 24, 2022
    Date of Patent: June 13, 2023
    Assignee: Cadence Design Systems, Inc.
    Inventors: Vinod Kumar, Thomas Evan Wilson
  • Patent number: 11568923
    Abstract: A device, a memory interface device, and a method of implementing an active inductor circuit are disclosed. In one aspect, the device includes one or more active inductor circuits, each including a first metal-oxide-semiconductor (MOS) transistor and a second MOS transistor. The first MOS transistor has a first terminal connected to a first voltage level, a second terminal connected to a resistor, and a gate terminal. The second MOS transistor has a first terminal connected to the first voltage level, a second terminal connected to a first current source and the gate terminal of the first MOS transistor, and a gate terminal connected to the resistor and to a capacitor connected to a second voltage level. One of the first MOS transistor and the second MOS transistor is a p-channel MOS (PMOS) transistor, and another of the first MOS transistor and the second MOS transistor is an n-channel MOS (NMOS) transistor.
    Type: Grant
    Filed: June 21, 2021
    Date of Patent: January 31, 2023
    Assignee: CADENCE DESIGN SYSTEMS, INC.
    Inventors: Hajee Mohammed Shuaeb Fazeel, Vinod Kumar
  • Publication number: 20220414389
    Abstract: An automatic artwork review system validates an artwork or a product label based on a received label specification document. Text extracted from the product label is chunked into sentences and words. Character-wise comparison is executed to identify the best match text from the label specification document for the sentence chunks from the product label. If the corresponding best match texts bears a similarity higher than a predetermined threshold to selected text including one or more sentence chunks, no errors are raised. If the similarity of the best match text to the selected text is not higher than the predetermined threshold, the specific errors occurring in the selected text and the particular portions where such errors are present are identified. The information regarding the errors can be output via one or more of an output user interface or a label compliance report.
    Type: Application
    Filed: June 24, 2021
    Publication date: December 29, 2022
    Applicant: ACCENTURE GLOBAL SOLUTIONS LIMITED
    Inventors: Shobhit SHROTRIYA, Rajneesh SONI, Sanjib GHOSH, Vinod KUMAR, Gandam Seema MOSES, Deepak Kumar ARJUN, Partha Sarathy PARAMANIK