Patents by Inventor Vinoth Kumar
Vinoth Kumar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240022558Abstract: A networking device credential information reset system includes credential information reset authorization devices coupled to a networking device. At least one of the credential information reset authorization devices receives a networking device credential information reset request from the networking device and, in response, generates a networking device credential information reset alert and provides it for display on an administrator device. Following the networking device credential information reset alert being provided for display on the administrator device, a first credential information reset authorization device receives first credential information for the first credential information reset authorization device from the administrator device, validates the first credential information and, in response, provides a credential information reset authorization to the networking device that is configured to cause the networking device to reset second credential information for the networking device.Type: ApplicationFiled: July 13, 2022Publication date: January 18, 2024Inventors: Senthil Kumar Ganesan, Venkatesan Mahalingam, Vinoth Kumar Arumugam
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Publication number: 20230315588Abstract: This document describes systems and techniques for a hardware-based save-and-restore controller in an SoC. The described systems and techniques can automatically save and restore access control configurations (e.g., register states) of IP subsystems during a power-down and a power-up sequence, respectively. The save operation is initiated by a local save-and-restore (L SAR) controller and performed by the IP subsystems writing the configuration values to a central save-and-restore (C-SAR) controller before powering down a power domain. The C-SAR controller saves the configuration information in a memory located in an always-on power domain. The described systems and techniques initiate, via the L SAR controller, a restore operation as part of the power-up sequence. In this way, the described systems and techniques provide scalable save-and-restore services, support a large number of power domains, and allow a variable number of access control configurations to be saved and restored.Type: ApplicationFiled: September 11, 2020Publication date: October 5, 2023Applicant: Google LLCInventor: Vinoth Kumar Deivasigamani
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Patent number: 11741194Abstract: The present invention relates to a system and method for application debt management with zero maintenance strategy that make the applications “fit for use” and “fit for purpose”. The objective is to ensure that applications run at the lowest cost, deliver maximum performance and serve the purpose for which it was developed. The machine learning enabled debt engine of present system reads the unstructured ticket data or debts, eliminates noise, and classify the debts into one of predefined categories. This is followed by remediation of debt via either of automation or healing workbench based on predetermined priorities.Type: GrantFiled: December 22, 2020Date of Patent: August 29, 2023Assignee: COGNIZANT TECHNOLOGY SOLUTIONS INDIA PVT. LTD.Inventors: Srinivasan Thiagarajan, Saritha Panapparambil Abubacker, Surendranathan Ardhanari, Vinoth Kumar Devarajan, Yuvarajan Mani, Suganya Thirumalaisamy, Saranya Nedumaran, Vijayalakshmi Senthilkumar, Manikandan Namasivayam, Radha Ponram, Monalisa Behera
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Patent number: 11736389Abstract: Embodiments herein facilitate the modification of data traffic load balancing on information handling systems affected by a networking information handling system having the status of one or more of its uplinks changed from operable to inoperable or from inoperable to operable. In one or more embodiments, an agent operating on or in conjunction with a networking information handling system (e.g., a TOR) detects a change in one its links. The agent sends a message to information handling system(s) (e.g., hosts) that are communicatively coupled to the TOR regarding the change in status. Based upon the TOR's message, a host may adjust its traffic load balancing to compensate for the status change. Embodiments, therefore, help efficiently utilize network pathways.Type: GrantFiled: April 16, 2021Date of Patent: August 22, 2023Assignee: DELL PRODUCTS L.P.Inventors: Sudharsan Dhamal Gopalarathnam, Vinoth Kumar Arumugam
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Patent number: 11710130Abstract: A computer-implemented method and apparatus are provided to reduce false fraudulent declines of transactions. Payment processor (PP) systems may be provided with a request acceptor and a replacement transaction generator. The request acceptor receives a notification of a decline of a first transaction attempted by a cardholder with a merchant, for allegedly fraudulent, and a request to determine whether the first transaction was falsely identified as fraudulent, and if so, to remedy the first transaction. The replacement transaction generator generates, in response to a determination that the first transaction was falsely identified as fraudulent, and the merchant is a false fraudulent reduction partner merchant, a replacement second transaction to replace the declined first transaction. The replacement second transaction may include a bypass authorization code, and made available to the cardholder to use to transact with the merchant bypassing the declined first transaction.Type: GrantFiled: January 12, 2021Date of Patent: July 25, 2023Assignee: Visa International Service AssociationInventors: Satish Kumar, Vinoth Kumar Kalaiselvan
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Publication number: 20230128902Abstract: A blower of an HVAC system includes an air inlet, an air outlet, a blower wheel with blades, a motor operable to cause the blower wheel to rotate, and a blower housing within which the blower wheel is positioned. The blower housing includes a top panel, a bottom panel, and a connecting panel. The top panel and the bottom panel are connected to the connecting panel. The top panel includes a curved edge extending from a bottom edge of the connecting panel to a top edge of the connecting panel. An expansion angle of the curved edge of the top panel changes as a function of position along the curved edge of the top panel. The bottom panel may have a shape corresponding to a mirror image to that of the top panel.Type: ApplicationFiled: October 21, 2021Publication date: April 27, 2023Inventors: Patric Ananda Balan Thobias, Vinoth Kumar Settu, Prabhu Prakasam, Sangameshwaran Sadhasivam
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Publication number: 20230109396Abstract: Examples described herein relate to a network interface device. In some examples, packet processing circuitry in the network interface device is to receive a first packet and based on the first packet being associated with an identifier for which an entry is not present in a look-up table accessible to the packet processing circuitry, the packet processing circuitry is to provide the identifier for the first packet and an action for the identifier of the first packet and cause the first packet to configure a second look-up-table accessible to the packet processing circuitry with the action for the identifier.Type: ApplicationFiled: October 1, 2022Publication date: April 6, 2023Inventors: Anjali Singhai JAIN, Nupur JAIN, Elazar COHEN, John Andrew FINGERHUT, Neha SINGH, Vinoth Kumar CHANDRA MOHAN, Alana SWEAT, Arunkumar BALAKRISHNAN
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Publication number: 20230023587Abstract: If a secure element accesses a resource that is separate from the secure element, conducting a secure transaction can be inefficient in terms of power or time. Power usage is inefficient if the resource is never permitted to sleep, and transaction time is inefficient if the resource is permitted to sleep, and the user experiences a delay. To enable dual efficiency, a resource entity is permitted to be powered down. The resource entity is then powered up speculatively by an activation controller. The activation controller predicts an upcoming secure transaction based on sensor output, such as a position fix or a detected electromagnetic field. Based on monitored sensor output, the activation controller issues an activation signal to power up the secure element or the resource entity prior to initiation of the upcoming secure transaction. Thus, power can be conserved without introducing a transaction-processing latency.Type: ApplicationFiled: March 12, 2020Publication date: January 26, 2023Applicant: Google LLCInventors: Olivier Jean Benoit, Prasad Modali, Vinoth Kumar Deivasigamani, Benjamin K. Dodge
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Publication number: 20230020841Abstract: This document describes a secure element that leverages the resources of a computer system to perform specialized functions using sensitive information. The secure element securely stores sensitive information on flash memory of the computer system. In response to a request requiring use of sensitive information, the secure element loads a security application and sensitive information from the computer system. By leveraging external resources, the secure element may flexibly accommodate increasing resource requirements of the computer system and be used in a wide range of computer systems.Type: ApplicationFiled: February 27, 2020Publication date: January 19, 2023Applicant: Google LLCInventors: Olivier Jean Benoit, Prasad Modali, Vinoth Kumar Deivasigamani
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Patent number: 11556337Abstract: A matrix multiplication circuit comprises a memory storage device, processing circuitry, a parallel multiply circuit, and buffer circuits. The parallel multiply circuit simultaneously performs a count of multiplies in a parallel multiplication operation. The buffer circuits include prefetch buffer circuits each having a storage array dimension corresponding to the count of multiplies in the parallel multiplication operation. The processing circuitry loads a first prefetch buffer circuit with values from the first matrix; fetches a value of the second matrix and, in parallel with the fetch, preload the second prefetch buffer circuit with another value from the first matrix; initiates a parallel multiply of the fetched value of the second matrix and the values in the first prefetch buffer circuit; and stores partial product results of the parallel multiply, including adding a current partial product result to a previously stored partial product result.Type: GrantFiled: April 12, 2021Date of Patent: January 17, 2023Assignee: Analog Devices International Unlimited CompanyInventors: Praveen Chandrasekaran, Vinoth Kumar Rajasekar, Shreeja Sugathan
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Patent number: 11550029Abstract: Delay calibration for digital signal chains of SFCW systems is disclosed. An example calibration method includes receiving a burst with a test pulse, the burst having a duration of L clock cycles; receiving a trigger indicative of a time when the burst was transmitted; generating a digital signal indicative of the received burst; for each of L clock cycles, computing a moving average of a subset of digital samples and an amplitude for each average; identifying one moving average for which the computed amplitude is closest to an expected amplitude; identifying the clock cycle of the identified moving average; and updating at least one delay to be applied in digital signal processing of received bursts based on a difference between the trigger and the identified clock cycle. The delay may be used for selecting digital samples of the received signal that contain valid data for performing further data processing.Type: GrantFiled: July 16, 2020Date of Patent: January 10, 2023Assignee: ANALOG DEVICES INTERNATIONAL UNLIMITED COMPANYInventors: Vinoth Kumar, Satishchandra G. Rao, Corey Petersen, Madhusudan Rathi, Gerard E. Taylor, Kaustubh Mundhada
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Publication number: 20220364102Abstract: Disclosed herein are formulations and methods for the treatment of disease. The formulations and methods allow for the reprogramming of immune cells in a subject, particularly the T cells of a subject. The formulations are nanoparticles that have an interior and exterior in which the interior includes DNA molecules that encode genes for reprogramming T cells. The exterior of the nanoparticles targets the T cells to provide the DNA to the T cells.Type: ApplicationFiled: May 12, 2022Publication date: November 17, 2022Inventor: Vinoth Kumar Lakshmanan
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Publication number: 20220337513Abstract: Embodiments herein facilitate the modification of data traffic load balancing on information handling systems affected by a networking information handling system having the status of one or more of its uplinks changed from operable to inoperable or from inoperable to operable. In one or more embodiments, an agent operating on or in conjunction with a networking information handling system (e.g., a TOR) detects a change in one its links. The agent sends a message to information handling system(s) (e.g., hosts) that are communicatively coupled to the TOR regarding the change in status. Based upon the TOR's message, a host may adjust its traffic load balancing to compensate for the status change. Embodiments, therefore, help efficiently utilize network pathways.Type: ApplicationFiled: April 16, 2021Publication date: October 20, 2022Applicant: DELL PRODUCTS L.P.Inventors: Sudharsan Dhamal GOPALARATHNAM, Vinoth Kumar ARUMUGAM
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Publication number: 20220326945Abstract: A matrix multiplication circuit comprises a memory storage device, processing circuitry, a parallel multiply circuit, and buffer circuits. The parallel multiply circuit simultaneously performs a count of multiplies in a parallel multiplication operation. The buffer circuits include prefetch buffer circuits each having a storage array dimension corresponding to the count of multiplies in the parallel multiplication operation. The processing circuitry loads a first prefetch buffer circuit with values from the first matrix; fetches a value of the second matrix and, in parallel with the fetch, preload the second prefetch buffer circuit with another value from the first matrix; initiates a parallel multiply of the fetched value of the second matrix and the values in the first prefetch buffer circuit; and stores partial product results of the parallel multiply, including adding a current partial product result to a previously stored partial product result.Type: ApplicationFiled: April 12, 2021Publication date: October 13, 2022Inventors: Praveen Chandrasekaran, Vinoth Kumar Rajasekar, Shreeja Sugathan
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Publication number: 20220329476Abstract: A method includes executing, on a processor of a computing device, instructions that cause the computing device to perform operations. The operations include executing, on a processor of a computing device, instructions that cause the computing device to perform operations. The operations include receiving site features associated with a communication site and receiving event features associated with a potential outage-causing event. A classifying engine is employed to generate an impact metric indicating an effect on the communication site from the potential outage-causing event based on the site features and the event features.Type: ApplicationFiled: April 13, 2021Publication date: October 13, 2022Inventors: Allie Khalil Watfa, Nilam Jyoti Sharma, Manikandan Murugesan, Rajesh Pratabrai Lalwani, Adabel Jasmin Marquina, Vinoth Kumar Rajasekar
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Publication number: 20220294155Abstract: A component for attaching a cable to a housing member includes an attachment section having an attachment element and a cable clamping section integrally connected to the attachment section. The cable clamping section has a tubular shape and forms a cable tunnel. The cable clamping section has a clamping tongue that is deflectable into the cable tunnel.Type: ApplicationFiled: March 11, 2022Publication date: September 15, 2022Applicants: TE Connectivity India Private Limited, TE Connectivity Germany GmbHInventors: Hartmut Ripper, Yehya Ashour, Vinoth Kumar S
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Patent number: 11438434Abstract: Aspects of the invention are directed towards a system and a method for generating service actionable for a plurality of equipment. Embodiments of the invention describe the method comprises steps of behaviorally classifying an equipment into normalizing classification and behavior classification. The method further comprises steps of processing the normalizing and behavior classifications to generate one or more profiles corresponding to the equipment. The one or more profiles represent time-granular behavior patterns of the equipment. The method comprises steps of generating time-granular normalized characteristics for the equipment and normalizing variances of the time-granular normalized characteristics and the time-granular behavior patterns to generate possible service actionable (SACT) recommendations that are integrated into workflows to drive action and receive prediction confirmation.Type: GrantFiled: December 17, 2020Date of Patent: September 6, 2022Assignee: CARRIER CORPORATIONInventors: Subhasis Mandal, Yogesh B, Vinoth Kumar Annamalai
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Publication number: 20220222676Abstract: A computer-implemented method and apparatus are provided to reduce false fraudulent declines of transactions. Payment processor (PP) systems may be provided with a request acceptor and a replacement transaction generator. The request acceptor receives a notification of a decline of a first transaction attempted by a cardholder with a merchant, for allegedly fraudulent, and a request to determine whether the first transaction was falsely identified as fraudulent, and if so, to remedy the first transaction. The replacement transaction generator generates, in response to a determination that the first transaction was falsely identified as fraudulent, and the merchant is a false fraudulent reduction partner merchant, a replacement second transaction to replace the declined first transaction. The replacement second transaction may include a bypass authorization code, and made available to the cardholder to use to transact with the merchant bypassing the declined first transaction.Type: ApplicationFiled: January 12, 2021Publication date: July 14, 2022Applicant: Visa International Service AssociationInventors: Satish Kumar, Vinoth Kumar Kalaiselvan
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Publication number: 20220222105Abstract: System and techniques for container provisioning are described herein. A request to instantiate a container image may be made. This request specifies a name for the container image where the name is created through a first defined generation process applied to contents of the container image. A container manifest may be received from a local copy of a distributed container directory. The container manifest includes a set of entries for container layer images of the container image. Here, the set of entries are named by a second defined generation process applied to respective container layer images. Then, container layer images may be retrieved using names from the set of entries and the container image instantiated using the retrieved container layer images.Type: ApplicationFiled: April 1, 2022Publication date: July 14, 2022Inventors: Jeffrey Christopher Sedayao, Juan Pablo Munzo, Vinoth kumar Chandra Mohan, Promila Agarwal, Dean Chu, Eve M. Schooler, Kshitij Arun Doshi
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Publication number: 20220191095Abstract: A port unavailability remediation system includes a management device and a networking device including a plurality of physical ports. Following the unavailability of a first physical port that is included in the plurality of physical ports and that is linked to a first port identifier, the networking device receives a port identifier link change request from the management device that requests the linking of the first port identifier to a second physical port that is included in the plurality of physical ports and, in response, links the first port identifier to the second physical port. Subsequent to linking the first port identifier to the second physical port, the networking device prevents modification of the second physical port.Type: ApplicationFiled: December 11, 2020Publication date: June 16, 2022Inventors: Sudharsan Dhamal Gopalarathnam, Vinoth Kumar Arumugam