Patents by Inventor Virgile Javerliac

Virgile Javerliac has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8169815
    Abstract: Magnetic random access memory (MRAM) cell with a thermally assisted switching writing procedure and methods for manufacturing and using same. The MRAM cell includes a magnetic tunnel junction that has at least a first magnetic layer, a second magnetic layer, and an insulating layer disposed between the first and a second magnetic layers. The MRAM cell further includes a select transistor and a current line electrically connected to the junction. The current line advantageously can support a plurality of MRAM operational functions. The current line can fulfill a first function for passing a first portion of current for heating the junction and a second function for passing a second portion of current in order to switch the magnetization of the first magnetic layer.
    Type: Grant
    Filed: April 6, 2009
    Date of Patent: May 1, 2012
    Assignee: Crocus Technology S.A.
    Inventors: Virgile Javerliac, Neal Berger
  • Publication number: 20110291731
    Abstract: An integrated circuit 2 includes processing circuitry that includes a plurality of critical path circuits 4, 6, 8, 10. These critical path circuits include variable delay circuits 16 which add an additional delay in to the path delay through the critical paths so as to adjust the path delay to match a target path delay. Variable delay circuit 18 includes a tank capacitor 22 which is charged or discharged to generate a control voltage. This control voltage serves to control a power supply voltage fed to an inverter chain 28. Variation in the power supply voltage of the inverter chain 28 adjust the propagation speed of a processing signal through the inverter chain 28 and accordingly adjusts the additional delay imposed by the variable delay circuit.
    Type: Application
    Filed: May 18, 2011
    Publication date: December 1, 2011
    Applicant: ARM LIMITED
    Inventor: Virgile Javerliac
  • Patent number: 8031519
    Abstract: A memory unit with one field line; at least two thermally-assisted switching magnetic tunnel junction-based magnetic random access memory cells, each cell comprising a magnetic tunnel junction having an insulating layer disposed between a magnetic storage layer and a magnetic reference layer; wherein a selection transistor is connected to the magnetic tunnel junction; the one field line is used for passing a field current for switching a magnetization of the storage layer of the magnetic tunnel junctions of the cells. A magnetic memory device can be formed by assembling an array of the memory units, wherein at least two adjacent magnetic tunnel junctions of the cells can be addressed simultaneously by the field line. The memory unit and magnetic memory device have a reduced surface area. Magnetic memory devices with an increased density of memory units can be fabricated resulting in lower die fabrication cost and lower power consumption.
    Type: Grant
    Filed: June 16, 2009
    Date of Patent: October 4, 2011
    Assignee: Crocus Technology S.A.
    Inventors: Virgile Javerliac, Neal Berger, Kenneth Mackay, Jean-Pierre Nozieres
  • Publication number: 20110221470
    Abstract: A device for performing a “logic function” including a magnetic structure including at least one first magnetoresistive stack including a first ferromagnetic layer and a second ferromagnetic layer separated by a non-ferromagnetic interlayer, the ferromagnetic hard layer being pinned in a fixed magnetic state which serves as a reference and at least one first and one second current line belonging to a first and a second level of metallization respectively, each of the two lines generating a magnetic field in the vicinity of the first stack when a current flows therethrough. The first and second lines are disposed at various distances of the second ferromagnetic layer, the various distances being determined by the “logic function”.
    Type: Application
    Filed: April 15, 2009
    Publication date: September 15, 2011
    Applicants: Commissariat a l'energie atomique et aux energies alternatives, Centre national de la recherche scientifique
    Inventors: Virgile Javerliac, Guillaume Prenat
  • Publication number: 20110115522
    Abstract: A device for performing a “logic function” consisting of a magnetic structure including at least a first magnetoresistive stack including a first ferromagnetic layer and a second ferromagnetic layer separated by a non-ferromagnetic interlayer and at least one first line of current situated in the vicinity of the first magnetoresistive stack and generating in the vicinity of the first stack a magnetic field when an electric current passes through it. The first line includes at least two current input points so that two currents can be added together in the first line, with the sum of the two currents being determined by the logic function.
    Type: Application
    Filed: April 15, 2009
    Publication date: May 19, 2011
    Applicants: Commissariat a l'energie atomique et aux energies alternatives, Centre national de la recherche scienifique
    Inventors: Virgile Javerliac, Guillaume Prenat
  • Patent number: 7944736
    Abstract: The device comprises two magnetoresistive elements (10, 20) placed relative to each other in magnetostatic interaction in such a manner that a magnetic flux passing between these elements (10, 20) closes through soft ferromagnetic layers (26, 27) of said elements (10, 20). A write device (15) is associated with the elements (10, 20) to control the magnetization of each soft layer (26, 27). A read conductor line (11, 12, 13, 14) is associated with each magnetoresistive element (10, 20) to detect the magnetic state of the soft layer (26, 27) by measuring the corresponding magnetoresistance. The soft ferromagnetic layers (26, 27) of the elements (10, 20) remain oriented substantially in antiparallel relative to each other, while the hard ferromagnetic layers (24) of said elements (10, 20) are oriented substantially in parallel.
    Type: Grant
    Filed: July 26, 2006
    Date of Patent: May 17, 2011
    Assignee: Commissariat a l'Energie Atomique et aux Energies Alternatives
    Inventors: Bernard Dieny, Virgile Javerliac
  • Patent number: 7944231
    Abstract: An electronic device designed to transport digital information (“0”, “1”) over long distances, including a transmitter generating current pulses and at least one assembly of receivers converting the received current pulses into logic pulses which are compatible with the operation of standard electronic logic circuits. Each receiver includes a pair of magnetoresistive stacks containing at least one hard ferromagnetic layer and one soft ferromagnetic layer separated by a non-ferromagnetic interlayer, the hard layer of each of the magnetoresistive stacks being pinned in a magnetic orientation perpendicular to an easy-magnetization axis which is used as a reference for the soft layer of the same stack. The soft layer of each magnetoresistive stack has a magnetic orientation which can be modulated by the magnetic field generated by current pulses delivered by the transmitter so as to cause modification of the transverse resistance of the stack sufficient to trigger an electrical signal.
    Type: Grant
    Filed: March 21, 2008
    Date of Patent: May 17, 2011
    Assignees: Commissariat a l'Energie Atomique, Centre National de la Recherche Scientifique
    Inventor: Virgile Javerliac
  • Patent number: 7894228
    Abstract: A content-addressable random access memory having magnetic tunnel junction-based memory cells and methods for making and using same. The magnetic tunnel junction has first and second magnetic layers and can act as a data store and a data sense. Within each cell, registered data is written by setting a magnetic orientation of the first magnetic layer in the magnetic tunnel junction via current pulses in one or more current lines. Input data for comparison with the registered data can be similarly set through the magnetic orientation of the second magnetic layer via the current lines. The data sense is performed by measuring cell resistance, which depends upon the relative magnetic orientation of the magnetic layers. Since data storage, data input, and data sense are integrated into one cell, the memory combines higher densities with non-volatility. The memory can support high speed, reduced power consumption, and data masking.
    Type: Grant
    Filed: April 13, 2009
    Date of Patent: February 22, 2011
    Assignee: Crocus Technology S.A.
    Inventors: Jean-Pierre Nozieres, Virgile Javerliac
  • Publication number: 20110002151
    Abstract: The present disclosure concerns a magnetic random access memory-based ternary content addressable memory cell, comprising a first and second magnetic tunnel junction respectively connected to a first and second straps extending on each side of the first and second magnetic tunnel junctions, respectively; a first and second selection transistors, respectively connected to one extremity of the first and second straps; a first and second current lines; and a conductive line electrically connecting in series the first and second magnetic tunnel junctions at their ends opposed to the ones connecting the first and second straps. The cell disclosed herein has smaller size and can be advantageously used in memory devices having a high cell density array.
    Type: Application
    Filed: June 23, 2010
    Publication date: January 6, 2011
    Applicant: CROCUS TECHNOLOGY SA
    Inventors: Virgile Javerliac, Mourad El Baraji
  • Patent number: 7791917
    Abstract: A content-addressable random access memory having magnetic tunnel junction-based memory cells and methods for making and using same. The magnetic tunnel junction has first and second magnetic layers and can act as a data store and a data sense. Within each cell, registered data is written by setting a magnetic orientation of the first magnetic layer in the magnetic tunnel junction via current pulses in one or more current lines. Input data for comparison with the registered data can be similarly set through the magnetic orientation of the second magnetic layer via the current lines. The data sense is performed by measuring cell resistance, which depends upon the relative magnetic orientation of the magnetic layers. Since data storage, data input, and data sense are integrated into one cell, the memory combines higher densities with non-volatility. The memory can support high speed, reduced power consumption, and data masking.
    Type: Grant
    Filed: January 5, 2009
    Date of Patent: September 7, 2010
    Assignee: Crocus Technology S.A.
    Inventors: Jean-Pierre Nozieres, Virgile Javerliac
  • Publication number: 20100208516
    Abstract: A magnetic random access memory (MRAM) cell with a thermally assisted writing procedure comprising a magnetic tunnel junction formed from a magnetic storage layer, a reference layer, and an insulating layer inserted between the reference layer and the storage layer; and a first strap portion laterally connecting one end of the magnetic tunnel junction to a first selection transistor; wherein the cell further comprises a second strap portion extending opposite to the first strap portion and connecting laterally said one end of the magnetic tunnel junction to a second selection transistor, and in that said first and second strap portions being adapted for passing a portion of current via the first and second selection transistors. The disclosed cell has lower power consumption than conventional MRAM cells.
    Type: Application
    Filed: February 19, 2010
    Publication date: August 19, 2010
    Applicant: CROCUS TECHNOLOGY SA
    Inventors: Virgile JAVERLIAC, Erwan GAPIHAN, Mourad EL BARAJI
  • Publication number: 20100110744
    Abstract: A method for writing a magnetic random access memory-based ternary content addressable memory cell comprising a first magnetic tunnel junction being formed from a storage layer, a sense layer having a magnetization direction adjustable relative to the magnetization of the storage layer, and an insulating layer between the storage and sense layers; a sense line coupled with the storage layer; a first field line and a second field line, and the first field line being orthogonal to the second field line; comprising: providing a first write data to said storage layer via the second field line to store a first stored data with a high or low logic state; characterized in that, the method further comprises providing the first write data to said storage layer via the first field line to store the first stored data with a masked logic state.
    Type: Application
    Filed: October 30, 2009
    Publication date: May 6, 2010
    Applicant: CROCUS TECHNOLOGY SA
    Inventors: Mourad El Baraji, Virgile Javerliac
  • Publication number: 20090316476
    Abstract: A memory unit with one field line; at least two thermally-assisted switching magnetic tunnel junction-based magnetic random access memory cells, each cell comprising a magnetic tunnel junction having an insulating layer disposed between a magnetic storage layer and a magnetic reference layer; wherein a selection transistor is connected to the magnetic tunnel junction; the one field line is used for passing a field current for switching a magnetization of the storage layer of the magnetic tunnel junctions of the cells. A magnetic memory device can be formed by assembling an array of the memory units, wherein at least two adjacent magnetic tunnel junctions of the cells can be addressed simultaneously by the field line. The memory unit and magnetic memory device have a reduced surface area. Magnetic memory devices with an increased density of memory units can be fabricated resulting in lower die fabrication cost and lower power consumption.
    Type: Application
    Filed: June 16, 2009
    Publication date: December 24, 2009
    Inventors: Virgile Javerliac, Neal Berger, Kenneth MacKay, Jean-Pierre Nozleres
  • Publication number: 20090251957
    Abstract: Magnetic random access memory (MRAM) cell with a thermally assisted switching writing procedure and methods for manufacturing and using same. The MRAM cell includes a magnetic tunnel junction that has at least a first magnetic layer, a second magnetic layer, and an insulating layer disposed between the first and a second magnetic layers. The MRAM cell further includes a select transistor and a current line electrically connected to the junction. The current line advantageously can support a plurality of MRAM operational functions. The current line can fulfill a first function for passing a first portion of current for heating the junction and a second function for passing a second portion of current in order to switch the magnetization of the first magnetic layer.
    Type: Application
    Filed: April 6, 2009
    Publication date: October 8, 2009
    Inventors: Virgile Javerliac, Neal Berger
  • Publication number: 20090213632
    Abstract: A content-addressable random access memory having magnetic tunnel junction-based memory cells and methods for making and using same. The magnetic tunnel junction has first and second magnetic layers and can act as a data store and a data sense. Within each cell, registered data is written by setting a magnetic orientation of the first magnetic layer in the magnetic tunnel junction via current pulses in one or more current lines. Input data for comparison with the registered data can be similarly set through the magnetic orientation of the second magnetic layer via the current lines. The data sense is performed by measuring cell resistance, which depends upon the relative magnetic orientation of the magnetic layers. Since data storage, data input, and data sense are integrated into one cell, the memory combines higher densities with non-volatility. The memory can support high speed, reduced power consumption, and data masking.
    Type: Application
    Filed: April 13, 2009
    Publication date: August 27, 2009
    Inventors: Jean-Pierre Nozieres, Virgile Javerliac
  • Publication number: 20090135526
    Abstract: The device comprises two magnetoresistive elements (10, 20) placed relative to each other in magnetostatic interaction in such a manner that a magnetic flux passing between these elements (10, 20) closes through soft ferromagnetic layers (26, 27) of said elements (10, 20). A write device (15) is associated with the elements (10, 20) to control the magnetization of each soft layer (26, 27). A read conductor line (11, 12, 13, 14) is associated with each magnetoresistive element (10, 20) to detect the magnetic state of the soft layer (26, 27) by measuring the corresponding magnetoresistance. The soft ferromagnetic layers (26, 27) of the elements (10, 20) remain oriented substantially in antiparallel relative to each other, while the hard ferromagnetic layers (24) of said elements (10, 20) are oriented substantially in parallel.
    Type: Application
    Filed: July 26, 2006
    Publication date: May 28, 2009
    Applicant: Commissariat a I'Energie Atomique
    Inventors: Bernard Dieny, Virgile Javerliac
  • Publication number: 20090109719
    Abstract: A content-addressable random access memory having magnetic tunnel junction-based memory cells and methods for making and using same. The magnetic tunnel junction has first and second magnetic layers and can act as a data store and a data sense. Within each cell, registered data is written by setting a magnetic orientation of the first magnetic layer in the magnetic tunnel junction via current pulses in one or more current lines. Input data for comparison with the registered data can be similarly set through the magnetic orientation of the second magnetic layer via the current lines. The data sense is performed by measuring cell resistance, which depends upon the relative magnetic orientation of the magnetic layers. Since data storage, data input, and data sense are integrated into one cell, the memory combines higher densities with non-volatility. The memory can support high speed, reduced power consumption, and data masking.
    Type: Application
    Filed: January 5, 2009
    Publication date: April 30, 2009
    Inventors: Jean-Pierre Nozieres, Virgile Javerliac
  • Patent number: 7518897
    Abstract: A content-addressable random access memory having magnetic tunnel junction-based memory cells and methods for making and using same. The magnetic tunnel junction has first and second magnetic layers and can act as a data store and a data sense. Within each cell, registered data is written by setting a magnetic orientation of the first magnetic layer in the magnetic tunnel junction via current pulses in one or more current lines. Input data for comparison with the registered data can be similarly set through the magnetic orientation of the second magnetic layer via the current lines. The data sense is performed by measuring cell resistance, which depends upon the relative magnetic orientation of the magnetic layers. Since data storage, data input, and data sense are integrated into one cell, the memory combines higher densities with non-volatility. The memory can support high speed, reduced power consumption, and data masking.
    Type: Grant
    Filed: October 9, 2007
    Date of Patent: April 14, 2009
    Assignee: Crocus Technology S.A.
    Inventors: Jean-Pierre Nozieres, Virgile Javerliac
  • Publication number: 20080232479
    Abstract: An electronic device designed to transport digital information (“0”, “1”) over long distances, including a transmitter generating current pulses and at least one assembly of receivers converting the received current pulses into logic pulses which are compatible with the operation of standard electronic logic circuits. Each receiver includes a pair of magnetoresistive stacks containing at least one hard ferromagnetic layer and one soft ferromagnetic layer separated by a non-ferromagnetic interlayer, the hard layer of each of the magnetoresistive stacks being pinned in a magnetic orientation perpendicular to an easy-magnetization axis which is used as a reference for the soft layer of the same stack. The soft layer of each magnetoresistive stack has a magnetic orientation which can be modulated by the magnetic field generated by current pulses delivered by the transmitter so as to cause modification of the transverse resistance of the stack sufficient to trigger an electrical signal.
    Type: Application
    Filed: March 21, 2008
    Publication date: September 25, 2008
    Applicant: Commissariat A L'Energie Atomique
    Inventor: Virgile Javerliac
  • Publication number: 20080084724
    Abstract: A content-addressable random access memory having magnetic tunnel junction-based memory cells and methods for making and using same. The magnetic tunnel junction has first and second magnetic layers and can act as a data store and a data sense. Within each cell, registered data is written by setting a magnetic orientation of the first magnetic layer in the magnetic tunnel junction via current pulses in one or more current lines. Input data for comparison with the registered data can be similarly set through the magnetic orientation of the second magnetic layer via the current lines. The data sense is performed by measuring cell resistance, which depends upon the relative magnetic orientation of the magnetic layers. Since data storage, data input, and data sense are integrated into one cell, the memory combines higher densities with non-volatility. The memory can support high speed, reduced power consumption, and data masking.
    Type: Application
    Filed: October 9, 2007
    Publication date: April 10, 2008
    Inventors: Jean-Pierre Nozieres, Virgile Javerliac