Patents by Inventor Vladimir Aparin

Vladimir Aparin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190222326
    Abstract: Certain aspects of the present disclosure provide systems and methods for performing a power amplifier characterization. One example method generally includes determining, by a user equipment, if a condition associated with a power amplifier characterization is met. In certain aspects, the method includes determining, by the user equipment, a calibration gap after the condition is met. The method also includes performing, by the user equipment, the power amplifier characterization of the one or more power amplifiers of the user equipment during the calibration gap.
    Type: Application
    Filed: January 14, 2019
    Publication date: July 18, 2019
    Inventors: Jeremy Darren DUNWORTH, Timo Ville VINTOLA, Nicholas Michael CARBONE, Seyed Aidin BASSAM, Vladimir APARIN, Udara FERNANDO
  • Publication number: 20190173439
    Abstract: The present disclosure provides an amplifier circuit that includes one or more amplifier stages, each of the one or more amplifier stages including a complementary transistor configuration. The complementary transistor configuration includes an NMOS transistor and a PMOS transistor. The NMOS transistor is electrically coupled in parallel to the PMOS transistor. The amplifier circuit further includes an output amplifier stage electrically coupled to an output of the one or more amplifier stages, the output amplifier stage including a non-complementary transistor configuration including one or more NMOS transistors or PMOS transistors.
    Type: Application
    Filed: December 3, 2018
    Publication date: June 6, 2019
    Inventors: Jeremy DUNWORTH, Hyunchul PARK, Bon-Hyun KU, Vladimir APARIN
  • Publication number: 20190067221
    Abstract: In conventional packaging strategies for mm wave applications, the size of the package is dictated by the antenna size, which is often much larger than the RFIC (radio frequency integrated circuit). Also, the operations are often limited to a single frequency which limits their utility. In addition, multiple addition build-up layers are required to provide the necessary separation between the antennas and ground layers. To address these issues, it is proposed to provide a device that includes an antenna package, an RFIC package, and an interconnect assembly between the antenna and the RFIC packages. The interconnect assembly may comprise a plurality of interconnects with high aspect ratios and configured to connect one or more antennas of the antenna package with an RFIC of the RFIC package. An air gap may be formed in between the antenna package and the RFIC package for performance improvement.
    Type: Application
    Filed: December 12, 2017
    Publication date: February 28, 2019
    Inventors: Jon Bradley LASITER, Ravindra Vaman SHENOY, Donald William KIDWELL, JR., Mohammad Ali TASSOUDJI, Vladimir APARIN, Seong Heon JEONG, Jeremy DUNWORTH, Alireza MOHAMMADIAN, Mario Francisco VELEZ, Chin-Kwan KIM
  • Publication number: 20190024254
    Abstract: Techniques for increasing the lifespan of a nanopore DNA sensing device are disclosed. A related DNA sensing device may be formed by a process comprising forming a first electrode, forming a second electrode, disposing the first electrode and second electrode within an insulator, and disposing a lipid bilayer having a nanopore between the first electrode and second electrode. The forming of the second electrode may comprise forming a silver (Ag) layer, pressing a mold into the Ag layer to form a pattern in the Ag layer, removing the mold from the Ag layer, and exposing the Ag layer to an electrolyte.
    Type: Application
    Filed: September 25, 2018
    Publication date: January 24, 2019
    Inventors: Yong Ju LEE, Vladimir APARIN
  • Patent number: 10081879
    Abstract: Techniques for increasing the lifespan of a nanopore DNA sensing device are disclosed. A related method may include forming a first electrode, forming a second electrode, disposing the first electrode and second electrode within an insulator, and disposing a lipid bilayer having a nanopore between the first electrode and second electrode. The forming of the second electrode may comprise forming a silver (Ag) layer, pressing a mold into the Ag layer to form a pattern in the Ag layer, removing the mold from the Ag layer, and exposing the Ag layer to an electrolyte.
    Type: Grant
    Filed: May 4, 2017
    Date of Patent: September 25, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: Yong Ju Lee, Vladimir Aparin
  • Patent number: 10024818
    Abstract: An ionic current sensor array includes a master bias generator and a plurality of sensing cells. The master bias generator is configured to generate a bias voltage. Each sensing cell includes an ionic current sensor, an integrating capacitor, a sense transistor coupled between the integrating capacitor and the ionic current sensor, and an amplifier coupled to provide a reference voltage to bias the ionic current sensor. The amplifier includes a first transistor and a second transistor. The first transistor is coupled to receive the bias voltage, and the second transistor is coupled to the first transistor to provide the reference voltage to the ionic current sensor. The second transistor is also coupled between a source of the sense transistor and the gate of the sense transistor.
    Type: Grant
    Filed: June 17, 2016
    Date of Patent: July 17, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: Vladimir Aparin, Bo Sun, Joung Won Park
  • Publication number: 20180048044
    Abstract: A pair of stacked ground coplanar waveguides (GCPWs) is provided in two consecutive metal layers that are deposited on opposing surfaces of a dielectric layer. A first metal layer on a first side of the dielectric layer forms a first signal trace and an upper ground plane for a first GCPW in the pair. Similarly, a second metal layer on a second surface of the dielectric layer forms a second signal trace and an upper ground plane for a second GCPW in the pair.
    Type: Application
    Filed: October 23, 2017
    Publication date: February 15, 2018
    Inventors: Yu-Chin Ou, Mohammad Ali Tassoudji, Xiaoyin He, Vladimir Aparin
  • Publication number: 20180038830
    Abstract: Techniques for improving the DNA sensing signal of nanopore-based DNA sensing devices are disclosed. A related DNA sensing device may include a first electrode, a second electrode, a hydrophobic layer having a nanopore disposed therein, and a negative capacitance layer.
    Type: Application
    Filed: August 2, 2016
    Publication date: February 8, 2018
    Inventors: Yong Ju LEE, Joung Won PARK, Vladimir APARIN
  • Publication number: 20170363573
    Abstract: An ionic current sensor array includes a master bias generator and a plurality of sensing cells. The master bias generator is configured to generate a bias voltage. Each sensing cell includes an ionic current sensor, an integrating capacitor, a sense transistor coupled between the integrating capacitor and the ionic current sensor, and an amplifier coupled to provide a reference voltage to bias the ionic current sensor. The amplifier includes a first transistor and a second transistor. The first transistor is coupled to receive the bias voltage, and the second transistor is coupled to the first transistor to provide the reference voltage to the ionic current sensor. The second transistor is also coupled between a source of the sense transistor and the gate of the sense transistor.
    Type: Application
    Filed: June 17, 2016
    Publication date: December 21, 2017
    Inventors: Vladimir APARIN, Bo SUN, Joung Won PARK
  • Publication number: 20170321342
    Abstract: Techniques for increasing the lifespan of a nanopore DNA sensing device are disclosed. A related method may include forming a first electrode, forming a second electrode, disposing the first electrode and second electrode within an insulator, and disposing a lipid bilayer having a nanopore between the first electrode and second electrode. The forming of the second electrode may comprise forming a silver (Ag) layer, pressing a mold into the Ag layer to form a pattern in the Ag layer, removing the mold from the Ag layer, and exposing the Ag layer to an electrolyte.
    Type: Application
    Filed: May 4, 2017
    Publication date: November 9, 2017
    Inventors: Yong Ju LEE, Vladimir APARIN
  • Publication number: 20170093005
    Abstract: A pair of stacked ground coplanar waveguides (GCPWs) is provided in two consecutive metal layers that are deposited on opposing surfaces of a dielectric layer. A first metal layer on a first side of the dielectric layer forms a first signal trace and an upper ground plane for a first GCPW in the pair. Similarly, a second metal layer on a second surface of the dielectric layer forms a second signal trace and an upper ground plane for a second GCPW in the pair.
    Type: Application
    Filed: September 24, 2015
    Publication date: March 30, 2017
    Inventors: Yu-Chin Ou, Mohammad Ali Tassoudji, Xiaoyin He, Vladimir Aparin
  • Patent number: 9548709
    Abstract: Techniques for simultaneously receiving multiple transmitted signals with independent gain control are disclosed. In an exemplary design, an apparatus (e.g., a wireless device, an integrated circuit, etc.) includes a low noise amplifier (LNA) and first and second receive circuits. The LNA amplifies a receiver input signal and provides (i) a first amplified signal for a first set of at least one transmitted signal being received and (ii) a second amplified signal for a second set of at least one transmitted signal being received. The first receive circuit scales the first amplified signal based on a first adjustable gain selected for the first set of transmitted signal(s). The second receive circuit scales the second amplified signal based on a second adjustable gain selected for the second set of transmitted signal(s). The first and second adjustable gains may be independently selected, e.g., based on the received powers of the transmitted signals.
    Type: Grant
    Filed: December 19, 2012
    Date of Patent: January 17, 2017
    Assignee: QUALCOMM Incorporated
    Inventor: Vladimir Aparin
  • Patent number: 9543383
    Abstract: High-speed high-power semiconductor devices are disclosed. In an exemplary design, a high-speed high-power semiconductor device includes a source, a drain to provide an output signal, and an active gate to receive an input signal. The semiconductor device further includes at least one field gate located between the active gate and the drain, at least one shallow trench isolation (STI) strip formed transverse to the at least one field gate, and at least one drain active strip formed parallel to, and alternating with, the at least one STI strip. The semiconductor device may be modeled by a combination of an active FET and a MOS varactor. The active gate controls the active FET, and the at least one field gate controls the MOS varactor. The semiconductor device has a low on resistance and can handle a high voltage.
    Type: Grant
    Filed: May 9, 2011
    Date of Patent: January 10, 2017
    Assignee: QUALCOMM Incorporated
    Inventors: Yang Du, Vladimir Aparin, Robert P. Gilmore
  • Publication number: 20160370313
    Abstract: Certain aspects of the present disclosure provide methods and apparatus for sensing. One example apparatus for sensing includes a sensor configured to supply a current indicative of a parameter and a bipolar transistor having a base coupled to the sensor to receive the current, the bipolar transistor being configured to generate an amplified current based on the current. The apparatus may also include a measurement circuit coupled to the bipolar transistor and configured receive the amplified current.
    Type: Application
    Filed: June 14, 2016
    Publication date: December 22, 2016
    Inventor: Vladimir APARIN
  • Publication number: 20160359461
    Abstract: Various aspects of the present disclosure provide an apparatus for wireless communication. The apparatus may include an integrated circuit, an antenna, and a module located adjacent to the antenna. The module may include at least one of a power amplifier or a low-noise amplifier. The power amplifier may be configured to amplify a signal received from the integrated circuit for transmission by the antenna. The low-noise amplifier may be configured to amplify a signal received from the antenna for reception by the integrated circuit. The module may be separate from the integrated circuit. A length of a feed line connecting the antenna and the module may be less than a length of a feed line connecting the module and the integrated circuit. The module may also include a switching mechanism configured to switch operation of the module between transmission and reception.
    Type: Application
    Filed: June 5, 2015
    Publication date: December 8, 2016
    Inventors: Xiaoyin He, Vladimir Aparin, Mohammad Ali Tassoudji, Joseph Patrick Burke, Jeremy Darren Dunworth
  • Publication number: 20160248451
    Abstract: Methods, systems, and devices are described for transceiver architecture for millimeter wave wireless communications. A device may include two transceiver chip modules configured to communicate in different frequency ranges. The first transceiver chip module may include a baseband sub-module, a first radio frequency front end (RFFE) component and associated antenna array. The second transceiver chip module may include a second RFFE component and associated antenna array. The second transceiver chip module may be separate from the first transceiver chip module. The second transceiver chip module may be electrically coupled to the baseband sub-module of the first transceiver chip module.
    Type: Application
    Filed: August 28, 2015
    Publication date: August 25, 2016
    Inventors: Haim Mendel Weissman, Lior Raviv, Xiaoyin He, Vladimir Aparin
  • Publication number: 20160233580
    Abstract: The systems and method described herein provide efficient wireless communication in a millimeter wave (MMW) phased array system. The system may comprise a plurality of antenna elements, each of the plurality of antenna elements coupled to a transceiver and transceiver having at least one power amplifier. The system may further comprise a gain controller configured to enable or disable the transceivers in response to a power detector output indicating that one or more antenna elements are blocked. Disabling certain transceivers of blocked antenna elements enables the power amplifiers associated with the unblocked antenna elements to continue to operate at maximum efficiency.
    Type: Application
    Filed: February 6, 2015
    Publication date: August 11, 2016
    Inventors: Vladimir Aparin, Karim Arabi
  • Patent number: 9413400
    Abstract: A method, an apparatus, and system for filtering a signal in a carrier aggregation system are provided. The apparatus processes carriers via at least two respective paths. Each path receives, via a transconducting module, an input signal and generates a current signal based on the input signal, shifts, via a mixing module, a frequency of the current signal by mixing the current signal with a local oscillating signal corresponding to a respective path, and generates, via an amplifying module, an output voltage signal based on the frequency-shifted signal and a response of the respective path. The apparatus attenuates, via a filtering module, a jamming signal in the input signal to produce responses for the at least two paths, respectively. A response for the respective path has a maximum input impedance at a frequency of the local oscillating signal corresponding to the respective path.
    Type: Grant
    Filed: April 30, 2015
    Date of Patent: August 9, 2016
    Assignee: QUALCOMM Incorporated
    Inventors: Hajir Hedayati, Vladimir Aparin
  • Patent number: 9391650
    Abstract: Front-end radio frequency (RF) filters with embedded impedance transformation are disclosed. In an exemplary design, an apparatus includes an active circuit and an RF filter. The active circuit receives an input signal and provides an output signal. The RF filter is operatively coupled to an antenna and the active circuit and performs filtering for the input signal or output signal. The RF filter is impedance matched to the active circuit and includes a non-LC filter. In an exemplary design, the active circuit includes a low noise amplifier (LNA), and the RF filter includes a receive (RX) filter having an output impedance that is matched to an input impedance of the LNA. In another exemplary design, the active circuit includes a power amplifier, and the RF filter includes a transmit (TX) filter having an input impedance that is matched to an output impedance of the power amplifier.
    Type: Grant
    Filed: May 5, 2011
    Date of Patent: July 12, 2016
    Assignee: QUALCOMM Incorporated
    Inventor: Vladimir Aparin
  • Patent number: 9367797
    Abstract: Certain aspects of the present disclosure provide methods and apparatus for spiking neural computation of general linear systems. One example aspect is a neuron model that codes information in the relative timing between spikes. However, synaptic weights are unnecessary. In other words, a connection may either exist (significant synapse) or not (insignificant or non-existent synapse). Certain aspects of the present disclosure use binary-valued inputs and outputs and do not require post-synaptic filtering. However, certain aspects may involve modeling of connection delays (e.g., dendritic delays). A single neuron model may be used to compute any general linear transformation x=AX+BU to any arbitrary precision. This neuron model may also be capable of learning, such as learning input delays (e.g., corresponding to scaling values) to achieve a target output delay (or output value). Learning may also be used to determine a logical relation of causal inputs.
    Type: Grant
    Filed: February 8, 2012
    Date of Patent: June 14, 2016
    Inventors: Jason Frank Hunzinger, Vladimir Aparin