Patents by Inventor Vladimir Dmitriev
Vladimir Dmitriev has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 6613143Abstract: A method for growing bulk GaN and AlGaN single crystal boules, preferably using a modified HVPE process, is provided. The single crystal boules typically have a volume in excess of 4 cubic centimeters with a minimum dimension of approximately 1 centimeter. If desired, the bulk material can be doped during growth to achieve n-, i-, or p-type conductivity. In order to have growth cycles of sufficient duration, preferably an extended Ga source is used in which a portion of the Ga source is maintained at a relatively high temperature while most of the Ga source is maintained at a temperature close to, and just above, the melting temperature of Ga. To grow large boules of AlGaN, preferably multiple Al sources are used, the Al sources being sequentially activated to avoid Al source depletion and excessive degradation.Type: GrantFiled: July 6, 2001Date of Patent: September 2, 2003Assignee: Technologies and Devices International, Inc.Inventors: Yuri V. Melnik, Vitali Soukhoveev, Vladimir Ivantsov, Katie Tsvetkov, Vladimir A. Dmitriev
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Patent number: 6599133Abstract: A method for fabricating p-type, i-type, and n-type III-V compound materials using HVPE techniques is provided. If desired, these materials can be grown directly onto the surface of a substrate without the inclusion of a low temperature buffer layer. By growing multiple layers of differing conductivity, a variety of different device structures can be fabricated including simple p-n homojunction and heterojunction structures as well as more complex structures in which the p-n junction, either homojunction or heterojunction, is interposed between a pair of wide band gap material layers. The provided method can also be used to fabricate a device in which a non-continuous quantum dot layer is grown within the p-n junction. The quantum dot layer is comprised of a plurality of quantum dot regions, each of which is typically between approximately 20 and 30 Angstroms per axis.Type: GrantFiled: May 18, 2001Date of Patent: July 29, 2003Assignee: Technologies and Devices International, Inc.Inventors: Audrey E. Nikolaev, Yuri V. Melnik, Konstantin V. Vassilevski, Vladimir A. Dmitriev
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Patent number: 6579359Abstract: A method is disclosed for fabricating monocrystal material with the bandgap width exceeding 1.8 eV. The method comprises the steps of processing a monocrystal semiconductor wafer to develop a porous layer through electrolytic treatment of the wafer at direct current under UV-illumination, and epitaxially growing a monocrystal layer on said porous layer. Growth on porous layer produces semiconductor material with reduced stress and better characteristics than with the same material grown on non-porous layers and substrates. Also, semiconductor device structure comprising at least one layer of porous group III material is included.Type: GrantFiled: June 2, 2000Date of Patent: June 17, 2003Assignee: Technologies and Devices International, Inc.Inventors: Marina Mynbaeva, Denis Tsvetkov, Vladimir Dmitriev, Alexander Lebedev, Nataliya Savkina, Alexander Syrkin, Stephen Saddow, Karim Mynbaev
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Patent number: 6576054Abstract: A method for growing bulk GaN and AlGaN single crystal boules, preferably using a modified HVPE process, is provided. The single crystal boules typically have a volume in excess of 4 cubic centimeters with a minimum dimension of approximately 1 centimeter. If desired, the bulk material can be doped during growth to achieve n-, i-, or p-type conductivity. In order to have growth cycles of sufficient duration, preferably an extended Ga source is used in which a portion of the Ga source is maintained at a relatively high temperature while most of the Ga source is maintained at a temperature close to, and just above, the melting temperature of Ga. To grow large boules of AlGaN, preferably multiple Al sources are used, the Al sources being sequentially activated to avoid Al source depletion and excessive degradation.Type: GrantFiled: July 9, 2001Date of Patent: June 10, 2003Assignee: Technologies and Devices International, Inc.Inventors: Yuri V. Melnik, Vitali Soukhoveev, Vladimir Ivantsov, Katie Tsvetkov, Vladimir A. Dmitriev
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Patent number: 6573164Abstract: A method and apparatus for fabricating thin Group III nitride layers as well as Group III nitride layers that exhibit sharp layer-to-layer interfaces are provided. According to one aspect, an HVPE reactor includes one or more gas inlet tubes adjacent to the growth zone, thus allowing fine control of the delivery of reactive gases to the substrate surface. According to another aspect, an HVPE reactor includes both a growth zone and a growth interruption zone. According to another aspect, an HVPE reactor includes a slow growth rate gallium source, thus allowing thin layers to be grown. Using the slow growth rate gallium source in conjunction with a conventional gallium source allows a device structure to be fabricated during a single furnace run that includes both thick layers (i.e., utilizing the conventional gallium source) and thin layers (i.e., utilizing the slow growth rate gallium source).Type: GrantFiled: March 28, 2002Date of Patent: June 3, 2003Assignee: Technologies and Devices International, Inc.Inventors: Denis V. Tsvetkov, Andrey E. Nikolaev, Vladimir A. Dmitriev
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Patent number: 6566626Abstract: A method and apparatus for generating colored images of at least one color within a light-sensitive glass sample. The glass sample contains light-sensitive chemical components that acquire at least one of a multiplicity of colors in response to actinic radiation and subsequent heating to a temperature that causes color to appear. The method comprises focusing a pulsed laser beam to a target location within the glass, irradiating a plurality of pulses focused in the target location within the glass sample, thus generating a zone of increased opacity to the visible light at the target location and a resultant localized actinic radiation at that zone, displacing the focus point of the laser beam and the glass sample relative to each other by the displacing device in a predetermined manner so as to produce a plurality of zones of increased opacity that form an image, and heating of the sample to a temperature that causes color to appear at the zones of increased opacity.Type: GrantFiled: July 3, 2001Date of Patent: May 20, 2003Assignee: Laserglass Ltd.Inventors: Grigory Gaissinsky, Victor Kopelev, Stella Kopelev, Sergey Oshemkov, Nikolay Guletsky, Vladimir Dmitriev
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Patent number: 6562124Abstract: A novel method for growing semiconductor material including GaN is disclosed. The method involves placing a first substance into a growth reactor, supplying a second gaseous substance into the grouth reactor, and applying electrical field to the second gaseous substance to produce the cry stalline compound material.Type: GrantFiled: June 2, 2000Date of Patent: May 13, 2003Assignee: Technologies and Devices International, Inc.Inventors: Vladimir Ivantzov, Vitaliy Sukhoveev, Vladimir Dmitriev
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Patent number: 6559467Abstract: A method for fabricating p-type, i-type, and n-type III-V compound materials using HVPE techniques is provided. If desired, these materials can be grown directly onto the surface of a substrate without the inclusion of a low temperature buffer layer. By growing multiple layers of differing conductivity, a variety of different device structures can be fabricated including simple p-n homojunction and heterojunction structures as well as more complex structures in which the p-n junction, either homojunction or heterojunction, is interposed between a pair of wide band gap material layers. The provided method can also be used to fabricate a device in which a non-continuous quantum dot layer is grown within the p-n junction. The quantum dot layer is comprised of a plurality of quantum dot regions, each of which is typically between approximately 20 and 30 Angstroms per axis. The quantum dot layer is preferably comprised of AlxByInzGa1-x-y-zN, InGaN1-a-bPaAsb, or AlxByInzGa1-x-y-zN1-a-bPaAsb.Type: GrantFiled: May 17, 2001Date of Patent: May 6, 2003Assignee: Technologies and Devices International, Inc.Inventors: Audrey E. Nikolaev, Yuri V. Melnik, Konstantin V. Vassilevski, Vladimir A. Dmitriev
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Patent number: 6559038Abstract: A method for fabricating p-type, i-type, and n-type III-V compound materials using HVPE techniques is provided. If desired, these materials can be grown directly onto the surface of a substrate without the inclusion of a low temperature buffer layer. By growing multiple layers of differing conductivity, a variety of different device structures can be fabricated including simple p-n homojunction and heterojunction structures as well as more complex structures in which the p-n junction, either homojunction or heterojunction, is interposed between a pair of wide band gap material layers. The provided method can also be used to fabricate a device in which a non-continuous quantum dot layer is grown within the p-n junction. The quantum dot layer is comprised of a plurality of quantum dot regions, each of which is typically between approximately 20 and 30 Angstroms per axis.Type: GrantFiled: May 18, 2001Date of Patent: May 6, 2003Assignee: Technologies and Devices International, Inc.Inventors: Audrey E. Nikolaev, Yuri V. Melnik, Konstantin V. Vassilevski, Vladimir A. Dmitriev
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Patent number: 6555452Abstract: A method for fabricating p-type, i-type, and n-type III-V compound materials using HVPE techniques is provided. If desired, these materials can be grown directly onto the surface of a substrate without the inclusion of a low temperature buffer layer. By growing multiple layers of differing conductivity, a variety of different device structures can be fabricated including simple p-n homojunction and heterojunction structures as well as more complex structures in which the p-n junction, either homojunction or heterojunction, is interposed between a pair of wide band gap material layers. The provided method can also be used to fabricate a device in which a non-continuous quantum dot layer is grown within the p-n junction. The quantum dot layer is comprised of a plurality of quantum dot regions, each of which is typically between approximately 20 and 30 Angstroms per axis. The quantum dot layer is preferably comprised of AlxByInzGa1-x-y-zN, InGaN1-a-bPaAsb, or AlxByInzGa1-x-y-zN1-a-bPaAsb.Type: GrantFiled: May 17, 2001Date of Patent: April 29, 2003Assignee: Technologies and Devices International, Inc.Inventors: Audrey E. Nikolaev, Yuri V. Melnik, Konstantin V. Vassilevski, Vladimir A. Dmitriev
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Publication number: 20030049898Abstract: A method for fabricating a p-n heterojunction device is provided, the device being preferably comprised of an n-type GaN layer co-doped with silicon and zinc and a p-type AlGaN layer. The device may also include a p-type GaN capping layer. The device can be grown on any of a variety of different base substrates, the base substrate comprised of either a single substrate or a single substrate and an intermediary layer. The device can be grown directly onto the surface of the substrate without the inclusion of a low temperature buffer layer.Type: ApplicationFiled: August 9, 2002Publication date: March 13, 2003Inventors: Sergey Karpov, Alexander Usikov, Heikki I. Helava, Denis Tsvetkov, Vladimir A. Dmitriev
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Publication number: 20030015509Abstract: A method and apparatus for generating colored images of at least one color within a light-sensitive glass sample. The glass sample contains light-sensitive chemical components that acquire at least one of a multiplicity of colors in response to actinic radiation and subsequent heating to a temperature that causes color to appear. The method comprises focusing a pulsed laser beam to a target location within the glass, irradiating a plurality of pulses focused in the target location within the glass sample, thus generating a zone of increased opacity to the visible light at the target location and a resultant localized actinic radiation at that zone, displacing the focus point of the laser beam and the glass sample relative to each other by the displacing device in a predetermined manner so as to produce a plurality of zones of increased opacity that form an image, and heating of the sample to a temperature that causes color to appear at the zones of increased opacity.Type: ApplicationFiled: July 3, 2001Publication date: January 23, 2003Inventors: Grigory Gaissinsky, Victor Kopelev, Stella Kopelev, Sergey Oshemkov, Nikolay Guletsky, Vladimir Dmitriev
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Publication number: 20020177312Abstract: A method and apparatus for fabricating thin Group III nitride layers as well as Group III nitride layers that exhibit sharp layer-to-layer interfaces are provided. According to one aspect, an HVPE reactor includes one or more gas inlet tubes adjacent to the growth zone, thus allowing fine control of the delivery of reactive gases to the substrate surface. According to another aspect, an HVPE reactor includes both a growth zone and a growth interruption zone. According to another aspect, an HVPE reactor includes a slow growth rate gallium source, thus allowing thin layers to be grown. Using the slow growth rate gallium source in conjunction with a conventional gallium source allows a device structure to be fabricated during a single furnace run that includes both thick layers (i.e., utilizing the conventional gallium source) and thin layers (i.e., utilizing the slow growth rate gallium source).Type: ApplicationFiled: March 28, 2002Publication date: November 28, 2002Applicant: Technologies & Devices International, Inc.Inventors: Denis V. Tsvetkov, Andrey E. Nikolaev, Vladimir A. Dmitriev
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Publication number: 20020174833Abstract: A method and apparatus for fabricating thin Group III nitride layers as well as Group III nitride layers that exhibit sharp layer-to-layer interfaces are provided. According to one aspect, an HVPE reactor includes one or more gas inlet tubes adjacent to the growth zone, thus allowing fine control of the delivery of reactive gases to the substrate surface. According to another aspect, an HVPE reactor includes both a growth zone and a growth interruption zone. According to another aspect, an HVPE reactor includes a slow growth rate gallium source, thus allowing thin layers to be grown. Using the slow growth rate gallium source in conjunction with a conventional gallium source allows a device structure to be fabricated during a single furnace run that includes both thick layers (i.e., utilizing the conventional gallium source) and thin layers (i.e., utilizing the slow growth rate gallium source).Type: ApplicationFiled: March 28, 2002Publication date: November 28, 2002Applicant: Technologies & Devices International, Inc.Inventors: Denis V. Tsvetkov, Andrey E. Nikolaev, Vladimir A. Dmitriev
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Patent number: 6479839Abstract: A method for fabricating p-type, i-type, and n-type III-V compound materials using HVPE techniques is provided. If desired, these materials can be grown directly onto the surface of a substrate without the inclusion of a low temperature buffer layer. By growing multiple layers of differing conductivity, a variety of different device structures can be fabricated including simple p-n homojunction and heterojunction structures as well as more complex structures in which the p-n junction, either homojunction or heterojunction, is interposed between a pair of wide band gap material layers. The provided method can also be used to fabricate a device in which a non-continuous quantum dot layer is grown within the p-n junction. The quantum dot layer is comprised of a plurality of quantum dot regions, each of which is typically between approximately 20 and 30 Angstroms per axis.Type: GrantFiled: May 18, 2001Date of Patent: November 12, 2002Assignee: Technologies & Devices International, Inc.Inventors: Audrey E. Nikolaev, Yuri V. Melnik, Konstantin V. Vassilevski, Vladimir A. Dmitriev
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Patent number: 6476420Abstract: A method for fabricating p-type, i-type, and n-type III-V compound materials using HVPE techniques is provided. If desired, these materials can be grown directly onto the surface of a substrate without the inclusion of a low temperature buffer layer. By growing multiple layers of differing conductivity, a variety of different device structures can be fabricated including simple p-n homojunction and heterojunction structures as well as more complex structures in which the p-n junction, either homojunction or heterojunction, is interposed between a pair of wide band gap material layers. The provided method can also be used to fabricate a device in which a non-continuous quantum dot layer is grown within the p-n junction. The quantum dot layer is comprised of a plurality of quantum dot regions, each of which is typically between approximately 20 and 30 Angstroms per axis.Type: GrantFiled: May 17, 2001Date of Patent: November 5, 2002Assignee: Technologies and Devices International, Inc.Inventors: Audrey E. Nikolaev, Yuri V. Melnik, Konstantin V. Vassilevski, Vladimir A. Dmitriev
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Patent number: 6472300Abstract: A method for fabricating p-type, i-type, and n-type III-V compound materials using HVPE techniques is provided. If desired, these materials can be grown directly onto the surface of a substrate without the inclusion of a low temperature buffer layer. By growing multiple layers of differing conductivity, a variety of different device structures can be fabricated including simple p-n homojunction and heterojunction structures as well as more complex structures in which the p-n junction, either homojunction or heterojunction, is interposed between a pair of wide band gap material layers. The provided method can also be used to fabricate a device in which a non-continuous quantum dot layer is grown within the p-n junction. The quantum dot layer is comprised of a plurality of quantum dot regions, each of which is typically between approximately 20 and 30 Angstroms per axis.Type: GrantFiled: May 18, 2001Date of Patent: October 29, 2002Assignee: Technologies and Devices International, Inc.Inventors: Audrey E. Nikolaev, Yuri V. Melnik, Konstantin V. Vassilevski, Vladimir A. Dmitriev
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Publication number: 20020155713Abstract: A method and apparatus for fabricating thin Group III nitride layers as well as Group III nitride layers that exhibit sharp layer-to-layer interfaces are provided. According to one aspect, an HVPE reactor includes one or more gas inlet tubes adjacent to the growth zone, thus allowing fine control of the delivery of reactive gases to the substrate surface. According to another aspect, an HVPE reactor includes both a growth zone and a growth interruption zone. According to another aspect, an HVPE reactor includes a slow growth rate gallium source, thus allowing thin layers to be grown. Using the slow growth rate gallium source in conjunction with a conventional gallium source allows a device structure to be fabricated during a single furnace run that includes both thick layers (i.e., utilizing the conventional gallium source) and thin layers (i.e., utilizing the slow growth rate gallium source).Type: ApplicationFiled: March 28, 2002Publication date: October 24, 2002Applicant: Technologies & Devices International, Inc.Inventors: Denis V. Tsvetkov, Andrey E. Nikolaev, Vladimir A. Dmitriev
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Publication number: 20020152951Abstract: A method and apparatus for fabricating thin Group III nitride layers as well as Group III nitride layers that exhibit sharp layer-to-layer interfaces are provided. According to one aspect, an HVPE reactor includes one or more gas inlet tubes adjacent to the growth zone, thus allowing fine control of the delivery of reactive gases to the substrate surface. According to another aspect, an HVPE reactor includes both a growth zone and a growth interruption zone. According to another aspect, an HVPE reactor includes a slow growth rate gallium source, thus allowing thin layers to be grown. Using the slow growth rate gallium source in conjunction with a conventional gallium source allows a device structure to be fabricated during a single furnace run that includes both thick layers (i.e., utilizing the conventional gallium source) and thin layers (i.e., utilizing the slow growth rate gallium source).Type: ApplicationFiled: March 28, 2002Publication date: October 24, 2002Inventors: Denis V. Tsvetkov, Andrey E. Nikolaev, Vladimir A. Dmitriev
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Publication number: 20020155683Abstract: A method and apparatus for fabricating thin Group III nitride layers as well as Group III nitride layers that exhibit sharp layer-to-layer interfaces are provided. According to one aspect, an HVPE reactor includes one or more gas inlet tubes adjacent to the growth zone, thus allowing fine control of the delivery of reactive gases to the substrate surface. According to another aspect, an HVPE reactor includes both a growth zone and a growth interruption zone. According to another aspect, an HVPE reactor includes a slow growth rate gallium source, thus allowing thin layers to be grown. Using the slow growth rate gallium source in conjunction with a conventional gallium source allows a device structure to be fabricated during a single furnace run that includes both thick layers (i.e., utilizing the conventional gallium source) and thin layers (i.e., utilizing the slow growth rate gallium source).Type: ApplicationFiled: March 28, 2002Publication date: October 24, 2002Inventors: Denis V. Tsvetkov, Andrey E. Nikolaev, Vladimir A. Dmitriev