Patents by Inventor Vladimir Dmitriev

Vladimir Dmitriev has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020086245
    Abstract: A method and apparatus for manufacturing patterns on a reticle blank comprising a substrate made from material transparent to UV irradiation and having a first surface and a second opposite surface, the first surface coated with a chrome layer. The method comprises providing ultra-short pulsed laser beams, focusing means, relative displacement facilitator for facilitating relative displacement of the reticle blank relative to said at least one of a plurality of target locations, and a controller for controlling the synchronization and operation of the laser beam source, the focusing means and the relative displacement facilitator. Ultra-short pulsed laser beam is irradiated in a predetermined pattern directed at the second surface and passing through the substrate, focused on the chrome layer or on its proximity.
    Type: Application
    Filed: September 10, 2001
    Publication date: July 4, 2002
    Inventors: Eitan Zait, Vladimir Dmitriev, Nikolay Guletsky, Sergei Oshemkov
  • Publication number: 20020053679
    Abstract: A method for fabricating p-type, i-type, and n-type III-V compound materials using HVPE techniques is provided. If desired, these materials can be grown directly onto the surface of a substrate without the inclusion of a low temperature buffer layer. By growing multiple layers of differing conductivity, a variety of different device structures can be fabricated including simple p-n homojunction and heterojunction structures as well as more complex structures in which the p-n junction, either homojunction or heterojunction, is interposed between a pair of wide band gap material layers. The provided method can also be used to fabricate a device in which a non-continuous quantum dot layer is grown within the p-n junction. The quantum dot layer is comprised of a plurality of quantum dot regions, each of which is typically between approximately 20 and 30 Angstroms per axis. The quantum dot layer is preferably comprised of AlxByInzGa1-x-y-zN, InGaN1-a-bPaAsb, or AlxByInzGa1-x-y-zN1-a-bPaAsb.
    Type: Application
    Filed: May 17, 2001
    Publication date: May 9, 2002
    Inventors: Audrey E. Nikolaev, Yuri V. Melnik, Konstantin V. Vassilevski, Vladimir A. Dmitriev
  • Publication number: 20020047135
    Abstract: A method for fabricating p-type, i-type, and n-type III-V compound materials using HVPE techniques is provided. If desired, these materials can be grown directly onto the surface of a substrate without the inclusion of a low temperature buffer layer. By growing multiple layers of differing conductivity, a variety of different device structures can be fabricated including simple p-n homojunction and heterojunction structures as well as more complex structures in which the p-n junction, either homojunction or heterojunction, is interposed between a pair of wide band gap material layers. The provided method can also be used to fabricate a device in which a non-continuous quantum dot layer is grown within the p-n junction. The quantum dot layer is comprised of a plurality of quantum dot regions, each of which is typically between approximately 20 and 30 Angstroms per axis. The quantum dot layer is preferably comprised of AlxByInzGa1-x-y-zN, InGaN1-a-bPaAsb, or AlxByInzGa1-x-y-zN1-a-bPaAsb.
    Type: Application
    Filed: May 17, 2001
    Publication date: April 25, 2002
    Inventors: Audrey E. Nikolaev, Yuri V. Melnik, Konstantin V. Vassilevski, Vladimir A. Dmitriev
  • Publication number: 20020047127
    Abstract: A method for fabricating p-type, i-type, and n-type mn-v compound materials using HVPE techniques is provided. If desired, these materials can be grown directly onto the surface of a substrate without the inclusion of a low temperature buffer layer. By growing multiple layers of differing conductivity, a variety of different device structures can be fabricated including simple p-n homojunction and heterojunction structures as well as more complex structures in which the p-n junction, either homojunction or heterojunction, is interposed between a pair of wide band gap material layers. The provided method can also be used to fabricate a device in which a non-continuous quantum dot layer is grown within the p-n junction. The quantum dot layer is comprised of a plurality of quantum dot regions, each of which is typically between approximately 20 and 30 Angstroms per axis. The quantum dot layer is preferably comprised of AlxByInzGa1-x-y-zN, InGaN1-a-bPaAsb, or AlxByInzGa1-x-y-zN1-a-bPaAsb.
    Type: Application
    Filed: May 17, 2001
    Publication date: April 25, 2002
    Applicant: Technologies & Devices Int.'s Inc.
    Inventors: Audrey E. Nikolaev, Yuri V. Melnik, Konstantin V. Vassilevski, Vladimir A. Dmitriev
  • Publication number: 20020039806
    Abstract: A method for fabricating p-type, i-type, and n-type III-V compound materials using HVPE techniques is provided. If desired, these materials can be grown directly onto the surface of a substrate without the inclusion of a low temperature buffer layer. By growing multiple layers of differing conductivity, a variety of different device structures can be fabricated including simple p-n homojunction and heterojunction structures as well as more complex structures in which the p-n junction, either homojunction or heterojunction, is interposed between a pair of wide band gap material layers. The provided method can also be used to fabricate a device in which a noncontinuous quantum dot layer is grown within the p-n junction. The quantum dot layer is comprised of a plurality of quantum dot regions, each of which is typically between approximately 20 and 30 Angstroms per axis. The quantum dot layer is preferably comprised of AlxByInzGa1-x-y-zN, InGaN1-a-bPaASb, or AlxByInzGa1-x-y-zN1-a-bPaAsb.
    Type: Application
    Filed: May 18, 2001
    Publication date: April 4, 2002
    Inventors: Audrey E. Nikolaev, Yuri V. Melnik, Konstantin V. Vassilevski, Vladimir A. Dmitriev
  • Publication number: 20020030192
    Abstract: A method for fabricating p-type, i-type, and n-type III-V compound materials using HVPE techniques is provided. If desired, these materials can be grown directly onto the surface of a substrate without the inclusion of a low temperature buffer layer. By growing multiple layers of differing conductivity, a variety of different device structures can be fabricated including simple p-n homojunction and heterojunction structures as well as more complex structures in which the p-n junction, either homojunction or heterojunction, is interposed between a pair of wide band gap material layers. The provided method can also be used to fabricate a device in which a non-continuous quantum dot layer is grown within the p-n junction. The quantum dot layer is comprised of a plurality of quantum dot regions, each of which is typically between approximately 20 and 30 Angstroms per axis. The quantum dot layer is preferably comprised of AlxByInzGa1-x-y-zN, InGaN1-a-bPaAsb, or AlxByInzGa1-x-y-zN1-a-bPaAsb.
    Type: Application
    Filed: May 18, 2001
    Publication date: March 14, 2002
    Applicant: Technologies & Devices
    Inventors: Audrey E. Nikolaev, Yuri V. Melnik, Konstantin V. Vassilevski, Vladimir A. Dmitriev
  • Publication number: 20020028565
    Abstract: A method for fabricating p-type, i-type, and n-type III-V compound materials using HVPE techniques is provided. If desired, these materials can be grown directly onto the surface of a substrate without the inclusion of a low temperature buffer layer. By growing multiple layers of differing conductivity, a variety of different device structures can be fabricated including simple p-n homojunction and heterojunction structures as well as more complex structures in which the p-n junction, either homojunction or heterojunction, is interposed between a pair of wide band gap material layers. The provided method can also be used to fabricate a device in which a non-continuous quantum dot layer is grown within the p-n junction. The quantum dot layer is comprised of a plurality of quantum dot regions, each of which is typically between approximately 20 and 30 Angstroms per axis. The quantum dot layer is preferably comprised of AlxByInzGa1-x-y-zN, InGaN1-a-bPaAsb, or AlxByInzGa1-x-y-zN1-a-bPaAsb.
    Type: Application
    Filed: May 17, 2001
    Publication date: March 7, 2002
    Inventors: Audrey E. Nikolaev, Yuri V. Melnik, Konstantin V. Vassilevski, Vladimir A. Dmitriev
  • Publication number: 20020025661
    Abstract: A method for fabricating p-type, i-type, and n-type III-V compound materials using HVPE techniques is provided. If desired, these materials can be grown directly onto the surface of a substrate without the inclusion of a low temperature buffer layer. By growing multiple layers of differing conductivity, a variety of different device structures can be fabricated including simple p-n homojunction and heterojunction structures as well as more complex structures in which the p-n junction, either homojunction or heterojunction, is interposed between a pair of wide band gap material layers. The provided method can also be used to fabricate a device in which a non-continuous quantum dot layer is grown within the p-n junction. The quantum dot layer is comprised of a plurality of quantum dot regions, each of which is typically between approximately 20 and 30 Angstroms per axis.
    Type: Application
    Filed: May 18, 2001
    Publication date: February 28, 2002
    Inventors: Audrey E. Nikolaev, Yuri V. Melnik, Konstantin V. Vassilevski, Vladimir A. Dmitriev
  • Publication number: 20020022286
    Abstract: A method for fabricating p-type, i-type, and n-type III-V compound materials using HVPE techniques is provided. If desired, these materials can be grown directly onto the surface of a substrate without the inclusion of a low temperature buffer layer. By growing multiple layers of differing conductivity, a variety of different device structures can be fabricated including simple p-n homojunction and heterojunction structures as well as more complex structures in which the p-n junction, either homojunction or heterojunction, is interposed between a pair of wide band gap material layers. The provided method can also be used to fabricate a device in which a non-continuous quantum dot layer is grown within the p-n junction. The quantum dot layer is comprised of a plurality of quantum dot regions, each of which is typically between approximately 20 and 30 Angstroms per axis.
    Type: Application
    Filed: May 18, 2001
    Publication date: February 21, 2002
    Inventors: Audrey E. Nikolaev, Yuri V. Melnik, Konstantin V. Vassilevski, Vladimir A. Dmitriev
  • Publication number: 20020017650
    Abstract: A method for fabricating p-type, i-type, and n-type III-V compound materials using HVPE techniques is provided. If desired, these materials can be grown directly onto the surface of a substrate without the inclusion of a low temperature buffer layer. By growing multiple layers of differing conductivity, a variety of different device structures can be fabricated including simple p-n homojunction and heterojunction structures as well as more complex structures in which the p-n junction, either homojunction or heterojunction, is interposed between a pair of wide band gap material layers. The provided method can also be used to fabricate a device in which a non-continuous quantum dot layer is grown within the p-n junction. The quantum dot layer is comprised of a plurality of quantum dot regions, each of which is typically between approximately 20 and 30 Angstroms per axis. The quantum dot layer is preferably comprised of AlxByInzGa1-x-y-zN, InGaN1-a-bPaAsb, or AlxByInzGa1-x-y-zN1-a-bPaAsb.
    Type: Application
    Filed: May 18, 2001
    Publication date: February 14, 2002
    Applicant: Technologies & Devices
    Inventors: Audrey E. Nikolaev, Yuri V. Melnik, Konstantin V. Vassilevski, Vladimir A. Dmitriev
  • Patent number: 6218269
    Abstract: A process is disclosed for producing pn junctions and p-i-n junctions from group III nitride compound semiconductor materials. The process comprises growing of pn junctions and p-i-n junctions by hydride vapor phase epitaxy employing hydride of nitrogen (ammonia, hydrozine) as a source of nitrogen and halides of group III metal as a source of metal. Mg is used as acceptor impurity to form p-type III-V nitride layers. The preferred sources for Ga and Al are Ga and Al metals, respectively. The process is carried out in the temperature range from 900 to 1200° C.
    Type: Grant
    Filed: November 18, 1998
    Date of Patent: April 17, 2001
    Assignee: Technology and Devices International, Inc.
    Inventors: Andrey E. Nikolaev, Yuri V. Melnik, Konstantin V. Vassilevski, Vladimir A. Dmitriev
  • Patent number: 5679153
    Abstract: A method is disclosed for producing epitaxial layers of silicon carbide that are substantially free of micropipe defects. The method comprises growing an epitaxial layer of silicon carbide on a silicon carbide substrate by liquid phase epitaxy from a melt of silicon carbide in silicon and an element that enhances the solubility of silicon carbide in the melt. The atomic percentage of that element predominates over the atomic percentage of silicon in the melt. Micropipe defects propagated by the substrate into the epitaxial layer are closed by continuing to grow the epitaxial layer under the proper conditions until the epitaxial layer has a thickness at which micropipe defects present in the substrate are substantially no longer reproduced in the epitaxial layer, and the number of micropipe defects in the epitaxial layer is substantially reduced.
    Type: Grant
    Filed: November 30, 1994
    Date of Patent: October 21, 1997
    Assignee: Cree Research, Inc.
    Inventors: Vladimir A. Dmitriev, Svetlana V. Rendakova, Vladimir A. Ivantsov, Calvin H. Carter, Jr.
  • Patent number: 5523589
    Abstract: A light emitting diode emits in the blue portion of the visible spectrum and is characterized by an extended lifetime. The light emitting diode comprises a conductive silicon carbide substrate; an ohmic contact to the silicon carbide substrate; a conductive buffer layer on the substrate and selected from the group consisting of gallium nitride, aluminum nitride, indium nitride, ternary Group III nitrides having the formula A.sub.x B.sub.1-x N, where A and B are Group III elements and where x is zero, one, or a fraction between zero and one, and alloys of silicon carbide with such ternary Group III nitrides; and a double heterostructure including a p-n junction on the buffer layer in which the active and heterostructure layers are selected from the group consisting of binary Group III nitrides and ternary Group III nitrides.
    Type: Grant
    Filed: September 20, 1994
    Date of Patent: June 4, 1996
    Assignee: Cree Research, Inc.
    Inventors: John A. Edmond, Gary E. Bulman, Hua-Shuang Kong, Vladimir Dmitriev
  • Patent number: 5393993
    Abstract: A transition crystal structure is disclosed for providing a good lattice and thermal match between a layer of single crystal silicon carbide and a layer of single crystal gallium nitride. The transition structure comprises a buffer formed of a first layer of gallium nitride and aluminum nitride, and a second layer of gallium nitride and aluminum nitride adjacent to the first layer. The mole percentage of aluminum nitride in the second layer is substantially different from the mole percentage of aluminum nitride in the first layer. A layer of single crystal gallium nitride is formed upon the second layer of gallium nitride. In preferred embodiments, the buffer further comprises an epitaxial layer of aluminum nitride upon a silicon carbide substrate.
    Type: Grant
    Filed: December 13, 1993
    Date of Patent: February 28, 1995
    Assignee: Cree Research, Inc.
    Inventors: John A. Edmond, Vladimir Dmitriev, Kenneth Irvine
  • Patent number: 5338944
    Abstract: A light emitting diode is disclosed that emits light in the blue region of the visible spectrum with increased brightness and efficiency. The light emitting diode comprises an n-type silicon carbide substrate; an n-type silicon carbide top layer; and a light emitting p-n junction structure between the n-type substrate and the n-type top layer. The p-n junction structure is formed of respective portions of n-type silicon carbide and p-type silicon carbide. The diode further includes means between the n-type top layer and the n-type substrate for coupling the n-type top layer to the light-emitting p-n junction structure while preventing n-p-n behavior between the n-type top layer, the p-type layer in the junction structure, and the n-type substrate.
    Type: Grant
    Filed: September 22, 1993
    Date of Patent: August 16, 1994
    Assignee: Cree Research, Inc.
    Inventors: John A. Edmond, Hua-Shuang Kong, Vladimir Dmitriev, Gary E. Bulman
  • Patent number: 4300202
    Abstract: A method of weight determination of the amount of a substance possessing fluidity quality, carried out in a continuous flow of the substance, which method comprises the steps as follows: periodically loading a number of reservoirs with the substance being fed therein continuously until a preset upper range is reached which is determined by at least one of the characteristics including the volume and weight of the substance and load time; weighing each of the reservoirs for the preset upper range after a time interval corresponding to the setup time for the reservoir with the substance; unloading each of the reservoirs to obtain the preset lower range and weighing each of the reservoirs for the preset lower range after a time interval corresponding to the setup time for the reservoir with the substance; unloading each of the reservoirs in coincidence with loading one of the remaining reservoirs and with unloading at least one of the remaining reservoirs; and determining the total amount of the substance using
    Type: Grant
    Filed: October 16, 1979
    Date of Patent: November 10, 1981
    Inventors: Vladimir M. Chizhikov, Leonid A. Matskin, Mikhail N. Fokin, Boris P. Timofeev, Mark N. Tokar, Ruben D. Balayan, German A. Trubin, Alexandr M. Melik-Shakhnazarov, Dmitry A. Barabashov, Vladimir A. Dmitriev, Sergei V. Vakhlyaev