Abstract: An image sensor may have control circuitry and an array of pixels having corresponding photodiodes. The pixels may be arranged into groups. Photodiodes in each of the groups may share a common charge storage region. Each photodiode has an associated sensitivity provided by a corresponding color filter element. The control circuitry may perform multiple charge transfer operations to transfer charge accumulated in high sensitivity photodiodes in the group to the shared charge storage region, may readout image signals corresponding to the transferred charge, and may combine the image signals to generate final image signals for the photodiodes. The control circuitry may transfer charge accumulated in low sensitivity photodiodes in the group to the shared charge storage region after the image signals generated by the high sensitivity photodiodes have been read out, thereby increasing the maximum signal to noise ratio of the low sensitivity photodiodes without causing charge blooming.

Abstract: An image sensor. Implementations may include: a first die including a plurality of pixels; a second die including a plurality of transistors, capacitors, or both transistors and capacitors; a third die including analog circuitry, logic circuitry, or analog and logic circuitry. The first die may be hybrid bonded to the second die, and the second die may be fusion bonded to the third die. The plurality of transistors, capacitors or transistors and capacitors of the second die may be adapted to enable operation of the plurality of pixels of the first die. The analog circuitry, logic circuitry, and analog circuitry and logical circuitry may be adapted to perform signal routing.

Abstract: An image sensor may be provided with an array of image pixels formed on a substrate having front and back surfaces. Each pixel may have a photodiode that receives light through the back surface, a floating diffusion node, and a charge transfer gate. The floating diffusion node may be formed in the center of the photodiode and may be surrounded by the charge transfer gate at the front surface. The charge transfer gate may isolate the floating diffusion node from the surrounding photodiode. The pixel may include reset transistor gates, an addressing transistor gate, and a source follower transistor arranged about the periphery of the photodiode. By centering the floating diffusion node and charge transfer gate within the photodiode, the image pixels may have improved shutter efficiency and charge transfer efficiency relative to pixels having floating diffusion nodes at non-centralized locations.

Abstract: An image sensor may be provided with an array of image pixels formed on a substrate having front and back surfaces. Each pixel may have a photodiode that receives light through the back surface, a floating diffusion node, and a charge transfer gate. The floating diffusion node may be formed in the center of the photodiode and may be surrounded by the charge transfer gate at the front surface. The charge transfer gate may isolate the floating diffusion node from the surrounding photodiode. The pixel may include reset transistor gates, an addressing transistor gate, and a source follower transistor arranged about the periphery of the photodiode. By centering the floating diffusion node and charge transfer gate within the photodiode, the image pixels may have improved shutter efficiency and charge transfer efficiency relative to pixels having floating diffusion nodes at non-centralized locations.

Abstract: An embodiment of a capacitive sensor array may comprise a first set of sensor electrodes each comprising one or more large subelements and a second set of sensor electrodes each comprising one or more small subelements. In one embodiment, each of the small subelements may be smaller than any of the large subelements, and the first set of sensor electrodes and the second set of sensor electrodes are formed from a single layer of conductive material. In one embodiment, the surface area of the capacitive sensor array may be divisible into a grid of N×M unit cells, wherein each of the N×M unit cells contains one of the large subelements and k of the small subelements, where k is greater than or equal to 2.

Abstract: An embodiment of a capacitive sensor array may comprise a first set of sensor electrodes each comprising one or more large subelements and a second set of sensor electrodes each comprising one or more small subelements. In one embodiment, each of the small subelements may be smaller than any of the large subelements, and the first set of sensor electrodes and the second set of sensor electrodes are formed from a single layer of conductive material. In one embodiment, the surface area of the capacitive sensor array may be divisible into a grid of N×M unit cells, wherein each of the N×M unit cells contains one of the large subelements and k of the small subelements, where k is greater than or equal to 2.

Abstract: An image sensor may have control circuitry and an array of pixels having corresponding photodiodes. The pixels may be arranged into groups. Photodiodes in each of the groups may share a common charge storage region. Each photodiode has an associated sensitivity provided by a corresponding color filter element. The control circuitry may perform multiple charge transfer operations to transfer charge accumulated in high sensitivity photodiodes in the group to the shared charge storage region, may readout image signals corresponding to the transferred charge, and may combine the image signals to generate final image signals for the photodiodes. The control circuitry may transfer charge accumulated in low sensitivity photodiodes in the group to the shared charge storage region after the image signals generated by the high sensitivity photodiodes have been read out, thereby increasing the maximum signal to noise ratio of the low sensitivity photodiodes without causing charge blooming.

Abstract: An imaging system may include an image sensor package with through-oxide via connections between the image sensor die and the digital signal processing die in the image sensor package. The image sensor die and the digital signal processing die may be attached to each other. The through-oxide via may connect a bond pad on the image sensor die with metal routing paths in the image sensor and digital signal processing dies. The through-oxide via may simultaneously couple the image sensor die to the digital signal processing die. The through-oxide via may be formed through a shallow trench isolation structure in the image sensor die. The through-oxide via may be formed through selective etching of the image sensor and digital signal processing dies.

Abstract: A method and apparatus for a reverse metal-insulator-metal (MIM) capacitor. The apparatus includes a lower metal layer, a bottom electrode, and an upper metal layer. The lower metal layer is disposed above a substrate layer. The bottom electrode is disposed above the lower metal layer and coupled to the lower metal layer. The upper metal layer is disposed above the bottom electrode. The upper metal layer comprises a top electrode of a metal-insulator-metal (MIM) capacitor.

Abstract: Exemplary systems, methods and apparatuses for a distributed solid-state lighting system are disclosed. An exemplary system comprises a central power source, and one or more terminal lighting apparatuses. An exemplary central power source comprises: an AC/DC rectifier coupled to a DC/DC converter to convert an AC input power to a first DC voltage level; a central user interface to receive user input for a selected brightness level; and a central controller to provide a first control signal to the DC/DC converter to provide a second DC voltage level corresponding to the selected brightness level. A terminal lighting apparatus may comprise: a plurality of LEDs; a current (or power) source or regulator; and a terminal controller which, in response to the second DC voltage level, provides a second control signal to the current source or regulator to provide a selected current level of the LEDs corresponding to the selected brightness level.

Abstract: An image sensor having shield structures and methods of forming the same are provided. Generally, the image sensor includes: (i) substrate having at least one photosensitive element formed therein; (ii) a dielectric layer overlying the substrate and the photosensitive element; and (iii) an annular reflective waveguide disposed in the dielectric layer above the photosensitive element to reduce cross-talk between adjacent elements of the sensor while increasing sensitivity of the sensor. In certain embodiments, the sensor further includes a photoshield disposed in the dielectric above the photosensitive element and about the waveguide to further reduce the possibility of cross-talk. Other embodiments are also disclosed.

Abstract: An image sensor having shield structures and methods of forming the same are provided. Generally, the image sensor includes: (i) substrate having at least one photosensitive element formed therein; (ii) a dielectric layer overlying the substrate and the photosensitive element; and (iii) an annular reflective waveguide disposed in the dielectric layer above the photosensitive element to reduce cross-talk between adjacent elements of the sensor while increasing sensitivity of the sensor. In certain embodiments, the sensor further includes a photoshield disposed in the dielectric above the photosensitive element and about the waveguide to further reduce the possibility of cross-talk. Other embodiments are also disclosed.

Abstract: An image sensor having shield structures and methods of forming the same are provided. Generally, the image sensor includes: (i) substrate having at least one photosensitive element formed therein; (ii) a dielectric layer overlying the substrate and the photosensitive element; and (iii) an annular reflective waveguide disposed in the dielectric layer above the photosensitive element to reduce cross-talk between adjacent elements of the sensor while increasing sensitivity of the sensor. In certain embodiments, the sensor further includes a photoshield disposed in the dielectric above the photosensitive element and about the waveguide to further reduce the possibility of cross-talk. Other embodiments are also disclosed.

Abstract: A method and apparatus for a reverse metal-insulator-metal (MIM) capacitor. The apparatus includes a lower metal layer, a bottom electrode, and an upper metal layer. The lower metal layer is disposed above a substrate layer. The bottom electrode is disposed above the lower metal layer and coupled to the lower metal layer. The upper metal layer is disposed above the bottom electrode. The upper metal layer comprises a top electrode of a metal-insulator-metal (MIM) capacitor.

Abstract: A CMOS image sensor includes a pinned photodiode and a transfer gate that are formed using a thick mask that is self-aligned to at least one edge of the polysilicon gate structure to facilitate both the formation of a deep implant and to provide proper alignment between the photodiode implant and the gate. In one embodiment a drain side implant is formed concurrently with the deep n-type implant of the photodiode. After the deep implant, the mask is removed and a shallow p+ implant is formed to complete the photodiode. In another embodiment, the polysilicon is etched to define only a drain side edge, a shallow drain side implant is performed, and then a thick mask is provided and used to complete the gate structure, and is retained during the subsequent high energy implant. Alternatively, the high energy implant is performed prior to the shallow drain side implant.

Abstract: A CMOS image sensor includes a pinned photodiode and a transfer gate that are formed using a thick mask that is self-aligned to at least one edge of the polysilicon gate structure to facilitate both the formation of a deep implant and to provide proper alignment between the photodiode implant and the gate. In one embodiment a drain side implant is formed concurrently with the deep n-type implant of the photodiode. After the deep implant, the mask is removed and a shallow p+ implant is formed to complete the photodiode. In another embodiment, the polysilicon is etched to define only a drain side edge, a shallow drain side implant is performed, and then a thick mask is provided and used to complete the gate structure, and is retained during the subsequent high energy implant. Alternatively, the high energy implant is performed prior to the shallow drain side implant.

Abstract: A process for fabricating a capacitor in a microcircuit, and the capacitor so fabricated. A first layer of a polycrystalline semiconductor, preferably polysilicon, is deposited. A layer of a binary metallic conductor, preferably tungsten silicide, is deposited on the first layer of polycrystalline semiconductor, and is annealed in an oxidizing atmosphere to produce an oxide layer that serves as the dielectric of the capacitor. A second layer of a polycrystalline semiconductor, also preferably polysilicon, is deposited on the oxide layer. The physical properties (index of refraction, charge to breakdown, breakdown voltage) of the dielectric so created are superior to those of the prior art dielectrics.