Abstract: System for performing in-line nanoprobing on semiconductor wafer. A wafer support or vertical wafer positioner is attached to a wafer stage. An SEM column, an optical microscope and a plurality of nanoprobe positioners are all attached to the ceiling. The nanoprobe positioners have one nanoprobe configured for physically contacting selected points on the wafer. A force (or touch) sensor measures contact force applied by the probe to the wafer (or the moment) when the probe physically contacts the wafer. A plurality of drift sensors are provided for calculating probe vs. wafer alignment drift in real-time during measurements.

Abstract: Apparatus for electrical and optical nanoprobing at resolution beyond optical diffraction limit. Navigation microscope is configured for navigation to a region of interest. A probe spatial positioner supports a fork and an oscillating piezotube is attached to the free end of the fork and provides an output indicating of a distance to the sample. A single-mode optical fiber having a near-field transducer formed at an end thereof is attached to the oscillating piezotube such that the near-field transducer extends below the oscillating piezotube towards the sample. A photodetector is positioned to detect photons collected from the sample. The near-field transducer may be formed as a tapered section formed at the end of the single-mode optical fiber, a metallic coating formed at a tip of the tapered section, and an aperture formed in the metallic coating so as to expose the tip of the tapered section through the metallic coating.

Abstract: A method for testing an integrated circuit (IC) using a nanoprobe, by using a scanning electron microscope (SEM) to register the nanoprobe to an identified feature on the IC; navigating the nanoprobe to a region of interest; scanning the nanoprobe over the surface of the IC while reading data from the nanoprobe; when the data from the nanoprobe indicates that the nanoprobe traverse a feature of interest, decelerating the scanning speed of the nanoprobe and performing testing of the IC. The scanning can be done at a prescribed nanoprobe tip force, and during the step of decelerating the scanning speed, the method further includes increasing the nanoprobe tip force.

Abstract: A method for testing an integrated circuit (IC) using a nanoprobe, by using a scanning electron microscope (SEM) to register the nanoprobe to an identified feature on the IC; navigating the nanoprobe to a region of interest; scanning the nanoprobe over the surface of the IC while reading data from the nanoprobe; when the data from the nanoprobe indicates that the nanoprobe traverse a feature of interest, decelerating the scanning speed of the nanoprobe and performing testing of the IC. The scanning can be done at a prescribed nanoprobe tip force, and during the step of decelerating the scanning speed, the method further includes increasing the nanoprobe tip force.

Abstract: Apparatus for electrical and optical nanoprobing at resolution beyond optical diffraction limit. Navigation microscope is configured for navigation to a region of interest. A probe spatial positioner supports a fork and an oscillating piezotube is attached to the free end of the fork and provides an output indicating of a distance to the sample. A single-mode optical fiber having a near-field transducer formed at an end thereof is attached to the oscillating piezotube such that the near-field transducer extends below the oscillating piezotube towards the sample. A photodetector is positioned to detect photons collected from the sample. The near-field transducer may be formed as a tapered section formed at the end of the single-mode optical fiber, a metallic coating formed at a tip of the tapered section, and an aperture formed in the metallic coating so as to expose the tip of the tapered section through the metallic coating.

Abstract: A charged particle beam, such as an electron beam or an ion beam, scans a device while a signal is applied to the device. As the particle beam scans, it locally heats the device, altering the local electrical characteristics of the device. The change in electrical characteristic is detected to and correlated to the position of the electron beam to localize a defect.

Abstract: A system for performing sample probing. The system including an topography microscope configured to receive three-dimensional coordinates for a sample based on at least three fiducial marks; receive the sample mounted in a holder; and navigate to at least a location on the sample based on the at least three fiducial marks and the three-dimensional coordinates.

Abstract: A method comprising characterizing the dimensions of structures on a semiconductor device having dimensions less than approximately 100 nanometers (nm) using one of scanning probe microscopy (SPM) or profilometry.

Abstract: System for performing in-line nanoprobing on semiconductor wafer. A wafer support or vertical wafer positioner is attached to a wafer stage. An SEM column, an optical microscope and a plurality of nanoprobe positioners are all attached to the ceiling. The nanoprobe positioners have one nanoprobe configured for physically contacting selected points on the wafer. A force (or touch) sensor measures contact force applied by the probe to the wafer (or the moment) when the probe physically contacts the wafer. A plurality of drift sensors are provided for calculating probe vs. wafer alignment drift in real-time during measurements.

Abstract: A method for probing a semiconductor device under test (DUT) using a combination of scanning electron microscope (SEM) and nanoprobes, by: obtaining an SEM image of a region of interest (ROI) in the DUT; obtaining a CAD design image of the ROI; registering the CAD design image with the SEM image to identify contact targets; obtaining a Netlist corresponding to the contact targets and using the Netlist to determine which of the contact targets should be selected as test target; and, navigating nanoprobes to land a nanoprobe on each of the test targets and form electrical contact between the nanoprobe and the respective test target.

Abstract: A system for performing sample probing. The system including an topography microscope configured to receive three-dimensional coordinates for a sample based on at least three fiducial marks; receive the sample mounted in a holder; and navigate to at least a location on the sample based on the at least three fiducial marks and the three-dimensional coordinates.

Abstract: A system for analyzing a sample is described. The system for analyzing a sample includes a probe and a controller circuit. The controller circuit configured to control a movement of the probe to at least a first position and a second position on the sample based on navigation data. In response to the movement of the probe, the controller circuit is configured to adjust a force of the probe on the sample at the first position from a first force value to a second force value and the force of the probe on the sample from a third force value to a fourth force value at said second position on the sample. And, the controller circuit is configured to acquire sample data with the probe at the first position on the sample.

Abstract: A system for analyzing a sample is described. The system for analyzing a sample includes a probe and a controller circuit. The controller circuit configured to control a movement of the probe to at least a first position and a second position on the sample based on navigation data. In response to the movement of the probe, the controller circuit is configured to adjust a force of the probe on the sample at the first position from a first force value to a second force value and the force of the probe on the sample from a third force value to a fourth force value at said second position on the sample. And, the controller circuit is configured to acquire sample data with the probe at the first position on the sample.

Abstract: A method for testing an integrated circuit (IC) using a nanoprobe, by using a scanning electron microscope (SEM) to register the nanoprobe to an identified feature on the IC; navigating the nanoprobe to a region of interest; scanning the nanoprobe over the surface of the IC while reading data from the nanoprobe; when the data from the nanoprobe indicates that the nanoprobe traverse a feature of interest, decelerating the scanning speed of the nanoprobe and performing testing of the IC. The scanning can be done at a prescribed nanoprobe tip force, and during the step of decelerating the scanning speed, the method further includes increasing the nanoprobe tip force.

Abstract: A system for performing sample probing. The system including an topography microscope configured to receive three-dimensional coordinates for a sample based on at least three fiducial marks; receive the sample mounted in a holder; and navigate to at least a location on the sample based on the at least three fiducial marks and the three-dimensional coordinates.

Abstract: A system for performing sample probing. The system including an topography microscope configured to receive three-dimensional coordinates for a sample based on at least three fiducial marks; receive the sample mounted in a holder; and navigate to at least a location on the sample based on the at least three fiducial marks and the three-dimensional coordinates.

Abstract: Provided is a method for manufacturing a semiconductor device. The method, in one embodiment, includes calibrating an inspection tool configured to obtain a measurement of a semiconductor feature, including: 1) providing a test structure comprising a substrate having a trench therein, and a post feature located over the substrate adjacent the trench. The post feature, in this embodiment, includes a second layer positioned over a first layer, wherein the first layer has a notch or bulge in a sidewall thereof; 2) finding a location of the notch or bulge relative to a different known point of the test structure using a probe of the inspection tool; and 3) calculating a dimension of the probe using the relative locations of the notch or bulge and the different known point.

Abstract: A method comprising characterizing the dimensions of structures on a semiconductor device having dimensions less than approximately 100 nanometers (nm) using one of scanning probe microscopy (SPM) or profilometry.

Abstract: A system (100) for characterizing surfaces can include a nanotip microscope (104) in a first pressure envelope (102) at a first pressure with an electrically conductive nanotip (110) mounted thereon for characterizing a sample surface. The system can also include an ion imaging system (122, 124, 128) within a second pressure envelope (120) at a second pressure. The second pressure can less than or equal to the first pressure and the pressure envelopes (102, 120) can be separated by a pressure limiting aperture (PLA) (132). The system can further include gas sources (116, 118) for introducing into the first pressure envelope (102) at least one gas, and a voltage supply (114) coupled to the nanotip (110) for generating an electric field between the nanotip (114) and the PLA (132).

Abstract: A system (100) for characterizing surfaces can include a nanotip microscope (104) in a first pressure envelope (102) at a first pressure with an electrically conductive nanotip (110) mounted thereon for characterizing a sample surface. The system can also include an ion imaging system (122, 124, 128) within a second pressure envelope (120) at a second pressure. The second pressure can less than or equal to the first pressure and the pressure envelopes (102, 120) can be separated by a pressure limiting aperture (PLA) (132). The system can further include gas sources (116, 118) for introducing into the first pressure envelope (102) at least one gas, and a voltage supply (114) coupled to the nanotip (110) for generating an electric field between the nanotip (114) and the PLA (132).