Patents by Inventor Walter Hartner

Walter Hartner has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10916484
    Abstract: An electronic device is disclosed. In one example, the electronic device includes a solder ball, a dielectric layer comprising an opening, and a redistribution layer (RDL) comprising an RDL pad connected with the solder ball. The RDL pad including at least one void, the void being disposed at least in partial in an area of the RDL pad laterally outside of the opening of the dielectric layer.
    Type: Grant
    Filed: June 21, 2018
    Date of Patent: February 9, 2021
    Assignee: Infineon Technologies AG
    Inventors: Robert Fehler, Francesca Arcioni, Christian Geissler, Walter Hartner, Gerhard Haubner, Thorsten Meyer, Martin Richard Niessner, Maciej Wojnowski
  • Publication number: 20200321295
    Abstract: A semiconductor device comprises a semiconductor chip having a radio-frequency circuit and a radio-frequency terminal, an external radio-frequency terminal, and a non-galvanic connection arranged between the radio-frequency terminal of the semiconductor chip and the external radio-frequency terminal, wherein the non-galvanic connection is designed to transmit a radio-frequency signal.
    Type: Application
    Filed: April 6, 2020
    Publication date: October 8, 2020
    Inventors: Walter HARTNER, Francesca ARCIONI, Birgit HEBLER, Martin Richard NIESSNER, Claus WAECHTER, Maciej WOJNOWSKI
  • Patent number: 10607911
    Abstract: A chip carrier for carrying an encapsulated electronic chip, wherein the chip carrier comprises a laminate structure formed as a stack of a plurality of electrically insulating structures and a plurality of electrically conductive structures, and a chip coupling area at an exposed surface of the laminate structure being configured for electrically and mechanically coupling the encapsulated electronic chip, wherein one of the electrically insulating structures is configured as high frequency dielectric made of a material being compatible with low-loss transmission of a high-frequency signal, and wherein at least one of another one of the electrically insulating structures and one of the electrically conductive structures is configured as a thermomechanical buffer for buffering thermally induced mechanical load.
    Type: Grant
    Filed: January 18, 2016
    Date of Patent: March 31, 2020
    Assignee: Infineon Technologies AG
    Inventors: Martin Richard Niessner, Walter Hartner, Gerhard Haubner, Sebastian Pahlke
  • Publication number: 20200021002
    Abstract: A semiconductor device including an Integrated Circuit (IC) package and a plastic waveguide. The IC package includes a semiconductor chip; and an embedded antenna formed within a Redistribution Layer (RDL) coupled to the semiconductor chip, wherein the RDL is configured to transport a Radio Frequency (RF) signal between the semiconductor chip and the embedded antenna. The plastic waveguide is attached to the IC package and configured to transport the RF signal between the embedded antenna and outside of the IC package.
    Type: Application
    Filed: July 11, 2018
    Publication date: January 16, 2020
    Inventors: Maciej Wojnowski, Dirk Hammerschmidt, Walter Hartner, Johannes Lodermeyer, Chiara Mariotti, Thorsten Meyer
  • Publication number: 20200006174
    Abstract: A method comprises providing a least one semiconductor component, wherein each of the at least one semiconductor component comprises: a semiconductor chip, wherein the semiconductor chip comprises a first main surface and a second main surface opposite the first main surface, and a sacrificial layer arranged above the opposite second main surface of the semiconductor chip. The method further comprises encapsulating the at least one semiconductor component with an encapsulation material. The method further comprises removing the sacrificial material, wherein above each of the at least one semiconductor chip a cutout is formed in the encapsulation material. The method further comprises arranging at least one lid above the at least one cutout, wherein a closed cavity is formed by the at least one cutout and the at least one lid above each of the at least one semiconductor chip.
    Type: Application
    Filed: June 20, 2019
    Publication date: January 2, 2020
    Inventors: Christian GEISSLER, Walter Hartner, Claus Waechter, Maciej Wojnowski
  • Publication number: 20190221531
    Abstract: A semiconductor device includes a semiconductor die having an active main surface and an opposite main surface opposite the active main surface. The semiconductor device further includes an antenna arranged on the active main surface of the semiconductor die and a recess arranged on the opposite main surface of the semiconductor die. The recess is arranged over the antenna.
    Type: Application
    Filed: March 21, 2019
    Publication date: July 18, 2019
    Inventors: Thorsten Meyer, Walter Hartner, Maciej Wojnowski
  • Publication number: 20190221533
    Abstract: A semiconductor device includes a semiconductor chip, an electrical connection element for electrically connecting the semiconductor device to a carrier, and a metallization adjoining the electrical connection element, the metallization contains porous nanocrystalline copper that contains portions of organic acids.
    Type: Application
    Filed: January 14, 2019
    Publication date: July 18, 2019
    Applicant: Infineon Technologies AG
    Inventors: Horst THEUSS, Rudolf BERGER, Walter HARTNER, Veronika HUBER, Werner ROBL
  • Publication number: 20190198455
    Abstract: A semiconductor apparatus comprises: a circuit board; a semiconductor package having a main surface, wherein the semiconductor package is arranged on the circuit board and the main surface faces the circuit board; a radio-frequency line element of the semiconductor package, which radio-frequency line element is arranged on the main surface or inside the semiconductor package, wherein the radio-frequency line element is designed to transmit a signal at a frequency of greater than 10 GHz; and an underfiller material arranged between the circuit board and the semiconductor package, wherein the radio-frequency line element and the underfiller material do not overlap in an orthogonal projection onto the main surface.
    Type: Application
    Filed: December 20, 2018
    Publication date: June 27, 2019
    Inventors: Walter HARTNER, Christian GEISSLER, Thomas KILGER, Johannes LODERMEYER, Franz-Xaver MUEHLBAUER, Martin Richard NIESSNER, Claus WAECHTER
  • Publication number: 20180374769
    Abstract: An electronic device is disclosed. In one example, the electronic device includes a solder ball, a dielectric layer comprising an opening, and a redistribution layer (RDL) comprising an RDL pad connected with the solder ball. The RDL pad including at least one void, the void being disposed at least in partial in an area of the RDL pad laterally outside of the opening of the dielectric layer.
    Type: Application
    Filed: June 21, 2018
    Publication date: December 27, 2018
    Applicant: Infineon Technologies AG
    Inventors: Robert Fehler, Francesca Arcioni, Christian Geissler, Walter Hartner, Gerhard Haubner, Thorsten Meyer, Martin Richard Niessner, Maciej Wojnowski
  • Publication number: 20180180730
    Abstract: A semiconductor package having an antenna; and a semiconductor die which is coupled to the antenna and comprises a transmitter configured to transmit wirelessly via the antenna a wireless signal having information on a local oscillator signal to a further semiconductor package comprising a further semiconductor die.
    Type: Application
    Filed: February 21, 2018
    Publication date: June 28, 2018
    Inventors: Josef Boeck, Rudolf Lachner, Maciej Wojnowski, Walter Hartner
  • Patent number: 10008470
    Abstract: A method for manufacturing an embedded chip package is provided. The method may include: forming electrically conductive lines over a substrate; placing the substrate next to a chip arrangement comprising a chip, the chip comprising one or more contact pads, wherein one or more of the electrically conductive lines are arranged proximate to a side wall of the chip; and forming one or more electrical interconnects over the chip arrangement to electrically connect at least one electrically conductive line to at least one contact pad.
    Type: Grant
    Filed: June 21, 2017
    Date of Patent: June 26, 2018
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Gottfried Beer, Walter Hartner
  • Patent number: 9922946
    Abstract: A method of manufacturing a semiconductor device package includes placing a semiconductor chip on a carrier, covering the semiconductor chip with an encapsulation material to form an encapsulation body, providing a microwave component having at least one electrically conducting wall structure integrated in the encapsulation body, and forming an electrical interconnect configured to electrically couple the semiconductor chip and the microwave component.
    Type: Grant
    Filed: April 6, 2017
    Date of Patent: March 20, 2018
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Ernst Seler, Maciej Wojnowski, Walter Hartner, Josef Boeck
  • Patent number: 9910145
    Abstract: A wireless communication system includes a first semiconductor module and a second semiconductor module. The first semiconductor module includes a semiconductor die connected to an antenna structure. The semiconductor die of the first semiconductor module and the antenna structure of the first semiconductor module are arranged within a common package. The semiconductor die of the first semiconductor module includes a transmitter module configured to transmit the wireless communication signal through the antenna structure of the first semiconductor module. The second semiconductor module includes a semiconductor die connected to an antenna structure. The semiconductor die of the second semiconductor module includes a receiver module configured to receive the wireless communication signal through the antenna structure of the second semiconductor module from the first semiconductor module.
    Type: Grant
    Filed: December 19, 2013
    Date of Patent: March 6, 2018
    Assignee: Infineon Technologies AG
    Inventors: Josef Boeck, Rudolf Lachner, Maciej Wojnowski, Walter Hartner
  • Publication number: 20170309582
    Abstract: A semiconductor device includes a semiconductor die having an active main surface and an opposite main surface opposite the active main surface. The semiconductor device further includes an antenna arranged on the active main surface of the semiconductor die and a recess arranged on the opposite main surface of the semiconductor die. The recess is arranged over the antenna.
    Type: Application
    Filed: April 25, 2017
    Publication date: October 26, 2017
    Inventors: Thorsten Meyer, Walter Hartner, Maciej Wojnowski
  • Publication number: 20170288176
    Abstract: A method for manufacturing an embedded chip package is provided. The method may include: forming electrically conductive lines over a substrate; placing the substrate next to a chip arrangement comprising a chip, the chip comprising one or more contact pads, wherein one or more of the electrically conductive lines are arranged proximate to a side wall of the chip; and forming one or more electrical interconnects over the chip arrangement to electrically connect at least one electrically conductive line to at least one contact pad.
    Type: Application
    Filed: June 21, 2017
    Publication date: October 5, 2017
    Inventors: Gottfried Beer, Walter Hartner
  • Patent number: 9721920
    Abstract: A method for manufacturing an embedded chip package is provided. The method may include: forming electrically conductive lines over a substrate; placing the substrate next to a chip arrangement comprising a chip, the chip comprising one or more contact pads, wherein one or more of the electrically conductive lines are arranged proximate to a side wall of the chip; and forming one or more electrical interconnects over the chip arrangement to electrically connect at least one electrically conductive line to at least one contact pad.
    Type: Grant
    Filed: January 8, 2013
    Date of Patent: August 1, 2017
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Gottfried Beer, Walter Hartner
  • Publication number: 20170213800
    Abstract: A method of manufacturing a semiconductor device package includes placing a semiconductor chip on a carrier, covering the semiconductor chip with an encapsulation material to form an encapsulation body, providing a microwave component having at least one electrically conducting wall structure integrated in the encapsulation body, and forming an electrical interconnect configured to electrically couple the semiconductor chip and the microwave component.
    Type: Application
    Filed: April 6, 2017
    Publication date: July 27, 2017
    Inventors: Ernst Seler, Maciej Wojnowski, Walter Hartner, Josef Boeck
  • Patent number: 9653426
    Abstract: A method of manufacturing an array of semiconductor device packages includes placing a plurality of semiconductor chips on a temporary carrier, covering the plurality of semiconductor chips with an encapsulation material to form an encapsulation body, providing a plurality of microwave components each including at least one electrically conducting wall structure integrated in the encapsulation body, forming a plurality of electrical interconnects each configured to electrically couple a semiconductor chip and a microwave component, and separating the encapsulation body into single semiconductor device packages each including a semiconductor chip, a microwave component and an electrical interconnect.
    Type: Grant
    Filed: May 4, 2016
    Date of Patent: May 16, 2017
    Assignee: Infineon Technologies AG
    Inventors: Ernst Seler, Maciej Wojnowski, Walter Hartner, Josef Boeck
  • Patent number: 9583811
    Abstract: A microwave device includes a semiconductor package comprising a microwave semiconductor chip and a waveguide part associated with the semiconductor package. The waveguide part is configured to transfer a microwave waveguide signal. It includes one or more pieces. The microwave device further includes a transformer element configured to transform a microwave signal from the microwave semiconductor chip into the microwave waveguide signal or to transform the microwave waveguide signal into a microwave signal for the microwave semiconductor chip.
    Type: Grant
    Filed: August 7, 2014
    Date of Patent: February 28, 2017
    Assignee: Infineon Technologies AG
    Inventors: Ernst Seler, Maciej Wojnowski, Walter Hartner, Josef Boeck
  • Publication number: 20160247780
    Abstract: A method of manufacturing an array of semiconductor device packages includes placing a plurality of semiconductor chips on a temporary carrier, covering the plurality of semiconductor chips with an encapsulation material to form an encapsulation body, providing a plurality of microwave components each including at least one electrically conducting wall structure integrated in the encapsulation body, forming a plurality of electrical interconnects each configured to electrically couple a semiconductor chip and a microwave component, and separating the encapsulation body into single semiconductor device packages each including a semiconductor chip, a microwave component and an electrical interconnect.
    Type: Application
    Filed: May 4, 2016
    Publication date: August 25, 2016
    Inventors: Ernst Seler, Maciej Wojnowski, Walter Hartner, Josef Boeck