Abstract: A method for producing a semiconductor component with a semiconductor body includes providing a substrate of a first conductivity type. A buried semiconductor layer of a second conductivity type is provided on the substrate. A functional unit semiconductor layer is provided on the buried semiconductor layer. At least one trench, which reaches into the substrate, is formed in the semiconductor body. An insulating layer is formed, which covers inner walls of the trench and electrically insulates the trench interior from the functional unit semiconductor layer and the buried semiconductor layer, the insulating layer having at least one opening in the region of the trench bottom. The at least one trench is filled with an electrically conductive semiconductor material of the first conductivity type, wherein the electrically conductive semiconductor material forms an electrical contact from a surface of the semiconductor body to the substrate.

Abstract: A microwave device includes a semiconductor package comprising a microwave semiconductor chip and a waveguide part associated with the semiconductor package. The waveguide part is configured to transfer a microwave waveguide signal. It includes one or more pieces. The microwave device further includes a transformer element configured to transform a microwave signal from the microwave semiconductor chip into the microwave waveguide signal or to transform the microwave waveguide signal into a microwave signal for the microwave semiconductor chip.

Abstract: A wireless communication system includes a first semiconductor module and a second semiconductor module. The first semiconductor module includes a semiconductor die connected to an antenna structure. The semiconductor die of the first semiconductor module and the antenna structure of the first semiconductor module are arranged within a common package. The semiconductor die of the first semiconductor module includes a transmitter module configured to transmit the wireless communication signal through the antenna structure of the first semiconductor module. The second semiconductor module includes a semiconductor die connected to an antenna structure. The semiconductor die of the second semiconductor module includes a receiver module configured to receive the wireless communication signal through the antenna structure of the second semiconductor module from the first semiconductor module.

Abstract: A semiconductor device package includes an encapsulant and a semiconductor chip. The semiconductor chip is at least partly embedded in the encapsulant. A microwave component including at least one electrically conducting wall structure is integrated in the encapsulant. Further, the semiconductor device package includes an electrical interconnect configured to electrically couple the microwave component to the semiconductor chip.

Abstract: In one embodiment of the present invention, a semiconductor package includes a substrate having a first major surface and an opposite second major surface. A chip is disposed in the substrate. The chip includes a plurality of contact pads at the first major surface. A first antenna structure is disposed at the first major surface. A reflector is disposed at the second major surface.

Abstract: A method for manufacturing a chip package is provided. The method includes: forming an electrically insulating material over a chip side; selectively removing at least part of the electrically insulating material thereby forming a trench in the electrically insulating material, depositing electrically conductive material in the trench wherein the electrically conductive material is electrically connected to at least one contact pad formed over the chip side; forming an electrically conductive structure over the electrically insulating material, wherein at least part of the electrically conductive structure is in direct physical and electrical connection with the electrically conductive material; and depositing a joining structure over the electrically conductive structure.

Abstract: A method for producing a semiconductor component with a semiconductor body includes providing a substrate of a first conductivity type. A buried semiconductor layer of a second conductivity type is provided on the substrate. A functional unit semiconductor layer is provided on the buried semiconductor layer. At least one trench, which reaches into the substrate, is formed in the semiconductor body. An insulating layer is formed, which covers inner walls of the trench and electrically insulates the trench interior from the functional unit semiconductor layer and the buried semiconductor layer, the insulating layer having at least one opening in the region of the trench bottom. The at least one trench is filled with an electrically conductive semiconductor material of the first conductivity type, wherein the electrically conductive semiconductor material forms an electrical contact from a surface of the semiconductor body to the substrate.

Abstract: A method for manufacturing an embedded chip package is provided. The method may include: forming electrically conductive lines over a substrate; placing the substrate next to a chip arrangement comprising a chip, the chip comprising one or more contact pads, wherein one or more of the electrically conductive lines are arranged proximate to a side wall of the chip; and forming one or more electrical interconnects over the chip arrangement to electrically connect at least one electrically conductive line to at least one contact pad.

Abstract: In one embodiment of the present invention, a semiconductor package includes a substrate having a first major surface and an opposite second major surface. A chip is disposed in the substrate. The chip includes a plurality of contact pads at the first major surface. A first antenna structure is disposed at the first major surface. A reflector is disposed at the second major surface.

Abstract: A chip package is provided, the chip package including: a chip including at least one contact pad formed on a chip front side; an encapsulation material at least partially surrounding the chip and covering the at least one contact pad; and at least one electrical interconnect formed through the encapsulation material, wherein the at least one electrical interconnect is configured to electrically redirect the at least one contact pad from a chip package first side at the chip front side to at least one solder structure formed over a chip package second side at a chip back side.

Abstract: A method for manufacturing a chip package is provided. The method includes: forming an electrically insulating material over a chip side; selectively removing at least part of the electrically insulating material thereby forming a trench in the electrically insulating material, depositing electrically conductive material in the trench wherein the electrically conductive material is electrically connected to at least one contact pad formed over the chip side; forming an electrically conductive structure over the electrically insulating material, wherein at least part of the electrically conductive structure is in direct physical and electrical connection with the electrically conductive material; and depositing a joining structure over the electrically conductive structure.

Abstract: A chip package is provided, the chip package including: a chip including at least one contact pad formed on a chip front side; an encapsulation material at least partially surrounding the chip and covering the at least one contact pad; and at least one electrical interconnect formed through the encapsulation material, wherein the at least one electrical interconnect is configured to electrically redirect the at least one contact pad from a chip package first side at the chip front side to at least one solder structure formed over a chip package second side at a chip back side.

Abstract: A semiconductor component includes a semiconductor body, in which are formed: a substrate of a first conduction type, a buried semiconductor layer of a second conduction type arranged on the substrate, and a functional unit semiconductor layer of a third conduction type arranged on the buried semiconductor layer, in which at least two semiconductor functional units arranged laterally alongside one another are provided. The buried semiconductor layer is part of at least one semiconductor functional unit, the semiconductor functional units being electrically insulated from one another by an isolation structure which permeates the functional unit semiconductor layer, the buried semiconductor layer, and the substrate. The isolation structure includes at least one trench and an electrically conductive contact to the substrate, the contact to the substrate being electrically insulated from the functional unit semiconductor layer and the buried layer by the at least one trench.

Abstract: A semiconductor component includes a semiconductor body, in which are formed: a substrate of a first conduction type, a buried semiconductor layer of a second conduction type arranged on the substrate, and a functional unit semiconductor layer of a third conduction type arranged on the buried semiconductor layer, in which at least two semiconductor functional units arranged laterally alongside one another are provided. The buried semiconductor layer is part of at least one semiconductor functional unit, the semiconductor functional units being electrically insulated from one another by an isolation structure which permeates the functional unit semiconductor layer, the buried semiconductor layer, and the substrate. The isolation structure includes at least one trench and an electrically conductive contact to the substrate, the contact to the substrate being electrically insulated from the functional unit semiconductor layer and the buried layer by the at least one trench.

Abstract: A semiconductor component includes a semiconductor body, in which are formed: a substrate of a first conduction type, a buried semiconductor layer of a second conduction type arranged on the substrate, and a functional unit semiconductor layer of a third conduction type arranged on the buried semiconductor layer, in which at least two semiconductor functional units arranged laterally alongside one another are provided. The buried semiconductor layer is part of at least one semiconductor functional unit, the semiconductor functional units being electrically insulated from one another by an isolation structure which permeates the functional unit semiconductor layer, the buried semiconductor layer, and the substrate. The isolation structure includes at least one trench and an electrically conductive contact to the substrate, the contact to the substrate being electrically insulated from the functional unit semiconductor layer and the buried layer by the at least one trench.

Abstract: A semiconductor component includes a semiconductor body, in which are formed: a substrate of a first conduction type, a buried semiconductor layer of a second conduction type arranged on the substrate, and a functional unit semiconductor layer of a third conduction type arranged on the buried semiconductor layer, in which at least two semiconductor functional units arranged laterally alongside one another are provided. The buried semiconductor layer is part of at least one semiconductor functional unit, the semiconductor functional units being electrically insulated from one another by an isolation structure which permeates the functional unit semiconductor layer, the buried semiconductor layer, and the substrate. The isolation structure includes at least one trench and an electrically conductive contact to the substrate, the contact to the substrate being electrically insulated from the functional unit semiconductor layer and the buried layer by the at least one trench.

Abstract: A semiconductor component includes a semiconductor body, in which are formed: a substrate of a first conduction type, a buried semiconductor layer of a second conduction type arranged on the substrate, and a functional unit semiconductor layer of a third conduction type arranged on the buried semiconductor layer, in which at least two semiconductor functional units arranged laterally alongside one another are provided. The buried semiconductor layer is part of at least one semiconductor functional unit, the semiconductor functional units being electrically insulated from one another by an isolation structure which permeates the functional unit semiconductor layer, the buried semiconductor layer, and the substrate. The isolation structure includes at least one trench and an electrically conductive contact to the substrate, the contact to the substrate being electrically insulated from the functional unit semiconductor layer and the buried layer by the at least one trench.

Abstract: A semiconductor structure includes a semiconductor layer stack includes a semiconductor substrate of a first conductivity type, a heavily-doped buried layer of a second conductivity type, and a monocrystalline semiconductor layer of a third conductivity type formed on top of the semiconductor layer and the buried layer, a contact to the buried layer, the contact formed in a contact hole, and a lateral insulation of different portions of the semiconductor structure, the insulation formed in an isolation trench. A contact to the semiconductor substrate may be formed within the isolation trench.

Abstract: A process and method for compensating for a radial non-uniformity on a wafer that includes the steps of: centering a rotational thickness non-uniformity of a film on the wafer about the axis of the spin susceptor following a CMP process; positioning a nozzle in the spin processing unit to direct the etching solution along a radius of the wafer; adjusting the flow of the etching solution from the nozzle; adjusting the rotational speed of the spin susceptor to control the residence time of the etching solution; and coordinating the rotational speed of the spin susceptor, flow of etching solution and positioning of the nozzle to maximize the removal of material. The process may be utilized to compensate for the bowl-shaped non-uniformities of an STI oxide. These non-uniformities are compensated for and addressed after a CMP process.

Abstract: A semiconductor component includes a semiconductor body, in which are formed: a substrate of a first conduction type, a buried semiconductor layer of a second conduction type arranged on the substrate, and a functional unit semiconductor layer of a third conduction type arranged on the buried semiconductor layer, in which at least two semiconductor functional units arranged laterally alongside one another are provided. The buried semiconductor layer is part of at least one semiconductor functional unit, the semiconductor functional units being electrically insulated from one another by an isolation structure which permeates the functional unit semiconductor layer, the buried semiconductor layer, and the substrate. The isolation structure includes at least one trench and an electrically conductive contact to the substrate, the contact to the substrate being electrically insulated from the functional unit semiconductor layer and the buried layer by the at least one trench.