Patents by Inventor Walter R. Steiner

Walter R. Steiner has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6377274
    Abstract: A method and apparatus, for use in a computer image generation system wherein polygons are displayed on an array of pixels, for encoding data representing intersections of the polygons and the pixels. The method comprises the steps of receiving input data signals characterizing a set of coordinates of each of at least three vertices of each polygon to be displayed, each different pair of the vertices of each polygon defining a different edge of the polygon; and generating, responsive to the received vertex data signals, edge data signals describing the intersection, if any, of the polygon edges with each pixel to be displayed.
    Type: Grant
    Filed: July 15, 1999
    Date of Patent: April 23, 2002
    Assignee: Intel Corporation
    Inventor: Walter R. Steiner
  • Patent number: 5420970
    Abstract: A method for determining whether a particular cell of an array of display cells, either of full pixels or subpixel portions, is interior or exterior to a circular feature of non-zero radius, uses a line segment length L measured from the vertical feature diameter to the feature periphery, along a point of each row of cells to be considered. For that cell row, all cells within L cells of the vertical diameter line are within the feature; the number of cells on each row changes as the row position changes with respect to the centroid.
    Type: Grant
    Filed: February 7, 1994
    Date of Patent: May 30, 1995
    Assignee: Martin Marietta Corporation
    Inventors: Walter R. Steiner, Steven V. Manno, Oscar G. Vela
  • Patent number: 5293467
    Abstract: A method for determining the proper occulation relationship between a calligraphic point and at least one of another calligraphic point and a surface in a raster image, divides the total image screen into an array of spans, each containing an ordered set of pixels which may be further divided into an array of subpixels; determines which of the subpixels on the total screen lie inside each of the raster surfaces and calligraphic points which must be considered for the image totality; then orders the distance of each of the raster surfaces from the viewing point and also orders the distance of each of the point features from the viewing point; and then compares the ordered distances of each point to at least one of the raster surface distances and other point distances to determine which of subpixels of the point or surface/other point are occluded and which subpixels are visible.
    Type: Grant
    Filed: April 3, 1991
    Date of Patent: March 8, 1994
    Inventors: Gregory C. Buchner, Jeffrey D. Potter, Walter R. Steiner
  • Patent number: 5268996
    Abstract: A method for determining the illumination of an illuminator at a selected point P in an image volume to be projected on an image screen surface by a computerized image generator, operates by: decomposing the illuminator into at least one of spherical, beam and cylindrical sources; determining a direction of incidence of the light from each source at point P in the image volume; determining the extent of the source and the attenuation of illumination with distance from that source; then determining a set of color light intensities at point P in the image volume due to the light from the particular source; and translating the incidence direction and color intensities from point P to a displayable incidence direction and a displayable set of color illumination intensities at a corresponding projection location on the image screen surface.
    Type: Grant
    Filed: December 20, 1990
    Date of Patent: December 7, 1993
    Assignee: General Electric Company
    Inventors: Walter R. Steiner, William A. Kelly, Robert J. Caesar, Jr., Gregory C. Buchner, Michael L. Morgan
  • Patent number: 5126726
    Abstract: The values of an attribute, like color, to be assigned to the right and left half of a pixel of a display device, such as may be determined by a computer image generation system, are compared for determining a difference value. If the difference value is less than a predetermined threshold, an average of the left and right half values is assigned to the pixel. If the difference value is greater than or equal to the threshold, then the right and left half values are assigned to the respective right and left halves of the pixel and during the raster scan, the attribute value of the pixel to be displayed is transitioned at the beginning of the pixel interval and in the middle of the pixel interval so that the pixel presents an image in response to the corresponding right and left half values. The data for the left and right half values may be truncated and stored as a portion of the data word or may be encoded into logarithmetic form having a mantissa and shift code.
    Type: Grant
    Filed: December 27, 1989
    Date of Patent: June 30, 1992
    Assignee: General Electric Company
    Inventors: Edwin O. Howard, Walter R. Steiner, Michael L. Morgan, Gregory C. Buchner, Richard Economy, Edward M. Sims
  • Patent number: 4967375
    Abstract: A graphics processor having an independent processor for traversing a hierarchical graphics data base. The independent processor, termed a "tree traverser", generates a stream of addresses to the memory in which the data base is stored, producing a stream of data over a private, unidirectional data path to a geometry processor.
    Type: Grant
    Filed: March 17, 1986
    Date of Patent: October 30, 1990
    Assignee: Star Technologies, Inc.
    Inventors: Anthony J. Pelham, Walter R. Steiner, William S. Didden
  • Patent number: 4965745
    Abstract: The human eye is more sensitive to brightness than to color. Accordingly, color definition is defined by a luminance or brightness (Y) component, an in-phase component (I) and a quadrature component (Q) and which are appropriately processed before being converted to more traditional red, green and blue (RGB) components for color display control. Scaling and redesignating YIQ data permits representation by fewer bits than a RGB scheme during processing. Also, Y values may be processed at one level of detail while the corresponding I and Q data values may be processed at a lesser level of detail. Translucency information may also be accommodated.
    Type: Grant
    Filed: December 18, 1987
    Date of Patent: October 23, 1990
    Assignee: General Electric Company
    Inventors: Richard Economy, Walter R. Steiner, Richard G. Fadden, Jr.
  • Patent number: 4868771
    Abstract: In a computer image generation system, the choice of a path for a vehicle model over a landscape is not restricted. Objects and features in an image to be displayed are defined by polygons. Plumb vectors, having a predetermined relationship with the vehicle model, are used to obtain samples of the terrain at the intersection between the vectors and polygons defining the ground in the vicinity of the vehicle model. The vectors may sample in advance of the vehicle model in the direction of motion or under the vehicle model. The polygons may be encoded with characteristics of the terrain they define so that appropriate noise cues can be generated from information extracted at the intersection of the plumb vectors and polygons. Predetermined ones of the sample points are interpolated for inferring the contour and slope of the terrain before interaction between the vehicle model and interpolated terrain is determined.
    Type: Grant
    Filed: March 30, 1987
    Date of Patent: September 19, 1989
    Assignee: General Electric Company
    Inventors: Lee T. Quick, Walter R. Steiner
  • Patent number: 4862392
    Abstract: A geometry process for use in a graphics processing system, especially adapted to couple with a hierarchically structured graphics database memory, a special purpose processor for traversing the database, and a display processor, wherein the geometry processor includes double-buffered input registers, a first private data bus to the special purpose traversing processor, a second private data bus to the graphics database memory, a high-speed arithmetic processing module, a double-buffered output register, and a microprogrammable control system. The geometry processor is configured to process the graphics database in two passes. The first pass is a culling operation that culls out graphics data supplied from the database memory that is outside of a defined viewing volume, with the culled data being sent over of the first private bus to a stack memory in the traversing processor.
    Type: Grant
    Filed: March 7, 1986
    Date of Patent: August 29, 1989
    Assignee: Star Technologies, Inc.
    Inventor: Walter R. Steiner
  • Patent number: 4825400
    Abstract: A high-speed, 3-stage, pipelined architecture floating point accumulator circuit having a pre-normalization feedback loop for accumulated numbers to increase processing speed.
    Type: Grant
    Filed: January 13, 1986
    Date of Patent: April 25, 1989
    Assignee: General Electric Company
    Inventors: Paul A. Simoncic, Walter R. Steiner
  • Patent number: 4815021
    Abstract: A multifunction arithmetic logic circuit having comparison and numeric conversion circuitry, particularly adapted for use in graphics processing. The inventive architecture comprises a modular arithmetic logic unit in a pipelined architecture circuit. Functions performed are conversion of floating point numbers to fixed point numbers, and vise versa, arithmetic and logical operations, and numeric comparison operations. A visibility logic subcircuit is included for rapidly tracking numeric comparisons to indicate whether a graphics object is to be considered visible, partially visible, or invisible.
    Type: Grant
    Filed: January 30, 1986
    Date of Patent: March 21, 1989
    Assignee: Star Technologies, Inc.
    Inventors: Walter R. Steiner, Paul A. Simoncic
  • Patent number: 4700319
    Abstract: The arithmetic pipeline processor (which is used for computer graphics such as a flight simulator) is a group of boards capable of solving an equation of the formA.sup.m B.sup.n +C.sup.o D.sup.P +E.sup.q F.sup.r +G.sup.s H.sup.twhere A, B, C, D, E, F, G, H are 32-bit implied one floating point numbers, and m, n, o, p, q, r, s, t can take on the values 1/4, 1/2, 1, 2 and 0. It includes a digital logarithmic calculator using shifters and stored tables to perform arithmetic functions such as multiplication, division, squares, square roots, and fourth roots. It comprises two input ports each capable of receiving digital data N bits wide. Included are a log transform unit, a log sum or difference unit and an antilog unit. Following these is an M-bit Aritmetic Logic Unit (ALU) and circuitry for converting between fixed point and floating point numbers. It uses piece wise linear approximation in conjunction with stored slope information in tables to do the transform calculation of logarithms and antilogarithms.
    Type: Grant
    Filed: June 6, 1985
    Date of Patent: October 13, 1987
    Assignee: The United States of America as represented by the Secretary of the Air Force
    Inventor: Walter R. Steiner