Patents by Inventor Wan Chen

Wan Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230133808
    Abstract: The present disclosure provides a laser cutting method comprising steps of: (a) emitting a laser light to a spatial light modulator that has a plurality of pixels; (b) the laser light modulated by the spatial light modulator being irradiated on an uncut object, which is to be cut, for forming a focal point and cutting the uncut object; (c) measuring a cutting depth of the object; (d) the spatial light modulator converting a phase of each of the laser light modulated by each of the pixels to change a light pattern distribution at the focal point when the cutting depth of the object reaches a first predetermined depth; and (e) repeating the step (b) to the step (d) until the cutting depth of the object reaches a second predetermined depth; wherein the first predetermined depth is varied when the step (b) to the step (d) are repeated.
    Type: Application
    Filed: November 3, 2022
    Publication date: May 4, 2023
    Inventors: Chun-Jung Chiu, Chun-Hsiung Chen, Wan-Chen Chuang
  • Patent number: 11641661
    Abstract: A method and a User Equipment (UE) for beam operations are provided. The method includes monitoring at least one of a plurality of Control Resource Sets (CORESETs) configured for the UE within an active Bandwidth Part (BWP) of a serving cell in a time slot; and applying a first Quasi Co-Location (QCL) assumption of a first CORESET of a set of one or more of the monitored at least one of the plurality of CORESETs to receive a Downlink (DL) Reference Signal (RS), wherein the first CORESET is associated with a monitored search space configured with a lowest CORESET Identity (ID) among the set of one or more of the monitored at least one of the plurality of CORESETs.
    Type: Grant
    Filed: May 6, 2021
    Date of Patent: May 2, 2023
    Assignee: Hannibal IP LLC
    Inventors: Chien-Chun Cheng, Tsung-Hua Tsai, Yu-Hsin Cheng, Wan-Chen Lin
  • Publication number: 20230116949
    Abstract: Improved methods for forming gate isolation structures between portions of gate electrodes and semiconductor devices formed by the same are disclosed. In an embodiment, a method includes forming a channel structure over a substrate; forming a first isolation structure extending in a direction parallel to the channel structure; forming a dummy gate structure over the channel structure and the first isolation structure; depositing a hard mask layer over the dummy gate structure; etching the hard mask layer to form a first opening through the hard mask layer over the first isolation structure; conformally depositing a first dielectric layer over the hard mask layer, in the first opening, and over the dummy gate structure; etching the first dielectric layer to extend the first opening and expose the dummy gate structure; and etching the dummy gate structure to extend the first opening and expose the first isolation structure.
    Type: Application
    Filed: December 19, 2022
    Publication date: April 20, 2023
    Inventors: Li-Fong Lin, Wan Chen Hsieh, Chung-Ting Ko, Tai-Chun Huang
  • Patent number: 11626435
    Abstract: An image sensor includes a substrate, a photosensitive unit in the substrate, a dielectric grid over the substrate, and a color filter over the photosensitive unit and surrounded by the dielectric grid. The dielectric grid has a first portion and a second portion over the first portion, and the second portion of the dielectric grid has a rounded top surface extending upwards from a sidewall of the first portion of the dielectric grid. The color filter has a first portion lower than a lowermost portion of the rounded top surface of the second portion of the dielectric grid and a second portion higher than the lowermost portion of the rounded top surface of the second portion of the dielectric grid.
    Type: Grant
    Filed: September 11, 2020
    Date of Patent: April 11, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yun-Wei Cheng, Chun-Hao Chou, Yin-Chieh Huang, Wan-Chen Huang, Zhe-Ju Liu, Kuo-Cheng Lee, Chi-Cherng Jeng
  • Publication number: 20230106244
    Abstract: A method and apparatus for determining a BFD RS are provided. The method includes receiving at least one MAC CE for TCI state activation, each MAC CE indicating a CORESET and at least one TCI state, at least a subset of the indicated TCI state(s) belonging to a first group of TCI states associated with a first TRP; and performing first operations after determining that a total number of TCI states included in the first group of TCI states is larger than a first threshold number, the first operations including: selecting at least one first TCI state from the first group of TCI states; and determining at least one first BFD RS for detecting a first beam failure condition of the first TRP based on the at least one first TCI state.
    Type: Application
    Filed: March 3, 2021
    Publication date: April 6, 2023
    Inventors: CHIA-HAO YU, WAN-CHEN LIN, CHIEN-CHUN CHENG
  • Patent number: 11622363
    Abstract: A method for wireless communication performed by a user equipment (UE) is provided. The method includes receiving, from a base station (BS), a Radio Resource Control (RRC) configuration to configure a first semi-persistent scheduling (SPS) physical downlink shared channel (PDSCH) and generating first uplink control information (UCI) in response to the first SPS PDSCH, where the RRC configuration includes a first parameter that indicates a priority of the first UCI.
    Type: Grant
    Filed: June 26, 2020
    Date of Patent: April 4, 2023
    Assignee: Hannibal IP LLC
    Inventors: Wan-chen Lin, Yu-Hsin Cheng, Heng-li Chin, Hsin-Hsi Tsai
  • Publication number: 20230094267
    Abstract: A method of expanding natural killer cells, comprising: providing a population of internally gelated cells, each of which includes a gelated interior and a fluid cell membrane that contains one or more membrane-bound proteins each or collectively are capable of stimulating expansion of natural killer (NK) cells; and culturing a population of cells containing NK cells, which are capable of responding to the one or more membrane-bound proteins, with the population of internally gelated cells under conditions that allow expansion of NK cells.
    Type: Application
    Filed: March 2, 2021
    Publication date: March 30, 2023
    Applicant: ACADEMIA SINICA
    Inventors: Che-Ming Jack HU, Shih-Yu CHEN, Yi-Fu WANG, Wan-Chen HSIEH, Yi-Shiuan TZENG, Ya-Ting LU, Jung-Chen LIN, Chung-Yao HSU
  • Patent number: 11605555
    Abstract: A method includes forming a first protruding fin and a second protruding fin over a base structure, with a trench located between the first protruding fin and the second protruding fin, depositing a trench-filling material extending into the trench, and performing a laser reflow process on the trench-filling material. In the reflow process, the trench-filling material has a temperature higher than a first melting point of the trench-filling material, and lower than a second melting point of the first protruding fin and the second protruding fin. After the laser reflow process, the trench-filling material is solidified. The method further includes patterning the trench-filling material, with a remaining portion of the trench-filling material forming a part of a gate stack, and forming a source/drain region on a side of the gate stack.
    Type: Grant
    Filed: July 27, 2020
    Date of Patent: March 14, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Wen-Yen Chen, Li-Ting Wang, Wan-Chen Hsieh, Bo-Cyuan Lu, Tai-Chun Huang, Huicheng Chang, Yee-Chia Yeo
  • Publication number: 20230075089
    Abstract: A method and a BS for construction of a DCI format are provided. The method includes configuring a first DAI field of first DCI with a first size and configuring a second DAI field of second DCI with a second size; generating at least one bit with a zero value for one of the first DAI field and the second DAI field if a size difference between the first size and the second size exists; and transmitting, to a UE, an RRC message, the first DCI, and the second DCI, wherein the RRC message includes information for configuring a HARQ-ACK codebook list, the HARQ-ACK codebook list includes a first HARQ-ACK codebook indicated by the first DCI and a second HARQ-ACK codebook indicated by the second DCI, and the first DCI and the second DCI have a same format.
    Type: Application
    Filed: November 10, 2022
    Publication date: March 9, 2023
    Inventors: WAN-CHEN LIN, YU-HSIN CHENG
  • Patent number: 11589342
    Abstract: A method, performed by a User Equipment (UE), includes receiving, from a base station (BS), a radio resource control (RRC) message comprising an information for configuring a Hybrid Automatic Repeat reQuest-ACKnowledge (HARQ-ACK) codebook list, first downlink control information (DCI) and second DCI; determining whether a size difference exists between a first downlink assignment index (DAI) field of the first DCI and a second DAI field of the second DCI; and inserting at least one bit with a zero value into one of the first DAI field and the second DAI field when the size difference between the first DAI field of the first DCI and the second DAI field of the second DCI is determined, wherein the HARQ-ACK codebook list includes a first HARQ-ACK codebook indicated by the first DCI and a second HARQ-ACK codebook indicated by the second DCI.
    Type: Grant
    Filed: November 9, 2020
    Date of Patent: February 21, 2023
    Assignee: FG Innovation Company Limited
    Inventors: Wan-Chen Lin, Yu-Hsin Cheng
  • Publication number: 20230051867
    Abstract: A method related to physical uplink control channel (PUCCH) cell switching and a user equipment (UE) are provided. The method includes: receiving a radio resource control (RRC) message from a base station; determining a PUCCH cell from the first cell and the second cell according to at least one PUCCH cell pattern; and transmitting the PUCCH transmission on the PUCCH cell during the time resource units. The RRC message includes at least one PUCCH cell pattern associated with multiple cell indexes and a first subcarrier spacing (SCS) associated with a first cell and a second SCS associated with a second cell. Each cell index corresponds to a cell, and the PUCCH cell pattern indicates which cell corresponds to one time resource unit used for PUCCH transmission.
    Type: Application
    Filed: August 4, 2022
    Publication date: February 16, 2023
    Applicant: FG Innovation Company Limited
    Inventors: Wan-Chen Lin, Heng-Li Chin, Hai-Han Wang, Hung-Chen Chen, Chia-Hung Wei
  • Publication number: 20230043884
    Abstract: Various embodiments of the present disclosure are directed towards methods for forming conductive lines and conductive sockets using mandrels with turns, as well as the resulting conductive lines and sockets. A conductive socket of the present disclosure may have a top layout with at least one turn and with a width that is substantially the same as that of conductive lines along the at least one turn. Such a top layout may reduce loading during formation of the conductive socket. Conductive lines of the present disclosure may comprise outer conductive lines and inner conductive lines having ends laterally offset from ends of the outer conductive lines along lengths of the conductive lines. Formation of the inner and outer conductive lines using a mandrel with a turn may enlarge a process window while cutting ends of a sidewall spacer structure from which the inner and outer conductive lines are formed.
    Type: Application
    Filed: February 2, 2022
    Publication date: February 9, 2023
    Inventors: Harry-Hak-Lay Chuang, Kuo-Chyuan Tzeng, Wan-Chen Chen, Chang-Chih Huang
  • Publication number: 20230015652
    Abstract: Some of the present implementations provide a method for a user equipment (UE) for receiving a power saving signal. The method receives, from a base station, a power saving signal comprising a minimum applicable K0 (K0min) that indicates a minimum scheduling offset restriction between a physical downlink control channel (PDCCH) and a physical downlink shared channel (PDCCH). The method determines an application delay based on a predefined value. The method then applies the minimum scheduling offset restriction after the application delay.
    Type: Application
    Filed: July 28, 2022
    Publication date: January 19, 2023
    Inventors: Yu-Hsin Cheng, Chie-Ming Chou, Wan-Chen Lin, Tsung-Hua Tsai
  • Publication number: 20230011218
    Abstract: Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes an isolation structure formed over a semiconductor substrate. A first fin structure and a second fin structure extend from the semiconductor substrate and protrude above the isolation structure. A first gate structure is formed across the first fin structure and a second gate structure is formed across the second fin structure. A gate isolation structure is formed between the first fin structure and the second fin structure and separates the first gate structure from the second gate structure. The gate isolation structure includes a bowl-shaped insulating layer that has a first convex sidewall surface adjacent to the first gate structure and a second convex sidewall surface adjacent to the second gate structure.
    Type: Application
    Filed: July 8, 2021
    Publication date: January 12, 2023
    Inventors: Wan-Chen HSIEH, Chung-Ting KO, Tai-Chun HUANG
  • Publication number: 20220410016
    Abstract: Through the present invention, game players can auction or transact game objects under their game accounts, such as roles, props, services, etc. The management of game account trading through the trading platform will also protect the safety of game object transactions. In addition, players can also take advantage of the functions of the present invention to manage their auctions and negotiate prices.
    Type: Application
    Filed: November 2, 2019
    Publication date: December 29, 2022
    Inventors: Chih-hao CHIEN, Cheng-yu WANG, Wan-chen WU
  • Publication number: 20220415888
    Abstract: A semiconductor structure includes a first gate stack across a first semiconductor fin structure, a second gate stack across a second semiconductor fin structure, a dielectric fin structure between the first semiconductor fin structure and the second semiconductor fin structure, and a gate cut isolation structure over the dielectric fin structure and between the first gate stack and the second gate stack. The gate cut isolation structure includes a protection layer and a fill layer over the protection layer, and the protection layer and the fill layer are made of different materials.
    Type: Application
    Filed: April 15, 2022
    Publication date: December 29, 2022
    Inventors: Wan Chen Hsieh, Chung-Ting Ko, Tai-Chun Huang
  • Patent number: 11530479
    Abstract: In an embodiment, a method of forming a semiconductor device includes forming a hydrophobic coating on an inner surface of an exhaust line, connecting the exhaust line to a semiconductor processing chamber, introducing a first precursor into the semiconductor processing chamber, introducing a second precursor into the semiconductor processing chamber, wherein the first precursor reacts with the second precursor to form a layer of oxide material, and pumping the first precursor and the second precursor from the semiconductor processing chamber and through the exhaust line.
    Type: Grant
    Filed: October 18, 2019
    Date of Patent: December 20, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chung-Ting Ko, Wen-Ju Chen, Wan-Chen Hsieh, Ming-Fa Wu, Tai-Chun Huang, Yung-Cheng Lu, Chi On Chui
  • Patent number: 11532628
    Abstract: Improved methods for forming gate isolation structures between portions of gate electrodes and semiconductor devices formed by the same are disclosed. In an embodiment, a method includes forming a channel structure over a substrate; forming a first isolation structure extending in a direction parallel to the channel structure; forming a dummy gate structure over the channel structure and the first isolation structure; depositing a hard mask layer over the dummy gate structure; etching the hard mask layer to form a first opening through the hard mask layer over the first isolation structure; conformally depositing a first dielectric layer over the hard mask layer, in the first opening, and over the dummy gate structure; etching the first dielectric layer to extend the first opening and expose the dummy gate structure; and etching the dummy gate structure to extend the first opening and expose the first isolation structure.
    Type: Grant
    Filed: May 20, 2021
    Date of Patent: December 20, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Li-Fong Lin, Chung-Ting Ko, Wan Chen Hsieh, Tai-Chun Huang
  • Publication number: 20220379225
    Abstract: The present invention provides a method to establish cloned game accounts, when an auction information is posted on the game account trading platform, the game account trading platform will establish a testing game interface according to the game interface under the relevant game account, and generate a cloned game account based on the game objects, so that the buyer user primary account can enter this testing game interface to test the cloned game account.
    Type: Application
    Filed: November 2, 2019
    Publication date: December 1, 2022
    Inventors: Chih-hao CHIEN, Cheng-yu WANG, Wan-chen WU
  • Publication number: 20220374952
    Abstract: The present invention is publish a method and system for game account valuation, through the establishment of a game account trading platform, provide different game accounts for valuation, acquisition and consignment, seller users can choose a suitable plan according to their personal needs, and through the management of the game account trading platform, increase the credibility and security of transaction information, and also can reduce the impact on the value of game data.
    Type: Application
    Filed: November 2, 2019
    Publication date: November 24, 2022
    Inventors: Chih-hao CHIEN, Cheng-yu WANG, Wan-chen WU