Patents by Inventor Wataru Nakamura
Wataru Nakamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20190115385Abstract: A photoelectric converter of one aspect of the present invention is provided with an element substrate having a photodiode and a thin film transistor arranged in matrix form, an interlayer insulating film laminated on the thin film transistor, a first contact hole formed in the interlayer insulating film and reaching a surface of a source electrode of the thin film transistor, and a second contact hole formed in the interlayer insulating film and reaching a surface of a drain electrode of the thin film transistor, in which a source bus line and the source electrode of the thin film transistor are connected via the first contact hole, the drain electrode of the thin film transistor and a lower layer electrode of the photodiode are connected via the second contact hole, and the tapered part of the second contact hole has a gentler inclination than the tapered part of the first contact hole.Type: ApplicationFiled: March 30, 2017Publication date: April 18, 2019Applicant: SHARP KABUSHIKI KAISHAInventors: HIROYUKI MORIWAKI, KAZUHIDE TOMIYASU, MAKOTO NAKAZAWA, FUMIKI NAKANO, WATARU NAKAMURA
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Publication number: 20190096876Abstract: Provided is a technique of image pickup without being affected by leakage current on an active matrix substrate that includes photoelectric conversion elements. An active matrix substrate 1 includes photoelectric conversion elements that are respectively provided with respect to a plurality of pixels defined by gate lines and data lines 10, and a bias line 13 supplying a bias voltage to each photoelectric conversion element. Further, the active matrix substrate 1 further includes a plurality of data protection circuit units 16a that are connected with the data lines 10, respectively, and a first common line 17a that is connected with the data protection circuits 16a and has a potential equal to or lower than those of the data lines 10, outside the image pickup area composed of a plurality of pixels.Type: ApplicationFiled: September 28, 2018Publication date: March 28, 2019Inventors: HIROYUKI MORIWAKI, AKINORI KUBOTA, FUMIKI NAKANO, WATARU NAKAMURA
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Patent number: 10221497Abstract: A method for manufacturing a wiring board having conductive posts includes preparing a wiring board including electronic circuit and a solder resist layer covering the electronic circuit and having first openings and second openings surrounding the first openings such that the first openings are exposing pad portions of the electronic circuit and that the second openings are exposing post connecting portions of the electronic circuit surrounding the pad portions, applying surface treatment to the pad portions, forming a plating resist layer on the wiring board after the surface treatment of the pad portions such that the plating resist layer has resist openings exposing the post connecting portions, applying electrolytic plating on the post connecting portions such that conductive posts rising from the post connecting portions are formed in the resist openings, and removing the plating resist layer from the wiring board after forming the conductive posts in the resist openings.Type: GrantFiled: March 20, 2015Date of Patent: March 5, 2019Assignee: IBIDEN CO., LTD.Inventors: Kota Noda, Takema Adachi, Wataru Nakamura
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Publication number: 20190050282Abstract: An information processing device including a memory, and a processor coupled to the memory and the processor configured to execute a process, the process including generating data indicating a relationship between a processing load and a communication load of a first computer which executes a specified process in a second information processing system which is the same as or similar to a first information processing system in which a failure occurs, and calculating a processing load of a second computer which executes the specified process in the first information processing system based on the generated data and a communication load of the second computer, the estimated processing load being a processing load before the failure occurs in the first information processing system.Type: ApplicationFiled: August 6, 2018Publication date: February 14, 2019Applicant: FUJITSU LIMITEDInventors: Wataru Nakamura, Yuta OHURA
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Patent number: 10177444Abstract: A scanned antenna (1000) is a scanned antenna including antenna elements (U) arranged together, the scanned antenna including: a TFT substrate (101) including a first dielectric substrate (1), TFTs, gate bus lines, source bus lines, and patch electrodes (15); a slot substrate (201) including a second dielectric substrate (51) a slot electrode (55); a liquid crystal layer (LC) provided between the TFT substrate and the slot substrate; and a reflective conductive plate (65). The slot electrode includes slots (57) arranged so as to correspond to the patch electrodes. As seen from the normal direction to the first dielectric substrate, a plurality of spacer structures (75) provided between the TFT substrate and the slot substrate are arranged so as not to overlap with first regions (Rp1) and/or second regions (Rp2), where the first regions are regions that are within a distance of 0.3 mm from edges of the slots and the second regions are regions that are within a distance of 0.Type: GrantFiled: October 25, 2016Date of Patent: January 8, 2019Assignee: SHARP KABUSHIKI KAISHAInventors: Makoto Nakazawa, Takatoshi Orui, Wataru Nakamura, Tadashi Ohtake, Fumiki Nakano, Kiyoshi Minoura
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Publication number: 20190006746Abstract: A scanning antenna (1000) in which a plurality of antenna units (U) are arranged, the scanning antenna including: a TFT substrate (101) including a first dielectric substrate (1), TFTs, gate bus lines, source bus lines, and patch electrodes (15); a slot substrate (201) including a second dielectric substrate (51) and a slot electrode (55) formed on a first main surface of the second dielectric substrate; a liquid crystal layer (LC) provided between the TFT substrate and the slot substrate; and a reflective conductive plate (65) disposed opposing via a dielectric layer (54) a second main surface opposite to the first main surface of the second dielectric substrate, (51) wherein the slot electrode includes slots disposed corresponding to the respective patch electrodes, and a heater part (68) is further provided on the outside of the TFT substrate (101) or on the outside of the slot substrate (201).Type: ApplicationFiled: October 17, 2016Publication date: January 3, 2019Inventors: TADASHI OHTAKE, KIYOSHI MINOURA, MAKOTO NAKAZAWA, TAKATOSHI ORUI, WATARU NAKAMURA, FUMIKI NAKANO
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Publication number: 20180243943Abstract: A mixer has a circular housing defining a mixing area for mixing and kneading of a gypsum slurry. A rotary disc is positioned in the housing and rotated in a predetermined rotational direction. A rotary driving shaft cointegrally connected with the rotary disc and a plurality of scrapers are positioned in the mixing area. A slurry discharge port is provided on an annular wall of the housing for feeding the gypsum slurry of the mixing area onto a sheet of paper for gypsum board liner. An opening of the slurry discharge port is divided into a plurality of narrow openings, so that fluid resistance on the gypsum slurry flowing out of the mixing area is increased. An annular basal part rotates integrally with the rotary disc and an inner end portion of the scraper is fixed to the annular basal part.Type: ApplicationFiled: August 26, 2015Publication date: August 30, 2018Applicant: YOSHINO GYPSUM CO., LTD.Inventors: Ushio SUDO, Wataru NAKAMURA, Seigo ISHIBASHI, Hirokuni TANI
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Publication number: 20180138593Abstract: A scanned antenna (1000) is a scanned antenna including antenna elements (U) arranged together, the scanned antenna including: a TFT substrate (101) including a first dielectric substrate (1), TFTs, gate bus lines, source bus lines, and patch electrodes (15); a slot substrate (201) including a second dielectric substrate (51) a slot electrode (55); a liquid crystal layer (LC) provided between the TFT substrate and the slot substrate; and a reflective conductive plate (65). The slot electrode includes slots (57) arranged so as to correspond to the patch electrodes. As seen from the normal direction to the first dielectric substrate, a plurality of spacer structures (75) provided between the TFT substrate and the slot substrate are arranged so as not to overlap with first regions (Rp1) and/or second regions (Rp2), where the first regions are regions that are within a distance of 0.3 mm from edges of the slots and the second regions are regions that are within a distance of 0.Type: ApplicationFiled: October 25, 2016Publication date: May 17, 2018Inventors: Makoto NAKAZAWA, Takatoshi ORUI, Wataru NAKAMURA, Tadashi OHTAKE, Fumiki NAKANO, Kiyoshi MINOURA
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Publication number: 20180108874Abstract: A method includes steps of (a) forming a substrate layer 10 above a support substrate 8 which is transparent, and then a thin-film element above the substrate layer 10; and (b) emitting laser beams La and Lb to a face of the support substrate 8 opposite to another face of the support substrate to which the substrate layer 10 and the thin-film element are formed, and delaminating the substrate layer 10 and the thin-film element from the support substrate 8. In step (b), the laser beams La and Lb are emitted from different directions.Type: ApplicationFiled: March 3, 2016Publication date: April 19, 2018Inventors: Tetsunori TANAKA, Wataru NAKAMURA, Shoji OKAZAKI, Masaki FUJIWARA
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Patent number: 9774233Abstract: In one embodiment, a generator includes an alternating current exciter to output first, second and third alternating currents respectively having first, second and third phases, and a rotary rectifier to convert the first, second and third alternating currents into first, second and third direct currents, respectively. The generator further includes a rotating shaft on which the exciter and the rectifier are mounted, and plural conductors mounted on the shaft, and including one or more first conductors, one or more second conductors and one or more third conductors to respectively supply the first, second and third alternating currents from the exciter to the rectifier. The plural conductors include one or more conductor groups in each of which two or more conductors are collectively arranged, and each of the conductor groups includes the two or more conductors arranged to cancel a magnetic field around each conductor in the same group.Type: GrantFiled: July 8, 2014Date of Patent: September 26, 2017Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Kenmei Shimanuki, Hidetoshi Sugimura, Toru Otaka, Daisuke Hiramatsu, Kazuma Tsujikawa, Wataru Nakamura, Kazuki Sato, Kunitomi Niida, Yutaro Arai, Keiichiro Kimura
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Patent number: 9723579Abstract: A traffic data integration method includes: obtaining, by using a computer, pieces of frame data having a same data pattern between first and second traffic data collected respectively by first and second capture devices that capture, as traffic data, frame data communicated by a node in a network; performing, by using the computer, a time correction process by which a time of each piece of frame data in the first and second traffic data is corrected so that capturing times of pieces of obtained frame data are identical; using, by using the computer, frame data for which a same data pattern does not appear repeatedly in a same capture device, as frame data for performing the time correction process; and restricting, by using the computer, a time difference of frame data used when the time correction process is performed.Type: GrantFiled: July 8, 2013Date of Patent: August 1, 2017Assignee: FUJITSU LIMITEDInventors: Koutarou Chihara, Harutaka Tanaka, Wataru Nakamura, Takao Shikama
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Patent number: 9475915Abstract: TASK It is an object of the present invention to provide a hydrogel having excellent mechanical properties and capable of being produced simply by using and mixing an industrially easily obtainable polymer having high versatility and clay particles, and to provide a method of producing the hydrogel. MEANS OF SOLVING THE PROBLEM A hydrogel-forming composition is characterized by containing a polyelectrolyte (A), clay particles (B), and a dispersant (C) for the clay particles.Type: GrantFiled: January 8, 2015Date of Patent: October 25, 2016Assignee: NATIONAL UNIVERSITY CORPORATION GUNMA UNIVERSITYInventors: Hiroyuki Takeno, Wataru Nakamura
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Patent number: 9475909Abstract: TASK It is an object of the present invention to provide a hydrogel having excellent mechanical properties and capable of being produced simply by using and mixing an industrially easily obtainable polymer having high versatility and clay particles, and to provide a method of producing the hydrogel. MEANS OF SOLVING THE PROBLEM A hydrogel-forming composition is characterized by containing a polyelectrolyte (A), clay particles (B), and a dispersant (C) for the clay particles.Type: GrantFiled: January 8, 2015Date of Patent: October 25, 2016Assignee: NATIONAL UNIVERSITY CORPORATION GUNMA UNIVERSITYInventors: Hiroyuki Takeno, Wataru Nakamura
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Patent number: 9401320Abstract: A combined substrate includes a first substrate having multiple first metal posts, a second substrate having multiple second metal posts such that the second metal posts are positioned to oppose the first metal posts, respectively, and multiple solder structures interposed between the first metal posts and the second metal posts, respectively. The first metal posts and/or the second metal posts have recessed surfaces formed such that the solder structures are formed on the recessed surfaces, respectively.Type: GrantFiled: March 4, 2015Date of Patent: July 26, 2016Assignee: IBIDEN CO., LTD.Inventors: Tomoya Daizo, Takema Adachi, Takeshi Furusawa, Wataru Nakamura, Yuki Ito, Yuki Yoshikawa, Tomoyoshi Hirabayashi
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Patent number: 9310438Abstract: A deposition detection circuit (3) provided in a deposition detection device (1) includes a determination circuit (4) determines whether the movable contact (9) is deposited based on a step input signal and a transient response signal when a drive signal is in an off state. The transient response signal is generated so as to correspond to voltage less than or equal to operating voltage of the electromagnetic relay switch (5) according to an excitation coil (6) and a fixed resistor (R1).Type: GrantFiled: July 8, 2013Date of Patent: April 12, 2016Assignee: OMRON CORPORATIONInventors: Masahiro Kinoshita, Hiroyuki Iwasaka, Wataru Nakamura
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Publication number: 20160072099Abstract: In an organic EL display device (electroluminescent device) including an organic EL element (electroluminescent element), a first sealing film covers the organic El element, a second sealing film is formed on the first sealing film, and a third sealing film covers the first sealing film and the second sealing film.Type: ApplicationFiled: February 27, 2014Publication date: March 10, 2016Inventors: Tetsuya OKAMOTO, Takeshi HIRASE, Tohru SENOO, Tohru SONODA, Wataru NAKAMURA
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Publication number: 20160014898Abstract: A printed wiring board includes a first circuit substrate having first pads and second pads such that the first pads are positioned to mount an electronic component on the first circuit substrate and that the second pads are positioned to electrically connect the first circuit substrate to a second circuit substrate, and metal posts including plating material and formed on the second pads respectively such that the metal posts are positioned to mount the second circuit substrate on the first circuit substrate. Each of the metal posts has a height h1 and a thickness b such that the metal posts have a value h1/b which is greater than 0.1 and smaller than 1.0 where the value h1/b is obtained by dividing the height h1 by the thickness b.Type: ApplicationFiled: July 14, 2015Publication date: January 14, 2016Applicant: IBIDEN CO., LTD.Inventors: Takema Adachi, Wataru Nakamura, Tomoyoshi Hirabayashi
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Patent number: 9202651Abstract: A unit for controlling one or more electromagnetic relays, each having a contact point and an exciting coil to which rated power is supplied so as to open and close the contact point, has a control circuit which carries out PWM control so as to keep an electromagnetic relay turned on, after turning on the electromagnetic relay by causing rated power to be supplied to an exciting coil of the electromagnetic relay, and a temperature detecting circuit that detects a resistance value of the exciting coil so as to allow the control circuit to calculate a temperature of the electromagnetic relay. The control circuit changes, depending on external information, a controlling value in accordance with which the PWM control is carried out with respect to the electromagnetic relay. The control circuit detects, from the temperature detecting circuit, a voltage corresponding to the resistance value of the exciting coil.Type: GrantFiled: July 8, 2013Date of Patent: December 1, 2015Assignee: OMRON CorporationInventors: Masahiro Kinoshita, Hiroyuki Iwasaka, Wataru Nakamura
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Publication number: 20150271929Abstract: A method for manufacturing a wiring board having conductive posts includes preparing a wiring board including electronic circuit and a solder resist layer covering the electronic circuit and having first openings and second openings surrounding the first openings such that the first openings are exposing pad portions of the electronic circuit and that the second openings are exposing post connecting portions of the electronic circuit surrounding the pad portions, applying surface treatment to the pad portions, forming a plating resist layer on the wiring board after the surface treatment of the pad portions such that the plating resist layer has resist openings exposing the post connecting portions, applying electrolytic plating on the post connecting portions such that conductive posts rising from the post connecting portions are formed in the resist openings, and removing the plating resist layer from the wiring board after forming the conductive posts in the resist openings.Type: ApplicationFiled: March 20, 2015Publication date: September 24, 2015Applicant: IBIDEN CO., LTD.Inventors: Kota NODA, Takema ADACHI, Wataru NAKAMURA
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Publication number: 20150255433Abstract: A combined substrate includes a first substrate having multiple first metal posts, a second substrate having multiple second metal posts such that the second metal posts are positioned to oppose the first metal posts, respectively, and multiple solder structures interposed between the first metal posts and the second metal posts, respectively. The first metal posts and/or the second metal posts have recessed surfaces formed such that the solder structures are formed on the recessed surfaces, respectively.Type: ApplicationFiled: March 4, 2015Publication date: September 10, 2015Applicant: IBIDEN CO., LTD.Inventors: Tomoya DAIZO, Takema Adachi, Takeshi Furusawa, Wataru Nakamura, Yuki Ito, Yuki Yoshikawa, Tomoyoshi Hirabayashi