Patents by Inventor Wataru Sakamoto
Wataru Sakamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10300712Abstract: A drying device includes a heater, a supporter, a controller, and a temperature detector. The heater heats a medium. The supporter is disposed opposite the heater to support the medium. The controller turns on the heater while the medium is conveyed, and turns off the heater when the medium is stopped. The temperature detector detects a temperature of the supporter. The controller is connected to the temperature detector to turn off the heater when the temperature detected with the temperature detector is a predetermined temperature or higher.Type: GrantFiled: July 5, 2017Date of Patent: May 28, 2019Assignee: Ricoh Company, Ltd.Inventors: Wataru Sakamoto, Ken Onodera, Toshihiro Yoshinuma
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Publication number: 20190137396Abstract: The present invention relates to a fluorescent probe including a carrier molecule, a fluorescent dye a bound to the carrier molecule, and a fluorescent dye b bound to the carrier molecule in which the excitation wavelengths of the fluorescent dyes a and b are different, and FRET does not occur between the fluorescent dyes a and b. The present invention also relates to a method for detecting fluorescence that includes a step of labeling target cells with the fluorescent probe, and a step of irradiating the target cells labeled with the fluorescent probe with excitation light and observing the fluorescence from the fluorescent probe.Type: ApplicationFiled: February 10, 2017Publication date: May 9, 2019Applicants: National University Corporation Nagoya University, KURASHIKI BOSEKI KABUSHIKI KAISHAInventors: Koichiro HAYASHI, Wataru SAKAMOTO, Toshinobu YOGO, Hiroki MARUOKA
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Publication number: 20190100031Abstract: A drying device includes a plurality of blowers to blow air onto an object to be dried, the plurality of blowers being disposed along a direction of conveyance of the object to be dried, and a plurality of heaters to heat air inside the plurality of blowers. Each of the plurality of blowers includes an elongated nozzle arranged along a nozzle direction perpendicular to the direction of conveyance of the object to be dried, and an airflow generator to generate airflow to be blown from the elongated nozzle. The plurality of blowers includes a first blower including the airflow generator at a first end of the first blower in the nozzle direction and a second blower including the airflow generator at a second end of the second blower opposite the first end in the nozzle direction.Type: ApplicationFiled: July 19, 2018Publication date: April 4, 2019Inventors: Hideaki NISHIMURA, Toshihiro YOSHINUMA, Wataru SAKAMOTO, Sho SAWAHATA, Ken ONODERA
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Patent number: 10249635Abstract: According to one embodiment, a semiconductor memory device includes a substrate, semiconductor pillars, first electrode films, a second electrode film, a first insulating film, a second insulating film, and a contact. The semiconductor pillars are provided on the substrate, extend in a first direction crossing an upper surface of the substrate, and are arranged along second and third directions being parallel to the upper surface and crossing each other. The first electrode films extend in the third direction. The second electrode film is provided between the semiconductor pillars and the first electrode films. The first insulating film is provided between the semiconductor pillars and the second electrode film. The second insulating film is provided between the second electrode film and the first electrode films. The contact is provided at a position on the third direction of the semiconductor pillars and is connected to the first electrode films.Type: GrantFiled: November 27, 2017Date of Patent: April 2, 2019Assignee: TOSHIBA MEMORY CORPORATIONInventors: Tatsuya Kato, Wataru Sakamoto, Fumitaka Arai
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Patent number: 10242992Abstract: A semiconductor memory device includes two first electrode films, a first column and a second insulating film. The two first electrode films extend in a first direction and are separated from each other in a second direction. The first column is provided between the two first electrode films and has a plurality of first members and a plurality of insulating members. Each of the first members and each of the insulating members are arranged alternately in the first direction. One of the plurality of first members has a semiconductor pillar, a second electrode film and a first insulating film provided between the semiconductor pillar and the second electrode film. The semiconductor pillar, the first insulating film and the second electrode film are arranged in the second direction. The second insulating film is provided between the first column and one of the two first electrode films.Type: GrantFiled: July 8, 2016Date of Patent: March 26, 2019Assignee: TOSHIBA MEMORY CORPORATIONInventors: Wataru Sakamoto, Ryota Suzuki, Tatsuya Okamoto, Tatsuya Kato, Fumitaka Arai
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Patent number: 10229924Abstract: A semiconductor memory device according to an embodiment includes first and second semiconductor pillars extending in a first direction and being arranged along a second direction, first and second interconnects extending in a third direction and being provided between the first semiconductor pillar and the second semiconductor pillar, a first electrode provided between the first semiconductor pillar and the first interconnect, a second electrode provided between the second semiconductor pillar and the second interconnect, third and fourth interconnects extending in the second direction, a first contact contacting the first semiconductor pillar and being connected to the third interconnect, and a second contact contacting the second semiconductor pillar and being connected to the fourth interconnect. The third and fourth interconnects each pass through both a region directly above the first semiconductor pillar and a region directly above the second semiconductor pillar.Type: GrantFiled: August 25, 2017Date of Patent: March 12, 2019Assignee: Toshiba Memory CorporationInventors: Wataru Sakamoto, Tatsuya Kato, Yuta Watanabe, Katsuyuki Sekine, Toshiyuki Iwamoto, Fumitaka Arai
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Patent number: 10150306Abstract: A drying device includes a roller, and the drying device is for drying a recording medium conveyed by rotation of the roller. The drying device includes a first heating source and second heating source included inside the roller; first and second temperature detectors for respectively detecting a temperature of a first region on a surface of the roller and a temperature of a second region on the surface of the roller; and a heating controller that controls heating and termination of the heating by the first heating source and/or the second heating source, wherein, upon detecting that a temperature of one region of the first region and the second region is higher than or equal to a predetermined temperature, the heating controller terminates heating by one heating source corresponding to the other region.Type: GrantFiled: July 18, 2017Date of Patent: December 11, 2018Assignee: Ricoh Company, Ltd.Inventors: Wataru Sakamoto, Toshihiro Yoshinuma
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Publication number: 20180350828Abstract: According to one embodiment, a semiconductor device includes a stacked body, a columnar portion, a first charge storage portion, and a second charge storage portion. The stacked body includes a plurality of electrode layers stacked in a first direction. The plurality of electrode layers includes a first electrode layer, and a second electrode layer. The columnar portion extends in the first direction in the stacked body. The first charge storage portion provides between the first electrode layer and the columnar portion. The second charge storage portion provides between the second electrode layer and the columnar portion. A first thickness in a second direction intersecting the first direction of the first charge storage portion between the first electrode layer and the columnar portion is thicker than a second thickness in the second direction of the second charge storage portion between the second electrode layer and the columnar portion.Type: ApplicationFiled: July 30, 2018Publication date: December 6, 2018Applicant: Toshiba Memory CorporationInventor: Wataru SAKAMOTO
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Patent number: 10134750Abstract: According to one embodiment, a semiconductor memory device includes a substrate, semiconductor pillars, first electrode films, a second electrode film, a first insulating film, a second insulating film, and a contact. The semiconductor pillars are provided on the substrate, extend in a first direction crossing an upper surface of the substrate, and are arranged along second and third directions being parallel to the upper surface and crossing each other. The first electrode films extend in the third direction. The second electrode film is provided between the semiconductor pillars and the first electrode films. The first insulating film is provided between the semiconductor pillars and the second electrode film. The second insulating film is provided between the second electrode film and the first electrode films. The contact is provided at a position on the third direction of the semiconductor pillars and is connected to the first electrode films.Type: GrantFiled: August 28, 2015Date of Patent: November 20, 2018Assignee: TOSHIBA MEMORY CORPORATIONInventors: Tatsuya Kato, Wataru Sakamoto, Fumitaka Arai
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Publication number: 20180323204Abstract: A semiconductor device according to an embodiment includes two semiconductor pillars, a connection member connected between the two semiconductor pillars, and a contact connected to the connection member. There is not a conductive member disposed between the two semiconductor pillars.Type: ApplicationFiled: June 26, 2018Publication date: November 8, 2018Applicant: TOSHIBA MEMORY CORPORATIONInventors: Mikiko MORI, Ryota Suzuki, Tatsuya Kato, Wataru Sakamoto, Fumie Kikushima
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Patent number: 10068911Abstract: According to one embodiment, a semiconductor device includes a stacked body, a columnar portion, a first charge storage portion, and a second charge storage portion. The stacked body includes a plurality of electrode layers stacked in a first direction. The plurality of electrode layers includes a first electrode layer, and a second electrode layer. The columnar portion extends in the first direction in the stacked body. The first charge storage portion provides between the first electrode layer and the columnar portion. The second charge storage portion provides between the second electrode layer and the columnar portion. A first thickness in a second direction intersecting the first direction of the first charge storage portion between the first electrode layer and the columnar portion is thicker than a second thickness in the second direction of the second charge storage portion between the second electrode layer and the columnar portion.Type: GrantFiled: March 16, 2017Date of Patent: September 4, 2018Assignee: TOSHIBA MEMORY CORPORATIONInventor: Wataru Sakamoto
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Patent number: 10043815Abstract: A semiconductor device according to an embodiment includes two semiconductor pillars, a connection member connected between the two semiconductor pillars, and a contact connected to the connection member. There is not a conductive member disposed between the two semiconductor pillars.Type: GrantFiled: August 10, 2017Date of Patent: August 7, 2018Assignee: TOSHIBA MEMORY CORPORATIONInventors: Mikiko Mori, Ryota Suzuki, Tatsuya Kato, Wataru Sakamoto, Fumie Kikushima
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Patent number: 9984754Abstract: According to an embodiment, an operation method for a memory device which has a first memory element and a second memory element respectively provided on both sides of a semiconductor member includes applying a first potential on the second word line to write a second data to the second memory and applying a second potential on the first word line to write the first data to the first memory. The first potential increases by a first step voltage and the second potential increases by a second step voltage.Type: GrantFiled: March 12, 2015Date of Patent: May 29, 2018Assignee: TOSHIBA MEMORY CORPORATIONInventors: Wataru Sakamoto, Fumitaka Arai, Tatsuya Kato
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Publication number: 20180083021Abstract: A semiconductor device includes a stacked body 100, first insulating layers 45, a second insulating layer 46 and columnar portions CL. The stacked body 100 includes electrode layers 41 stacked with an insulating body interposed along a Z-direction. The first insulating layers 45 extend in an X-direction and are provided in the stacked body 100 from an upper end thereof to a lower end thereof. The second insulating layer extends in the X-direction and is provided in the stacked body 100 from the upper end to partway through the stacked body 100 between one of the first insulating layers 45 and another one of the first insulating layers 45. The columnar portion CL has a bowed configuration. The second insulating layer 46 is provided in a region B including a location of a maximum inner diameter Dm of the columnar portion CL.Type: ApplicationFiled: September 11, 2017Publication date: March 22, 2018Applicant: Toshiba Memory CorporationInventor: Wataru SAKAMOTO
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Publication number: 20180083018Abstract: A semiconductor memory device includes a semiconductor substrate, a stepped structure including a stepped part in which a plurality of first insulating layers and conductive layers are alternately stacked on a main surface of the semiconductor substrate, the conductive layers including first, second, and third conductive layers, a second insulating layer which covers the stepped structure, a first contact interconnection which penetrates the second insulating layer and the first conductive layer in a thickness direction of the semiconductor substrate and is electrically connected to the second conductive layer, and a second contact interconnection which penetrates the second insulating layer and the second conductive layer in the thickness direction of the semiconductor substrate and is electrically connected to the third conductive layer.Type: ApplicationFiled: August 28, 2017Publication date: March 22, 2018Inventors: Shigehiro YAMAKITA, Yoshiaki FUKUZUMI, Wataru SAKAMOTO, Satoshi NAGASHIMA
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Publication number: 20180083022Abstract: According to one embodiment, a semiconductor memory device includes a substrate, semiconductor pillars, first electrode films, a second electrode film, a first insulating film, a second insulating film, and a contact. The semiconductor pillars are provided on the substrate, extend in a first direction crossing an upper surface of the substrate, and are arranged along second and third directions being parallel to the upper surface and crossing each other. The first electrode films extend in the third direction. The second electrode film is provided between the semiconductor pillars and the first electrode films. The first insulating film is provided between the semiconductor pillars and the second electrode film. The second insulating film is provided between the second electrode film and the first electrode films. The contact is provided at a position on the third direction of the semiconductor pillars and is connected to the first electrode films.Type: ApplicationFiled: November 27, 2017Publication date: March 22, 2018Applicant: Toshiba Memory CorporationInventors: Tatsuya KATO, Wataru SAKAMOTO, Fumitaka ARAI
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Publication number: 20180053774Abstract: According to one embodiment, a semiconductor device includes a stacked body, a columnar portion, a first charge storage portion, and a second charge storage portion. The stacked body includes a plurality of electrode layers stacked in a first direction. The plurality of electrode layers includes a first electrode layer, and a second electrode layer. The columnar portion extends in the first direction in the stacked body. The first charge storage portion provides between the first electrode layer and the columnar portion. The second charge storage portion provides between the second electrode layer and the columnar portion. A first thickness in a second direction intersecting the first direction of the first charge storage portion between the first electrode layer and the columnar portion is thicker than a second thickness in the second direction of the second charge storage portion between the second electrode layer and the columnar portion.Type: ApplicationFiled: March 16, 2017Publication date: February 22, 2018Applicant: Toshiba Memory CorporationInventor: Wataru SAKAMOTO
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Publication number: 20180022114Abstract: A drying device includes a roller, and the drying device is for drying a recording medium conveyed by rotation of the roller. The drying device includes a first heating source and second heating source included inside the roller; first and second temperature detectors for respectively detecting a temperature of a first region on a surface of the roller and a temperature of a second region on the surface of the roller; and a heating controller that controls heating and termination of the heating by the first heating source and/or the second heating source, wherein, upon detecting that a temperature of one region of the first region and the second region is higher than or equal to a predetermined temperature, the heating controller terminates heating by one heating source corresponding to the other region.Type: ApplicationFiled: July 18, 2017Publication date: January 25, 2018Applicant: Ricoh Company, Ltd.Inventors: Wataru SAKAMOTO, Toshihiro YOSHINUMA
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Publication number: 20180009237Abstract: A drying device includes a heater, a supporter, a controller, and a temperature detector. The heater heats a medium. The supporter is disposed opposite the heater to support the medium. The controller turns on the heater while the medium is conveyed, and turns off the heater when the medium is stopped. The temperature detector detects a temperature of the supporter. The controller is connected to the temperature detector to turn off the heater when the temperature detected with the temperature detector is a predetermined temperature or higher.Type: ApplicationFiled: July 5, 2017Publication date: January 11, 2018Inventors: Wataru SAKAMOTO, Ken ONODERA, Toshihiro YOSHINUMA
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Publication number: 20180006050Abstract: A semiconductor memory device according to an embodiment, includes a semiconductor pillar extending in a first direction, a first electrode extending in a second direction crossing the first direction, a second electrode provided between the semiconductor pillar and the first electrode, a first insulating film provided between the semiconductor pillar and the second electrode, and a second insulating film provided between the first electrode and the second electrode. The second electrode includes a thin sheet portion disposed on the first electrode side, and a thick sheet portion disposed on the semiconductor pillar side. A length in the first direction of the thick sheet portion is longer than a length in the first direction of the thin sheet portion.Type: ApplicationFiled: September 14, 2017Publication date: January 4, 2018Applicant: Toshiba Memory CorporationInventors: Yuta Watanabe, Fumitaka Arai, Katsuyuki Sekine, Toshiyuki Iwamoto, Wataru Sakamoto, Tatsuya Kato