Abstract: The present disclosure relates to stair systems and methods for allowing stair movement between building levels while maintaining the structural integrity of the stair system for safe egress passage. The systems and methods of the present disclosure allow for independent movement of the surrounding building walls, landings, floor slabs, and/or any other portion of the surrounding building structure or stair system. The embodiments of the present disclosure are suitable for use in both new constructions as well as in existing constructions for retrofit applications to allow for movement between levels, landings, or within stairwell structures. The present disclosure reduces stair damage during building movement whether it is from wind, thermal, or seismic activity, and/or any other type of suitable force or experience, as the present disclosure allows for directional movement, or a combination thereof, including tension and compression, lateral, or vertical movement.

Abstract: A processor element in a processor-based system is configured to fetch one or more instructions associated with a program binary, where the one or more instructions include an instruction having an immediate operand. The processor element is configured to determine if the immediate operand is a reference to a wide immediate operand. In response to determining that the immediate operand is a reference to a wide immediate operand, the processor element is configured to retrieve the wide immediate operand from a common intermediate lookup table (CILT) in the program binary, where the immediate operand indexes the wide immediate operand in the CILT. The processor element is then configured to process the instruction having the immediate operand such that the immediate operand is replaced with the wide immediate operand from the CILT.

Abstract: Operand-based reach explicit dataflow processors, and related methods and computer-readable media are disclosed. The operand-based reach explicit dataflow processors support execution of a producer instruction that explicitly names a target consumer operand of a consumer instruction in a consumer operand encoding namespace of the producer instruction. The produced value from execution of the producer instruction is provided or otherwise made available as an input to the named target consumer operand of the consumer instruction as a result of processing the producer instruction. The target consumer operand is encoded in the producer instruction as an operand target distance relative to the producer instruction. Instructions in an instruction stream between the producer instruction and the targeted consumer instruction that have no operands do not consume an operand reach namespace in the producer instructions.

Abstract: The disclosure provides cleaning compositions including at least one acid, at least one carbonate salt, at least one gum, at least one acid salt, and, optionally, at least one chelating agent. When exposed to an aqueous medium, the cleaning compositions may produce carbon dioxide. These cleaning compositions find use, for example, in cleaning textile fibers, such as carpets, drapery, upholstery, and the like. The disclosure provides methods of cleaning soiled textile fibers with a cleaning composition including gum arabic, at least one acid, and at least one carbonate salt.

Abstract: Control of an amplitude of a signal applied to rods of a quadrupole is described. In one aspect, a mass spectrometer includes a quadrupole mass analyzer and a resonant circuit to generate a radio frequency (RF) signal applied to rods of the quadrupole mass analyzer. An amplitude control circuit can be inductively coupled with inductors of the resonant circuit to selectively discharge energy from the resonant circuit and, therefore, adjust the amplitude of the signal in particular situations.

Abstract: In one embodiment, a wheel righting apparatus includes a main frame and a wheel latching frame that is pivotally coupled to the main frame. The wheel latching frame is configured to be removably coupled to a wheel. The wheel righting apparatus also includes a winch assembly coupled to the main frame. The winch assembly is operable to move the wheel from a horizontal position to a vertical position by pivoting the wheel latching frame relative to the main frame.

Abstract: Latency-based instruction reservation clustering in a scheduler circuit in a processor is disclosed. The scheduler circuit includes a plurality of latency-based reservation circuits each having an assigned producer instruction cycle latency. Producer instructions with the same cycle latency can be clustered in the same latency-based reservation circuit. Thus, the number of reservation entries is distributed among the plurality of latency-based reservation circuits to avoid or reduce an increase in the number of scheduling path connections and complexity in each reservation circuit to avoid or reduce an increase in scheduling latency. The scheduling path connections are reduced for a given number of reservation entries over a non-clustered pick circuit, because signals (e.g., wake-up signals, pick-up signals) used for scheduling instructions in each latency-based reservation circuit do not have to have the same clock cycle latency so as to not impact performance.

Abstract: Enabling early execution of move-immediate instructions having variable immediate value sizes in processor-based devices is disclosed. In one exemplary embodiment, a processor-based device provides a move-immediate logic circuit that detects a move-immediate instruction comprising an immediate value and a destination register. For frequently encountered immediate values, the move-immediate logic circuit allocates a physical register from an immediate physical register file (IPRF), and writes an IPRF tag corresponding to the allocated IPRF register into a most-recent mapping table (MRT) entry for the destination register. Subsequent move-immediate instructions embedding the same immediate value, as well as other dependent instructions, may then obtain the immediate value from the IPRF register by accessing the MRT entry.

Abstract: Operand-based reach explicit dataflow processors, and related methods and computer-readable media are disclosed. The operand-based reach explicit dataflow processors support execution of a producer instruction that explicitly names a target consumer operand of a consumer instruction in a consumer operand encoding namespace of the producer instruction. The produced value from execution of the producer instruction is provided or otherwise made available as an input to the named target consumer operand of the consumer instruction as a result of processing the producer instruction. The target consumer operand is encoded in the producer instruction as an operand target distance relative to the producer instruction. Instructions in an instruction stream between the producer instruction and the targeted consumer instruction that have no operands do not consume an operand reach namespace in the producer instructions.

Abstract: Minimizing traversal of a processor reorder buffer (ROB) for register rename map table (RMT) state recovery for interrupted instruction recovery in a processor. Instructions may execute out of order in a processor. Information about the logical register-to-physical register mapping resulting from each instruction is stored in entries in program order in the ROB. When the pipeline is interrupted by an instruction that fails to execute, changing program flow, all instructions following the interrupting instruction may be flushed from the processor pipeline. It is important to return the state of the RMT to the state that existed when the interrupting instruction entered the pipeline. To recover the RMT state in response to an interrupting instruction, register mapping information in the ROB entries is traversed to either undo the younger instructions that entered the pipeline after the interrupting instruction or replay the older instructions that entered the pipeline before the interrupting instruction.

Abstract: Providing late physical register allocation and early physical register release in out-of-order processor (OOP)-based devices implementing a checkpoint-based architecture is provided. In this regard, an OOP-based device provides a register management circuit that is configured to employ a combination of the checkpoint approach and the virtual register approach. The register management circuit includes a most recent table (MRT) for tracking mappings of logical register numbers (LRNs) to physical register numbers (PRNs), a physical register file (PRF) storing information for physical registers, a virtual register file (VRF) storing data for virtual registers, and a checkpoint queue for tracking active checkpoints (each of which is a snapshot of the MRT at a given time).

Abstract: A wireless power circuit is presented that includes a transmit coil coupled to a first node; a receive coil coupled to the first node; a switch circuit coupled to the transmit coil and the receive coil opposite the first node, the switch switching the transmit coil to a second node in a transmit mode and switching the receive coil to the second node in a receive mode; a controller coupled to the first node and the second node, the controller coupled to provide signals to the switch circuit; and a self-start circuit coupled to the receive coil (or Tx coil) that automatically selects one of the coils to be used, the self-start circuit providing power to the switch circuit to hold the switch circuit in the receive mode (or predefined coil to be selected by default).

Abstract: Exemplary reach-based explicit dataflow processors and related computer-readable media and methods. The reach-based explicit dataflow processors are configured to support execution of producer instructions encoded with explicit naming of consumer instructions intended to consume the values produced by the producer instructions. The reach-based explicit dataflow processors are configured to make available produced values as inputs to explicitly named consumer instructions as a result of processing producer instructions. The reach-based explicit dataflow processors support execution of a producer instruction that explicitly names a consumer instruction based on using the producer instruction as a relative reference point from the producer instruction.

Abstract: A virtual reality (VR) arena and related methods are disclosed. In one embodiment, the VR arena includes an enclosure and at least one support that is attached to the enclosure. The enclosure encloses a user action regions. Furthermore, the enclosure and at least one support define a wiring track around the enclosure. In this manner, a user can be maintained within the user action region while a VR system is in use by the enclosure. Additionally, the support(s) can be used to support the VR user device(s) while the wiring track can be used to maintain the wiring for the VR user device(s) out of the user action region.

Abstract: In accordance with embodiments of the present invention, a coil design for the transmission of wireless power. In some embodiments, the coil can include a winding with one or more turns of conductive traces mounted on a substrate, wherein the one or more turns include characteristics that enhance operation of the coil. In some embodiments, the winding includes a transmit coil and a receive coil, each coupled to terminals that provide for a transmit functionality and a receive functionality. In some embodiments, the traces are varied in width and/or thickness in order to optimize the inductance and the coil resistance. In some embodiments, parameters of a control circuit coupled to the coil to affect a transmit functionality or a receive functionality can be optimized.

Abstract: Synthetic Cannabinoids are the most complex branch of designer drugs encountered in forensic chemistry. A screening method has been developed that can accurately identify the correct structural category of an unknown Synthetic Cannabinoid. Knowledge of this information is very important when no reference data or standards are available since certain sub-categories contain Schedule I Controlled Dangerous Substances. The Bridge portion of these molecules present a unique carbonyl band cluster within a small 200 wavenumber interval of the mid-infrared region that can only exist in vapor phase through GC/FTIR light-pipe technology or heated static vapor cell FTIR. This special relationship is not applicable to any other forms of solid phase vibrational spectroscopy (FTIR, RAMAN) including GC/FTIR solid-deposit techniques.

Abstract: In accordance with embodiments of the present invention, a wireless power transmitter includes a transmit coil that includes a plurality of concentric coils; a switch circuit coupled to the plurality of concentric coils; a driver coupled to provide a voltage to the switch circuit; and a controller coupled to the switch circuit, the controller providing control signals to the switch circuit selecting to provide the voltage across one or more of the plurality of concentric coils depending on a Q-factor measuring in the presence of a receive coil. A method of operating a wireless power transmitter includes determining a measured Q-factor for each of a plurality of configurations of concentric transmit coils; determining a difference between each of the measured Q-factors and a standard Q-factor; and selecting one of the plurality of configurations based on the differences.

Abstract: A hair iron according to one example embodiment includes a first arm and a second arm movable relative to each other between an open position and a closed position. A contact surface is positioned on an exterior of the first arm for contacting hair during use. The hair iron includes a heater having a ceramic substrate and an electrical resistor material thick film printed on a surface of the ceramic substrate. The heater generates heat by applying an electric current to the electrical resistor material. The heater is positioned to supply heat to the contact surface.

Abstract: A cooking vessel according to one example embodiment includes a food receptacle for holding food during cooking. The cooking vessel includes an inner shell and an outer shell. An outside surface of the inner shell forms the food receptacle. A portion of an inside surface of the inner shell is spaced from a portion of an inside surface of the outer shell forming a sealed volume between the inner shell and the outer shell. A heat pipe is positioned within the sealed volume between the inner shell and the outer shell for distributing heat through the sealed volume between the inner shell and the outer shell. Embodiments include those wherein each of the inner shell and the outer shell includes a respective bottom wall and a respective side wall.

Abstract: A heater includes an aluminum nitride base having equal to or less than 1% impurities, particularly one embodiment having none of polybrominated biphenyl, polybrominated diphenyl ether, hexabromocyclododecane, polyvinyl chloride, chlorinated paraffin, phthalate, cadmium, hexavalent chromium, lead, and mercury. At least one resistive trace of silver and palladium overlies the base as does a conductor of silver and platinum or palladium that electrically connects to the resistive trace to apply an external voltage to the resistive trace for heating thereof. At least four, but optionally five, layers of glass overlie the resistive trace and part of the conductor. A first two consecutive layers of the glass layers define a first glass having a solid content of more than 65% and a viscosity of 100 Pa·s or less. The following two or three consecutive layers of the five layers define a second glass dissimilar to the first.