Patents by Inventor Wei-An Lin

Wei-An Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240127754
    Abstract: A display may have an array of pixels each of which has a light-emitting diode such as an organic light-emitting diode. A drive transistor and an emission transistor may be coupled in series with the light-emitting diode of each pixel between a positive power supply and a ground power supply. The pixels may include first and second switching transistors. A data storage capacitor may be coupled between a gate and source of the drive transistor in each pixel. Signal lines may be provided in columns of pixels to route signals such as data signals, sensed drive currents from the drive transistors, and predetermined voltages between display driver circuitry and the pixels. The switching transistors, emission transistors, and drive transistors may include semiconducting-oxide transistors and silicon transistors and may be n-channel transistors or p-channel transistors.
    Type: Application
    Filed: December 7, 2023
    Publication date: April 18, 2024
    Inventors: Chin-Wei Lin, Hung Sheng Lin, Shih Chang Chang, Shinya Ono
  • Publication number: 20240128403
    Abstract: The present disclosure provides a micro light-emitting element, method for manufacturing a micro light-emitting element, and a light-emitting device. The micro light-emitting element includes a DBR structure layer, including a DBR adhesive layer, a DBR reflective layer, and a DBR sacrificial layer, where the DBR adhesive layer, the DBR reflective layer, and the DBR sacrificial layer are sequentially stacked. Subsequent structural coverage of a DBR reflective layer is improved by means of the DBR adhesion layer. Density of film layers of the DBR sacrificial layer, the DBR reflective layer, and the DBR adhesive layer are sequentially increased, so that etching rates of the DBR sacrificial layer, the DBR reflective layer, and the DBR adhesive layer are sequentially decreased during etching, thereby forming an inverted trapezoidal through hole which comprises an inclined side wall by an etching process.
    Type: Application
    Filed: December 22, 2023
    Publication date: April 18, 2024
    Applicant: XIAMEN CHANGELIGHT CO., LTD.
    Inventors: Wei LIU, Weiwen LIU, Shaowen PENG, Fengjie LIN, Hongyi ZHOU
  • Publication number: 20240128216
    Abstract: A bonding structure that may be used to form 3D-IC devices is formed using first oblong bonding pads on a first substrate and second oblong bonding pads one a second substrate. The first and second oblong bonding pads are laid crosswise, and the bond is formed. Viewed in a first cross-section, the first bonding pad is wider than the second bonding pad. Viewed in a second cross-section at a right angle to the first, the second bonding pad is wider than the first bonding pad. Making the bonding pads oblong and angling them relative to one another reduces variations in bonding area due to shifts in alignment between the first substrate and the second substrate. The oblong shape in a suitable orientation may also be used to reduce capacitive coupling between one of the bonding pads and nearby wires.
    Type: Application
    Filed: January 4, 2023
    Publication date: April 18, 2024
    Inventors: Hao-Lin Yang, Kuan-Chieh Huang, Wei-Cheng Hsu, Tzu-Jui Wang, Ching-Chun Wang, Hsiao-Hui Tseng, Chen-Jong Wang, Dun-Nian Yaung
  • Publication number: 20240128142
    Abstract: The present application discloses a double-sided SiP packaging structure and a manufacturing method thereof, wherein the double-sided SiP packaging structure comprises a substrate, a first packaging structure arranged on the substrate, and a second packaging structure arranged below the substrate; the second packaging structure comprises a chip, interposer and a molding material; a conductive structure array is arranged on an upper surface of the interposer; the interposer is arranged below the substrate through the conductive structure array; a space region among a lower surface of the substrate, the chip and the interposer is filled with the molding material; a conductive bonding pad array is arranged on the lower surface of the interposer; and a groove is formed in a part of region between the conductive bonding pad and an edge contour of the interposer.
    Type: Application
    Filed: October 12, 2023
    Publication date: April 18, 2024
    Applicant: JCET GROUP CO., LTD.
    Inventors: Shuo Liu, Yaojian Lin, Jianyong Wu, Wei Yan, Jing Zhao
  • Publication number: 20240128313
    Abstract: A method includes providing a substrate, forming a patterned hard mask layer over the substrate, etching the patterned hard mask layer to form a hole that penetrates the patterned hard mask layer, forming a barrier portion in the hole, removing the patterned hard mask layer, and forming a gate structure over the substrate. Formation of the gate structure includes forming a dielectric body portion on the substrate. The barrier portion that is thicker than the dielectric body portion adjoins one end of the dielectric body portion. The dielectric body portion and the barrier portion are collectively referred to as a gate dielectric layer. Formation of the gate structure further includes forming a gate electrode on the gate dielectric layer and forming gate spacers on opposite sidewalls of the gate electrode. During formation of the gate spacers, a portion of the barrier portion is removed to form a recessed corner.
    Type: Application
    Filed: October 17, 2022
    Publication date: April 18, 2024
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Tse-Hsiao LIU, Chih-Wei LIN, Po-Hao CHIU, Pi-Kuang CHUANG, Ching-Yi HSU
  • Publication number: 20240123434
    Abstract: A multifunctional catalyst, a method for producing the same, and a method for using the same are provided. The multifunctional catalyst is applicable for recycling a polyester fabric. The multifunctional catalyst includes a carrier, and a first functional ionic liquid and a second functional ionic liquid that are grafted on the carrier. The carrier is an inorganic composite powder material, and is composed of following chemical components: C: Na—Ni/Al2O3. In a process of recycling the polyester fabric, the multifunctional catalyst simultaneously decolorizes and depolymerizes the polyester fabric. The first functional ionic liquid is used to decolorize the polyester fabric, and the second functional ionic liquid is used to depolymerize the polyester fabric.
    Type: Application
    Filed: December 12, 2022
    Publication date: April 18, 2024
    Inventors: TE-CHAO LIAO, WEI-SHENG CHENG, YU-LIN LI
  • Publication number: 20240128518
    Abstract: An electrode assembly and a lithium ion electric roll having the same are provided. The electrode assembly includes: a first electrode unit; a first anti-puncture cushion; in which the first electrode unit includes a first electrode sheet, an second electrode sheet, and a separator, the second electrode sheet comprises a second top edge and a second bottom edge along the length direction of the first electrode unit; an edge of the first anti-puncture cushion exceeds the second electrode sheet from the second top edge or the second bottom edge along the length direction of the first electrode unit.
    Type: Application
    Filed: December 22, 2023
    Publication date: April 18, 2024
    Applicant: DONGGUAN AMPEREX TECHNOLOGY LIMITED
    Inventors: Junliang ZHU, Haibing WANG, Tongming DONG, Wenqiang CHENG, Baohua CHEN, Shufeng WU, Wei YANG, Zhihua QIN, Meina LIN
  • Patent number: 11961093
    Abstract: A method for regulating an unmanned aerial vehicle (UAV) includes receiving a UAV identifier and one or more types of contextual information broadcasted by the UAV. The UAV identifier uniquely identifies the UAV from other UAVs. The one or more types of contextual information includes at least geographical information of the UAV. The method further includes authenticating, via an authentication device, an identity of the UAV based on the UAV identifier to determine whether the UAV is authorized for operation, and transmitting a signal to a remote device in response to determining whether the UAV is authorized for operation.
    Type: Grant
    Filed: June 20, 2022
    Date of Patent: April 16, 2024
    Assignee: SZ DJI TECHNOLOGY CO., LTD.
    Inventors: Ming Gong, Jin Dai, Hao Cui, Xiaodong Wang, Han Huang, Jun Wu, Wei Fan, Ning Ma, Xinhua Rong, Xingsen Lin
  • Patent number: 11961738
    Abstract: In a method of forming a pattern, a first pattern is formed over an underlying layer, the first pattern including main patterns and a lateral protrusion having a thickness of less than 25% of a thickness of the main patterns, a hard mask layer is formed over the first pattern, a planarization operation is performed to expose the first pattern without exposing the lateral protrusion, a hard mask pattern is formed by removing the first pattern while the lateral protrusion being covered by the hard mask layer, and the underlying layer is patterned using the hard mask pattern as an etching mask.
    Type: Grant
    Filed: February 12, 2021
    Date of Patent: April 16, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chin-Ta Chen, Hua-Tai Lin, Han-Wei Wu, Jiann-Yuan Huang
  • Patent number: 11961944
    Abstract: A semiconductor device and a manufacturing method thereof are provided. The semiconductor device includes a semiconductor substrate, active devices and transparent conductive patterns. The active devices are formed on the semiconductor substrate. The transparent conductive patterns are formed over the active devices and electrically connected to the active devices. The transparent conductive patterns are made of a metal oxide material. The metal oxide material has a first crystalline phase with a prefer growth plane rich in oxygen vacancy, and has a second crystalline phase with a prefer growth plane poor in oxygen vacancy.
    Type: Grant
    Filed: January 31, 2023
    Date of Patent: April 16, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-En Yen, Ming-Da Cheng, Mirng-Ji Lii, Wen-Hsiung Lu, Cheng-Jen Lin, Chin-Wei Kang, Chang-Jung Hsueh
  • Patent number: 11961769
    Abstract: A method of forming an integrated circuit, including forming a n-type doped well (N-well) and a p-type doped well (P-well) disposed side by side on a semiconductor substrate, forming a first fin active region extruded from the N-well and a second fin active region extruded from the P-well, forming a first isolation feature inserted between and vertically extending through the N-well and the P-well, and forming a second isolation feature over the N-well and the P-well and laterally contacting the first and the second fin active regions.
    Type: Grant
    Filed: November 7, 2022
    Date of Patent: April 16, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD
    Inventors: Kuo-Hsiu Hsu, Yu-Kuan Lin, Feng-Ming Chang, Hsin-Wen Su, Lien Jung Hung, Ping-Wei Wang
  • Patent number: 11961912
    Abstract: The present application provides a semiconductor device and the method of making the same. The method includes recessing a fin extending from a substrate, forming a base epitaxial feature on the recessed fin, forming a bar-like epitaxial feature on the base epitaxial feature, and forming a conformal epitaxial feature on the bar-like epitaxial feature. The forming of the bar-like epitaxial feature includes in-situ doping the bar-like epitaxial feature with an n-type dopant at a first doping concentration. The forming of the conformal epitaxial feature includes in-situ doping the conformal epitaxial feature with a second doping concentration greater than the first doping concentration.
    Type: Grant
    Filed: June 6, 2022
    Date of Patent: April 16, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chun-An Lin, Wei-Yuan Lu, Feng-Cheng Yang, Tzu-Ching Lin, Li-Li Su
  • Patent number: 11961584
    Abstract: The present invention provides a readout integrated circuit and an operation method thereof. The readout integrated circuit includes a readout circuit, a line buffer and a communication interface circuit. The readout circuit reads out a plurality of row sensing results of a plurality of sensor rows of a sensor. The line buffer is coupled to the readout circuit for temporarily storing a current row sensing result of a current sensor row of the sensor. The communication interface circuit is coupled to the line buffer. After the current row sensing result of the current sensor row is temporarily stored into the line buffer, the communication interface circuit outputs the current row sensing result in real time to a host circuit.
    Type: Grant
    Filed: July 7, 2022
    Date of Patent: April 16, 2024
    Assignee: Novatek Microelectronics Corp.
    Inventor: Wu Wei Lin
  • Patent number: 11961810
    Abstract: An embodiment bump on trace (BOT) structure includes a contact element supported by an integrated circuit, an under bump metallurgy (UBM) feature electrically coupled to the contact element, a metal ladder bump mounted on the under bump metallurgy feature, the metal ladder bump having a first tapering profile, and a substrate trace mounted on a substrate, the substrate trace having a second tapering profile and coupled to the metal ladder bump through direct metal-to-metal bonding. An embodiment chip-to-chip structure may be fabricated in a similar fashion.
    Type: Grant
    Filed: June 21, 2021
    Date of Patent: April 16, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Yu-Wei Lin, Sheng-Yu Wu, Yu-Jen Tseng, Tin-Hao Kuo, Chen-Shien Chen
  • Patent number: 11962527
    Abstract: A communications apparatus includes a processor configured to generate a radio frame. The radio frame comprises a data block. The data block comprises a plurality of N pilot blocks, a plurality of M sub-data blocks, and one guard interval (GI). Every two N pilot blocks of the plurality of N pilot blocks are not adjacent. The GI is located at a tail end of the data block, 4?N?8, N is an integer, M?N?1, and M is an integer. The communications apparatus also includes transceiver configured to send the radio frame to a receiver.
    Type: Grant
    Filed: April 27, 2021
    Date of Patent: April 16, 2024
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Min Yan, Guangjian Wang, Wei Lin, Mengyao Ma, Yanchun Li
  • Patent number: 11961939
    Abstract: A method of manufacturing a light-emitting device, including: providing a substrate structure including a top surface; forming a precursor layer on the top surface; removing a portion of the precursor layer and a portion of the substrate from the top surface to form a base portion and a plurality of protrusions regularly arranged on the base portion; forming a buffer layer on the base portion and the plurality protrusions; and forming a III-V compound cap layer on the buffer layer; wherein one of the plurality of protrusions comprises a first portion and a second portion formed on the first portion; wherein the first portion is integrated with the base portion and has a first material which is the same as that of the base portion; and wherein the buffer layer contacts side surfaces of the plurality of protrusions and a surface of the base portion.
    Type: Grant
    Filed: June 23, 2022
    Date of Patent: April 16, 2024
    Assignee: EPISTAR CORPORATION
    Inventors: Peng Ren Chen, Yu-Shan Chiu, Wen-Hsiang Lin, Shih-Wei Wang, Chen Ou
  • Patent number: 11957722
    Abstract: The present invention discloses an anti-aging composition, which includes: (a) isolated lactic acid bacterial strains or a fermented product thereof; and (b) an excipient, a diluent, or a carrier; wherein the isolated lactic acid bacterial strains include: Bifidobacterium bifidum VDD088 strains, Bifidobacterium breve Bv-889 strains, and Bifidobacterium longum BLI-02 strains. The present invention further provides a method for preventing aging by administering the foregoing anti-aging composition to a subject in need thereof.
    Type: Grant
    Filed: March 7, 2022
    Date of Patent: April 16, 2024
    Assignee: GLAC BIOTECH CO., LTD
    Inventors: Hsieh-Hsun Ho, Yi-Wei Kuo, Wen-Yang Lin, Jia-Hung Lin, Yen-Yu Huang, Chi-Huei Lin, Shin-Yu Tsai
  • Patent number: 11958929
    Abstract: An organometallic complex, a catalyst composition employing the same, and a method for preparing polyolefin are provided. The organometallic compound has a structure represented by Formula (I) wherein M is Ti, Zr, or Hf; X is —O—, or —NR6—; R1 and R2 are independently hydrogen, C1-6 alkyl group, C6-12 aryl group, or R1 and R2 are combined with the carbon atoms, to which they are attached, to form an C6-12 aryl moiety; R3, R4 and R5 are independently fluoride, chloride, bromide, C1-6 alkyl group, C6-12 aryl group, C3-6 hetero aryl group, C7-13 aryl alkyl group or C7-12 alkyl aryl group; and R6 is hydrogen, C6-12 aryl group or C7-12 alkyl aryl group.
    Type: Grant
    Filed: June 24, 2022
    Date of Patent: April 16, 2024
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chien-Wei Hsu, Jyun-Wei Hong, Pao Tsern Lin, Shu-Hua Chan
  • Patent number: 11961325
    Abstract: An image processing method and apparatus, a computer-readable medium, and an electronic device are provided. The image processing method includes: respectively projecting, according to a plurality of view angle parameters corresponding to a plurality of view angles, a face model of a target object onto a plurality of face images of the target object acquired from the plurality of view angles, to determine correspondences between regions on the face model and regions on the face image; respectively extracting, based on the correspondences and a target region in the face model that need to generate a texture image, images corresponding to the target region from the plurality of face images; and fusing the images that correspond to the target region and that are respectively extracted from the plurality of face images, to generate the texture image.
    Type: Grant
    Filed: February 24, 2021
    Date of Patent: April 16, 2024
    Assignee: TENCENT TECHNOLOGY (SHENZHEN) COMPANY LIMITED
    Inventors: Xiangkai Lin, Linchao Bao, Yonggen Ling, Yibing Song, Wei Liu
  • Patent number: D1023007
    Type: Grant
    Filed: June 22, 2021
    Date of Patent: April 16, 2024
    Assignee: CHENBRO MICOM CO., LTD.
    Inventor: Chiung-Wei Lin