Patents by Inventor Wei Cao

Wei Cao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260341370
    Abstract: A memory apparatus includes memory cells connected to word lines and disposed in memory holes. The memory holes each define a channel and are connected to bit lines and to a source line. The memory cells are configured to retain a threshold voltage corresponding to data states. A control means is configured to read the memory cells connected to ones of the word lines in a read operation. The control means is also configured to simultaneously ramp a bit line voltage applied to the bit lines connected to the memory holes of the memory cells being read and a source voltage applied to the source line connected to the memory holes of the memory cells being read to a common voltage in a first time period and completely cut off a current through the channel of the memory holes in a second time period of the read operation immediately thereafter.
    Type: Application
    Filed: April 29, 2025
    Publication date: October 29, 2026
    Inventors: Wei Cao, Jiacen Guo, Xiang Yang
  • Patent number: 12772086
    Abstract: A wireless communication method for use in a wireless terminal is disclosed. The method comprises receiving, from a wireless network node, assistance information associated with a serving cell of the wireless terminal, and disabling at least one measurement based on the assistance information.
    Type: Grant
    Filed: March 24, 2023
    Date of Patent: October 20, 2026
    Assignee: ZTE Corporation
    Inventors: Wei Cao, Nan Zhang, Jianwu Dou, Chenchen Zhang, Jianqiang Dai
  • Patent number: 12763156
    Abstract: A memory system has been described that uses the same word line voltage for verifying and reading multiple (or all) data states such that both program-verify and read operations comprise sensing for different current levels in response to the same word line voltage.
    Type: Grant
    Filed: March 11, 2024
    Date of Patent: October 13, 2026
    Assignee: Sandisk Technologies, Inc.
    Inventors: Wei Cao, Muhammad Masuduzzaman, Xiang Yang
  • Patent number: 12764960
    Abstract: A semiconductor device includes an alternating stack of insulating layers and electrically conductive layers, a memory opening vertically extending through the alternating stack, a memory opening fill structure located in the memory opening and including a memory film, a vertical semiconductor channel that is laterally surrounded by the memory film, a drain region contacting a first end portion of the vertical semiconductor channel, a dielectric core surrounded by the vertical semiconductor channel, and a core-bias electrode surrounded by the dielectric core. A source layer contacts a second end portion of the vertical semiconductor channel and an end portion of the core-bias electrode.
    Type: Grant
    Filed: May 10, 2024
    Date of Patent: October 13, 2026
    Assignee: Sandisk Technologies, Inc.
    Inventors: Wei Cao, Zhixin Cui, Koichi Matsuno, Xiang Yang, Masaaki Higashitani
  • Publication number: 20260309321
    Abstract: The present disclosure provides an LED device and an LED light fixture. The LED device includes at least one LED component; a housing arranged on a back side of the at least one LED component; a heatsink arranged in the housing and on the back side of the at least one LED component; a cooling assembly arranged in the housing and including an air channel and an air entraining component arranged in the air channel; and an exhaust assembly including an exhaust chamber and at least one exhaust port. The exhaust chamber of one LED device is capable of being communicated with the exhaust chamber of adjacent LED device, such that hot air discharged from the exhaust chamber of one LED device can be discharged to the outside through the exhaust chamber of adjacent LED device without flowing through the heatsink in the air channel of adjacent LED device.
    Type: Application
    Filed: April 3, 2026
    Publication date: October 8, 2026
    Inventor: Wei Cao
  • Publication number: 20260301824
    Abstract: A sequential data batch is divided into multiple parts and written to multiple memory blocks. Then, read occurs in a series of read operations across the different memory blocks. These read operations occur in a specific order that involves switching which memory block is the selected memory block so that, following each read operation, the word lines in a previously selected memory block can settle at a first voltage prior to the next read operation in that memory block. This allows the sequential data batch to be read in a reduced amount of time as compared to other known approaches.
    Type: Application
    Filed: March 26, 2025
    Publication date: October 1, 2026
    Inventors: Wei Cao, Gwang Yeong Stanley Jeong, Xiang Yang
  • Publication number: 20260298785
    Abstract: A temperature control device for a triaxial loading experiment and a method thereof, and a triaxial loading experiment device are provided, which relate to the technical field of triaxial loading experiments. The temperature control device for the triaxial loading experiment includes a gas processing and conveying device and a control module. The gas processing and conveying device is configured to heat a gas medium and input the processed gas medium into an experimental cavity. The control module is communicated with the gas processing and conveying device, controls the gas processing and conveying device to continuously input the gas medium for temperature adjustment into the experimental cavity, adjusts the temperature of the gas medium to allow a target area in the experimental cavity to reach thermal balance.
    Type: Application
    Filed: May 25, 2025
    Publication date: October 1, 2026
    Inventors: Hongwei ZHAO, Ruitao MA, Jingchun MA, Shuangwei MA, Shizhong ZHANG, Hang ZHU, Changyi LIU, Peng LIU, Futao HE, Jiucheng ZHAO, Wei LIAO, Minghao RONG, Wei CAO, Zelin LU, Panxue ZHAO
  • Publication number: 20260299809
    Abstract: The techniques include alternating between sequential programming pulses to all of the SGDs being refreshed and sequential verify operations to the same SGDs. In other words, a program loop includes first sequentially applying programming pulses to all of the SGDs being refreshed and then, only after the programming pulses are completed, sequentially conducting verify operations on the SGDs being refreshed. Preferably, the SGDs are sequentially verified in the same order that they received the programming pulses. This improves refresh performance and also results in a tighter threshold voltage Vt distribution curve among the memory cells of the SGDs, thereby enhancing the memory device's performance and reliability during other memory operations.
    Type: Application
    Filed: March 26, 2025
    Publication date: October 1, 2026
    Inventors: Wei Cao, Shubham Awate, Yanwei He
  • Publication number: 20260299817
    Abstract: The reading techniques improve read performance by reducing the time between sequential read operations. As discussed in further detail below, according to these techniques, the performance is improved by simultaneously ramping the voltages applied to a selected word line and a next selected word line and/or the voltages applied to a selected SGD and a next selected SGD between read operations. By doing so, the time between read operations is reduced in comparison to other known read techniques. Thus, more read operations can be performed in a reduced amount of time.
    Type: Application
    Filed: March 26, 2025
    Publication date: October 1, 2026
    Inventors: Wei Cao, Gwang Yeong Stanley Jeong, Xiang Yang
  • Publication number: 20260305502
    Abstract: A memory device includes an alternating stack of insulating layers and electrically conductive layers arranged along a vertical direction, a memory opening vertically extending through the alternating stack, and a memory opening fill structure located in the memory opening and including a vertical semiconductor channel and a memory film surrounding the vertical semiconductor channel. The memory film includes a blocking dielectric film, a tunneling dielectric liner and a charge storage layer located between the blocking dielectric film and the tunneling dielectric liner. The blocking dielectric film includes an inner silicon oxide blocking dielectric layer and an outer metal oxide blocking dielectric layer having a lower atomic density of oxygen atoms than the inner silicon oxide blocking dielectric layer.
    Type: Application
    Filed: June 8, 2026
    Publication date: October 1, 2026
    Inventors: Wei CAO, Xiaolong HU, Xiang YANG, Takashi YUDA
  • Patent number: 12744647
    Abstract: The present disclosure is directed to TCI configuration, including receiving, by a network node, one or more Transmission Configuration Indicator (TCI) states for one or more links, the one or more links including at least one of a first forwarding link from the network node to a wireless communication device, or a second forwarding link from the wireless communication device to the network node, where the one or more TCI states each correspond to a corresponding one of a plurality of forwarding beams for the first forwarding link or the second forwarding link.
    Type: Grant
    Filed: March 26, 2024
    Date of Patent: September 22, 2026
    Assignee: ZTE Corporation
    Inventors: Shuang Zheng, Nan Zhang, Wei Cao, Ziyang Li
  • Publication number: 20260279476
    Abstract: A non-volatile storage apparatus and method to increase a number of erase-program cycles before bits in non-volatile memory cells become unerasable is provided. The apparatus and method include tracking an erase metric that indicates when the non-volatile memory cells are likely to become unerasable or are unerasable and shifting a source voltage during erase verify to cause a voltage level for which the memory cells are indicated as erased higher such that memory cells that be found unusable without the source voltage shift are usable.
    Type: Application
    Filed: March 17, 2025
    Publication date: September 17, 2026
    Applicant: Sandisk Technologies, Inc.
    Inventors: Wei CAO, Sisi YANG, Xiang YANG
  • Publication number: 20260274117
    Abstract: The present disclosure relates to A rotating device, comprising: a fixed disc; a movable disc rotatably provided on the fixed disc via rolling elements; a driving device configured to drive the movable disc to rotate relative to the fixed disc; wherein the driving device drives the movable disc to rotate relative to the fixed disc via a gear pair; characterized in that the rotating device further comprises: at least one restraining mechanism configured to restrict rotation of the movable disc, wherein when the driving device drives the movable disc to stop at any position, the restraining mechanism restricts rotation of the movable disc, causing the driving device to stall, so as to eliminate the gap between adjacent teeth in the gear pair. The present disclosure also relates to a seat comprising the aforementioned rotating device. The present disclosure eliminates the gap between adjacent teeth in the gear pair by causing the driving device to stall.
    Type: Application
    Filed: October 29, 2024
    Publication date: September 17, 2026
    Inventors: Baoshi Liu, Wei Cao, Kai Zhang, Youtao Qian, Fangfang Chen
  • Patent number: 12734237
    Abstract: The present invention relates to a formulation comprising an anti-IL-23p19 antibody, and in particular to a pharmaceutical formulation comprising an anti-IL-23p19 antibody, a buffer, a stabilizer and a surfactant. Furthermore, the present invention further relates to therapeutic or prophylactic use of these formulations.
    Type: Grant
    Filed: May 12, 2021
    Date of Patent: September 15, 2026
    Assignee: INNOVENT BIOLOGICS (SUZHOU) CO., LTD.
    Inventors: Wei Cao, Liqiang Ma, Yinjue Wang, Kaisong Zhou
  • Patent number: 12737135
    Abstract: A memory apparatus and method of operation are provided. The apparatus includes memory cells each connected to one of a plurality of word lines and disposed in memory holes. The memory cells are configured to retain a threshold voltage corresponding to one of a plurality of data states. A control means is coupled to the plurality of word lines and the memory holes and is configured to identify at least one grouping of the memory cells to be programmed with a multi-pass programming operation. The control means is also configured to program the at least one grouping of the memory cells using the multi-pass programming operation. The control means is additionally configured to program the memory cells other than the at least one grouping of the memory cells in a full sequence programming operation.
    Type: Grant
    Filed: July 20, 2023
    Date of Patent: September 15, 2026
    Assignee: Sandisk Technologies, Inc.
    Inventors: Wei Cao, Xiang Yang
  • Patent number: 12735482
    Abstract: A humanized CD 19 antibody, and a chimeric antigen receptor thereof, an immune cell thereof and the use thereof are provided. The humanized CD19 antibody is based on a FMC63 chimeric antibody, which is subjected to humanization modification. A CAR-T and a dual CAR-T cell constructed based on the humanized antibody and the related use thereof are also provided. Compared with a CAR-T cell constructed by using FMC63, the CAR-T cell constructed based on the humanized antibody has higher killing effect and tumor removal ability.
    Type: Grant
    Filed: May 6, 2021
    Date of Patent: September 15, 2026
    Assignee: GRACELL BIOSCIENCE (SHANGHAI) CO., LTD.
    Inventors: Hua Zhang, Lianjun Shen, Huan Shi, Wei Cao, Wenjie Yin
  • Patent number: 12731650
    Abstract: The memory device includes a memory block that has an array of memory cells that are arranged in a plurality of word lines. The memory device also has control circuitry that is configured to program the memory cells of a selected word line in at least one program loop. The at least one program loop includes a programming pulse and a verify operation. During the verify operation, the control circuitry is configured to apply a read pass voltage to a plurality of unselected word lines of the plurality of word lines. The read pass voltage is negative to make the memory cells of the unselected word lines conductive to holes.
    Type: Grant
    Filed: June 7, 2024
    Date of Patent: September 8, 2026
    Assignee: Sandisk Technologies, Inc.
    Inventors: Wei Cao, Jiahui Yuan, Xiang Yang
  • Patent number: 12732936
    Abstract: Systems, apparatus and methods for wireless communication are described, and more specifically, to techniques related to managing preconfigured resources. One example method for wireless communication includes determining, by a wireless device configured to communicate with a network device using preconfigured transmission resources, a timing adjustment value for communication with the network device using a mode in which the timing adjustment value is determined at least partly based on autonomous estimation by the wireless device and causing the wireless device to perform a transmission using the timing adjustment value.
    Type: Grant
    Filed: July 10, 2023
    Date of Patent: September 8, 2026
    Assignee: ZTE Corporation
    Inventors: Fangyu Cui, Nan Zhang, Jianqiang Dai, Wei Cao
  • Patent number: 12726295
    Abstract: Presented are systems and methods for coverage enhancement in non-terrestrial networks (NTN). A wireless communication device may determine a set of one or more resources to use for indicating information for physical uplink control channel (PUCCH) repetition of msg4 hybrid automatic repeat request acknowledgement (HARQ-ACK) transmission. The wireless communication device may send a msg1 transmission using the set of one or more resources, to indicate the information for the PUCCH repetition, to a wireless communication node.
    Type: Grant
    Filed: March 22, 2024
    Date of Patent: September 1, 2026
    Assignee: ZTE Corporation
    Inventors: Fangyu Cui, Nan Zhang, Wei Cao, Junli Li
  • Publication number: 20260253641
    Abstract: To increase endurance of non-volatile semiconductor memory, it is proposed to program N bits of data across M non-volatile memory cells, where M>N, with an encoding scheme that allows for programming M non-volatile memory cells multiple times without performing an intervening erase process.
    Type: Application
    Filed: February 24, 2025
    Publication date: August 27, 2026
    Applicant: Sandisk Technologies, Inc.
    Inventors: Xiang YANG, Youtian ZHANG, Cyril GUYOT, Robert Eugeniu MATEESCU, Wei CAO