Abstract: A display panel including a circuit board, a plurality of bonding pads, a plurality of light emitting devices, and a plurality of solder patterns is provided. The bonding pads are disposed on the circuit board, and each includes a first metal layer and a second metal layer. The second metal layer is located between the first metal layer and the circuit board. The first metal layer includes an opening overlapping the second metal layer. A material of the first metal layer is different from a material of the second metal layer. The light emitting devices are electrically bonded to the bonding pads. Each of the solder patterns electrically connects one of the light emitting devices and one of the bonding pads. The solder patterns each contact the second metal layer through the opening of the first metal layer of one of the bonding pads to form a eutectic bonding.

Abstract: A first driver circuit is configured to cooperate with a second driver circuit to control a display panel, wherein the first driver circuit is configured to output display data to a first area of the display panel and the second driver circuit is configured to output display data to a second area of the display panel. A method used for the first driver circuit includes outputting at least one emission control signal to control the second area of the display panel when the second driver circuit is disabled.

Abstract: A ferroelectric memory device and a semiconductor die are provided. The ferroelectric memory device includes a gate electrode; a channel layer, overlapped with the gate electrode; source/drain contacts, in contact with separate ends of the channel layer; a ferroelectric layer, lying between the gate electrode and the channel layer; and a first insertion layer, extending in between the ferroelectric layer and the channel layer, and comprising a metal carbonitride or a metal nitride.

Abstract: A semiconductor device comprises a first semiconductor structure, a second semiconductor structure located on the first semiconductor structure, and an active layer located between the first semiconductor structure and the second semiconductor structure. The first semiconductor structure has a first conductivity type, and includes a plurality of first layers and a plurality of second layers alternately stacked. The second semiconductor structure has a second conductivity type opposite to the first conductivity type. The plurality of first layers and the plurality of second layers include indium and phosphorus, and the plurality of first layers and the plurality of second layers respectively have a first indium atomic percentage and a second indium atomic percentage. The second indium atomic percentage is different from the first indium atomic percentage.

Abstract: A method includes forming a gate stack, which includes a gate dielectric and a metal gate electrode over the gate dielectric. An inter-layer dielectric is formed on opposite sides of the gate stack. The gate stack and the inter-layer dielectric are planarized. The method further includes forming an inhibitor film on the gate stack, with at least a portion of the inter-layer dielectric exposed, selectively depositing a dielectric hard mask on the inter-layer dielectric, with the inhibitor film preventing the dielectric hard mask from being formed thereon, and etching to remove a portion of the gate stack, with the dielectric hard mask acting as a portion of a corresponding etching mask.

Abstract: A power supply system includes an output terminal, a power supply control chip, a power supply switch and a detection device. The power supply control chip is configured to adjust the amount of an input power providing to an electronic device by the power supply device. The power supply switch is configured to control the connection between the power supply device and the power supply control chip. The detection device is configured to detect whether the power supply control chip operates normally. When the power supply control chip operates abnormally, the detection device controls the connection between the power supply device and the power supply control chip through the power supply switch for restarting the power supply control chip. The power supply control chip, the power supply switch and the detection device are disposed in an enclosed space.

Abstract: A centrifugal heat dissipation fan including a housing and an impeller disposed in the housing on an axis is provided. The housing has at least one inlet on the axis and has a plurality of outlets in different radial directions. A heat dissipation system of an electronic device is also provided.

Abstract: An OLED touch and display driver integration chip is provided, including: a group of display driving pads for providing display driving signals to the OLED touch display panel; a group of touch pads for providing touch driving signals to touch electrodes on the OLED touch display panel and/or receiving touch sensing signals from the touch electrodes, and adjacently arranged with the group of display driving pads; and at least one isolation pad arranged between the group of display driving pads and the group of touch pads.

Abstract: A portable medical device includes a portable medical bag, a plurality of connectors and a processor. These connectors respectively connect the portable medical bag and every medical device contained inside the portable medical bag. The portable medical bag obtains the device management information of each the medical device through these connectors. The device management information includes the remaining power of medical device. The processor calculates the charge strategy information of the corresponding medical device according to the medical device information, address information and device management information. In addition, a management method for portable medical device is also provided.

Abstract: A first driver circuit is configured to cooperate with a second driver circuit to control a display panel, wherein the first driver circuit is configured to output display data to a first area of the display panel and the second driver circuit is configured to output display data to a second area of the display panel. A method used for the first driver circuit includes outputting at least one emission control signal to control the second area of the display panel when the second driver circuit is disabled.

Abstract: An OLED touch and display driver integration chip is provided, including: a group of display driving pads for providing display driving signals to the OLED touch display panel; a group of touch pads for providing touch driving signals to touch electrodes on the OLED touch display panel and/or receiving touch sensing signals from the touch electrodes, and adjacently arranged with the group of display driving pads; and at least one isolation pad arranged between the group of display driving pads and the group of touch pads.

Abstract: A power supply system includes an output terminal, a power supply control chip, a power supply switch and a detection device. The power supply control chip is configured to adjust the amount of an input power providing to an electronic device by the power supply device. The power supply switch is configured to control the connection between the power supply device and the power supply control chip. The detection device is configured to detect whether the power supply control chip operates normally. When the power supply control chip operates abnormally, the detection device controls the connection between the power supply device and the power supply control chip through the power supply switch for restarting the power supply control chip. The power supply control chip, the power supply switch and the detection device are disposed in an enclosed space.

Abstract: An OLED touch and display driver integration chip is provided, including: at least one group of display driving pads for providing display driving signals to the OLED touch display panel; at least one group of touch pads for providing touch driving signals to touch electrodes on the OLED touch display panel, and alternately arranged in groups with the at least one group of display driving pads; at least one group of isolation pads, each group of isolation pads includes at least one isolation pad and is arranged between a group of display driving pads and a group of touch pads that are adjacent, an isolation pad is configured to apply a specific signal to isolate signal interference between adjacent groups of display driving pads and touch pads, or configured to apply a specific signal or be in a floating state, to reduce load of data lines or the touch electrodes.

Abstract: A method for brewing a beverage, a water concentrate for brewing the beverage and the beverage thereof are provided, wherein the water concentrate includes a hardness between 10,000 ppm and 100,000 ppm, a calcium ion concentration between 300 ppm and 10,000 ppm, a magnesium ion concentration between 200 ppm and 20,000 ppm, a sodium ion concentration between 30 ppm and 1,000 ppm, a potassium ion concentration between 30 ppm and 1,000 ppm, a bicarbonate ion between 10 ppm and 300 ppm, and a pH between 6 and 9. By controlling the hardness and mineral composition of the water concentrate, the invention increases the affinity to amino acids, flavonoid compounds, polyphenolic compounds, terpenoid compounds, alkaloids, and organic acids in coffee or tea beverages, and adds the content of substances which are helpful to the human body in addition to improving the taste and flavor of the beverages.

Abstract: An OLED touch and display driver integration chip is provided, including: at least one group of display driving pads for providing display driving signals to the OLED touch display panel; at least one group of touch pads for providing touch driving signals to touch electrodes on the OLED touch display panel, and alternately arranged in groups with the at least one group of display driving pads; at least one group of isolation pads, each group of isolation pads includes at least one isolation pad and is arranged between a group of display driving pads and a group of touch pads that are adjacent, an isolation pad is configured to apply a specific signal to isolate signal interference between adjacent groups of display driving pads and touch pads, or configured to apply a specific signal or be in a floating state, to reduce load of data lines or the touch electrodes.

Abstract: A method for brewing a beverage, a water concentrate for brewing the beverage and the beverage thereof are provided, wherein the water concentrate comprises a hardness between 10,000 ppm and 100,000 ppm, a calcium ion concentration between 300 ppm and 10,000 ppm, a magnesium ion concentration between 200 ppm and 20,000 ppm, a sodium ion concentration between 30 ppm and 1,000 ppm, a potassium ion concentration between 30 ppm and 1,000 ppm, a bicarbonate ion between 10 ppm and 300 ppm, and a pH between 6 and 9. By controlling the hardness and mineral composition of the water concentrate, the invention increases the affinity to amino acids, flavonoid compounds, polyphenolic compounds, terpenoid compounds, alkaloids, and organic acids in coffee or tea beverages, and adds the content of substances which are helpful to the human body in addition to improving the taste and flavor of the beverages.

Abstract: A composite water purification apparatus and method thereof are provided. The composite water purification apparatus includes a container, a sacrificial anode, a photocatalyst anode and a cathode. The container is employed for receiving liquid including water and gas. The photocatalyst anode includes a photocatalyst for conducting a photocatalytic reaction. The cathode is electrolyzed with the sacrificial anode and the photocatalyst anode. The cathode, the sacrificial anode, and the photocatalyst anode are immersed in the container to contact the liquid. The present invention enhances the purity of the water, while prolonging the service life of the sacrificial anode.

Abstract: A double gate trench power transistor and manufacturing method thereof are provided. The double gate trench power transistor gate structure includes an epitaxial layer, a trench structure formed in the epitaxial layer, at least two gate structures, and a shielding electrode structure. The trench structure includes a deep trench portion and two shallow trench portions respectively adjacent to two opposite sides of the deep trench portion. Each of the gate structures formed in each of the shallow trench portions includes a gate insulating layer and a gate electrode. The gate insulating layer has a first dielectric layer, a second dielectric layer and a third dielectric layer. The second dielectric layer is interposed between the first and third dielectric layers. Additionally, a portion of the gate insulating layer is in contact with a shielding dielectric layer of the shielding electrode structure.

Abstract: A trench power semiconductor device is provided. A trench gate structure of the trench power semiconductor device located in a cell trench of an epitaxial layer includes a first dielectric layer, a second dielectric layer, a gate electrode, a third dielectric layer, and a shielding layer. The second dielectric layer is interposed between the first and third dielectric layers, and the second dielectric layer is made from different material than the first dielectric layer. After performing a selective etching step on the second dielectric layer, a recess can be formed among the first, second and third dielectric layers. The gate electrode includes a conductive layer formed in the recess region, and the shielding electrode is surrounded by the third dielectric layer and insulated from the conductive layer.

Abstract: A trench power semiconductor device is provided. A trench gate structure of the trench power semiconductor device located in a cell trench of an epitaxial layer includes a first dielectric layer, a second dielectric layer, a gate electrode, a third dielectric layer, and a shielding layer. The second dielectric layer is interposed between the first and third dielectric layers, and the second dielectric layer is made from different material than the first dielectric layer. After performing a selective etching step on the second dielectric layer, a recess can be formed among the first, second and third dielectric layers. The gate electrode includes a conductive layer formed in the recess region, and the shielding electrode is surrounded by the third dielectric layer and insulated from the conductive layer.