Patents by Inventor Wei Fu

Wei Fu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200403622
    Abstract: A phase-locked loop (PLL) includes a phase-frequency detector (PFD) having a first PFD input, a second PFD input, and a PFD output. The PFD is configured to generate a first signal on the PFD output. The first signal comprises pulses having pulse widths indicative of a phase difference between signals on the first and second PFD inputs. A low pass filter (LPF) has an LPF input and an LPF output. The LPF input is coupled to the PFD output. A flip-flop has a clock input and a flip-flop output. The clock input is coupled to the LPF output. A lock-slip control circuit is coupled to the flip-flop output and to the first PFD input. The lock-slip control circuit is configured to determine phase-lock and phase-slip based at least in part on a signal on the flip-flop output.
    Type: Application
    Filed: December 4, 2019
    Publication date: December 24, 2020
    Inventors: Shailesh Ganapat GHOTGALKAR, Wei FU, Venkatseema DAS, Jiankun HU
  • Publication number: 20200358446
    Abstract: In described examples, a first clock generator generates an output clock signal in response to an input reference signal and in response to a feedback signal that is generated in response to the output clock signal. A code generator generates a code in response to the input reference signal. A loss detector generates an indication of a loss of the input reference signal in response to the feedback signal and at least two codes generated by the code generator.
    Type: Application
    Filed: July 28, 2020
    Publication date: November 12, 2020
    Inventors: Shailesh Ganapat Ghotgalkar, Wei Fu, Venkatseema Das
  • Patent number: 10826320
    Abstract: A solar power system may comprise a solar panel set, a controller, a lithium battery set, and at least a DC load. The controller has a control unit built therein to control a double-contact relay, a single-contact relay, and a transformer. The rated voltage of the solar panel set is higher than the rated voltage of the lithium battery set between 115% and 130%. When the actual voltage of the solar panel set is lower than 115% of the rated voltage of the lithium battery set, the solar panel set is configured to low-loss charge the lithium battery set under the low illumination condition. When the actual voltage of the solar panel set is higher than 115% of the rated voltage of the lithium battery set, the solar panel set under the high illumination condition is adapted to have voltage-drop through the transformer and high-efficiently charge the lithium battery set.
    Type: Grant
    Filed: February 11, 2019
    Date of Patent: November 3, 2020
    Inventors: Austin Lai, Kai-Yang Cheng, Wei-Fu Hsu, Kuan-Ching Lee, Hui-Ping Yang
  • Patent number: 10809565
    Abstract: A backlight module includes: light sources; a light guide plate disposed at a side of the light sources, the light guide plate including a second light guide portion disposed adjacent to the light sources and a first light guide portion disposed on a side of the second light portion away from the light sources, a thickness of the second light guide portion being greater than a thickness of the first light guide portion; and a back plate including a first back plate portion disposed at a side of the light sources away from the light guide plate and a second back plate portion disposed at a side of the light guide plate which is opposite to a light exit side of the light guide plate.
    Type: Grant
    Filed: August 2, 2018
    Date of Patent: October 20, 2020
    Assignees: Chongqing BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Sen Tan, Sijun Lei, Liang Gao, Yansheng Sun, Hebing Ma, Wei Fu, Wencheng Luo, Qihai Du, Yuxu Geng, Qiangsheng Han, Song Liu
  • Patent number: 10784875
    Abstract: A circuit includes a first filter, a plurality of binary-weighted capacitors, and a current source device. The circuit also includes a first plurality of switches. Each of the first plurality of switches is connected to a separate capacitor of the plurality of binary-weighted capacitors. The first plurality of switches are connected together, and the first plurality of switches are not connected to the first filter. A second plurality of switches is also included, and each of the second plurality of switches is connected to a separate capacitor of the plurality of binary-weighted capacitors and to the first filter and to a control input of the current source device. The first plurality of switches are not connected to the control input.
    Type: Grant
    Filed: December 23, 2018
    Date of Patent: September 22, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Krishnaswamy Nagaraj, Wei Fu
  • Patent number: 10770396
    Abstract: A semiconductor structure includes a substrate, an epitaxial layer disposed on the substrate, a conductive feature disposed in the epitaxial layer having a protruding portion that is higher than the epitaxial layer, and a diffusion barrier layer disposed on sidewalls of the conductive feature.
    Type: Grant
    Filed: December 28, 2018
    Date of Patent: September 8, 2020
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Fang-Ming Lee, Sheng-Wei Fu, Chung-Yeh Lee
  • Publication number: 20200259362
    Abstract: A solar power system may comprise a solar panel set, a controller, a lithium battery set, and at least a DC load. The controller has a control unit built therein to control a double-contact relay, a single-contact relay, and a transformer. The rated voltage of the solar panel set is higher than the rated voltage of the lithium battery set between 115% and 130%. When the actual voltage of the solar panel set is lower than 115% of the rated voltage of the lithium battery set, the solar panel set is configured to low-loss charge the lithium battery set under the low illumination condition. When the actual voltage of the solar panel set is higher than 115% of the rated voltage of the lithium battery set, the solar panel set under the high illumination condition is adapted to have voltage-drop through the transformer and high-efficiently charge the lithium battery set.
    Type: Application
    Filed: February 11, 2019
    Publication date: August 13, 2020
    Applicant: AVERTRONICS INC.
    Inventors: Austin Lai, Kai-Yang Cheng, Wei-Fu Hsu, Kuan-Ching Lee, Hui-Ping Yang
  • Patent number: 10727841
    Abstract: In described examples, a first clock generator generates an output clock signal in response to an input reference signal and in response to a feedback signal that is generated in response to the output clock signal. A code generator generates a code in response to the input reference signal. A loss detector generates an indication of a loss of the input reference signal in response to the feedback signal and at least two codes generated by the code generator.
    Type: Grant
    Filed: October 22, 2018
    Date of Patent: July 28, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Shailesh Ganapat Ghotgalkar, Wei Fu, Venkatseema Das
  • Publication number: 20200211964
    Abstract: A semiconductor structure includes a substrate, an epitaxial layer disposed on the substrate, a conductive feature disposed in the epitaxial layer having a protruding portion that is higher than the epitaxial layer, and a diffusion barrier layer disposed on sidewalls of the conductive feature.
    Type: Application
    Filed: December 28, 2018
    Publication date: July 2, 2020
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Fang-Ming LEE, Sheng-Wei FU, Chung-Yeh LEE
  • Publication number: 20200204183
    Abstract: A circuit includes a first filter, a plurality of binary-weighted capacitors, and a current source device. The circuit also includes a first plurality of switches. Each of the first plurality of switches is connected to a separate capacitor of the plurality of binary-weighted capacitors. The first plurality of switches are connected together, and the first plurality of switches are not connected to the first filter. A second plurality of switches is also included, and each of the second plurality of switches is connected to a separate capacitor of the plurality of binary-weighted capacitors and to the first filter and to a control input of the current source device. The first plurality of switches are not connected to the control input.
    Type: Application
    Filed: December 23, 2018
    Publication date: June 25, 2020
    Inventors: Krishnaswamy NAGARAJ, Wei FU
  • Publication number: 20200194564
    Abstract: A semiconductor device and methods for forming the same are provided. The method includes providing a substrate having a first conductive type, forming an epitaxial layer having the first conductive type on the substrate, forming a trench in the epitaxial layer, forming a first insulating layer in the trench and on the top surface of the epitaxial layer, forming a shield electrode and a mask layer on the first insulating layer in order, using the mask layer to remove a portion of the first insulating layer, wherein the top surface of the first insulating layer is higher than the top surface of the shield electrode after removing the portion of the first insulating layer, removing the mask layer, forming a second insulating layer on the first insulating layer and the shield electrode, and forming a gate electrode on the second insulating layer.
    Type: Application
    Filed: February 25, 2020
    Publication date: June 18, 2020
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Tsung-Yeh CHEN, Sheng-Wei FU, Chung-Yeh LEE
  • Patent number: 10666186
    Abstract: A movable solar power apparatus may comprise at least a solar panel set electrically connected to a maximum power point tracking system (MPPT). A lithium battery set is electrically connected to a battery management system (BMS) which is adapted to monitor and protect the lithium battery set, and the BMS is electrically connected to the MPPT to enable power generated by the solar panel set to directly charge the lithium battery set. A low potential wake-up circuit has a double-contact relay and a single-contact relay, and the double-contact relay comprises a main contact, a first contact, and a second contact. The main contact is switchably electrically connected to the first contact or the second contact, and the main contact is electrically connected to the BMS while the first contact is electrically connected to the master control circuit, and the MPPT is electrically connected to the BMS under normal condition.
    Type: Grant
    Filed: June 25, 2018
    Date of Patent: May 26, 2020
    Assignee: AVERTRONICS INC.
    Inventors: Austin Lai, Kai-Yang Cheng, Wei-Fu Hsu
  • Publication number: 20200129362
    Abstract: The present invention relates to an assistive glove for daily activities of stroke patient which comprises a main body, a first pulling member, a second pulling member, and plural circular strings. The main body comprises a thumb sleeve, at least one finger sleeve a palm portion connected to the thumb sleeve and the at least one finger sleeve by one side and a wrist portion connected to another side of the palm portion. The first pulling member and the second pulling member are disposed on the palm portion and having a first hook and at least one second hook corresponding to the thumb sleeve and the at least one finger sleeve. The plural circular strings are hung on the first hook and the at least one second hook and fixed to the thumb sleeve and the at least one finger sleeve respectively.
    Type: Application
    Filed: December 13, 2018
    Publication date: April 30, 2020
    Inventors: YANG-KUN OU, YA-LIN CHEN, CHIEN-WEI FU, YI-HSUAN LIU, YING-NING TSENG, YOU-SHAN LI
  • Publication number: 20200127667
    Abstract: In described examples, a first clock generator generates an output clock signal in response to an input reference signal and in response to a feedback signal that is generated in response to the output clock signal. A code generator generates a code in response to the input reference signal. A loss detector generates an indication of a loss of the input reference signal in response to the feedback signal and at least two codes generated by the code generator.
    Type: Application
    Filed: October 22, 2018
    Publication date: April 23, 2020
    Inventors: Shailesh Ganapat Ghotgalkar, Wei Fu, Venkatseema Das
  • Patent number: 10626899
    Abstract: A clamping fixture includes a body, a connector, a first clasp, at least one first elastic member and a lock. The connector is movable relative to the body along a first direction. The first clasp includes a first fastener and is disposed at one end of the connector. The at least one first elastic member is configured to apply force to the body and the connector along the first direction. The lock includes a second fastener. The first clasp and the lock are coupled through the first fastener and the second fastener.
    Type: Grant
    Filed: October 11, 2018
    Date of Patent: April 21, 2020
    Assignee: ABILITY ENTERPRISE CO., LTD.
    Inventors: Hao-Chung Lien, Chia-Wei Fu, Hsien-Ming Lee
  • Patent number: 10615263
    Abstract: A semiconductor device and methods for forming the same are provided. The method includes providing a substrate having a first conductive type, forming an epitaxial layer having the first conductive type on the substrate, forming a trench in the epitaxial layer, forming a first insulating layer in the trench and on the top surface of the epitaxial layer, forming a shield electrode and a mask layer on the first insulating layer in order, using the mask layer to remove a portion of the first insulating layer, wherein the top surface of the first insulating layer is higher than the top surface of the shield electrode after removing the portion of the first insulating layer, removing the mask layer, forming a second insulating layer on the first insulating layer and the shield electrode, and forming a gate electrode on the second insulating layer.
    Type: Grant
    Filed: June 11, 2018
    Date of Patent: April 7, 2020
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Tsung-Yeh Chen, Sheng-Wei Fu, Chung-Yeh Lee
  • Publication number: 20200105461
    Abstract: The present disclosure discloses a transformer. The transformer includes a magnetic core, at least one winding assembly and at least one conductive plate assembly. The magnetic core includes a magnetic core pillar. The at least one winding assembly is disposed around the magnetic core pillar to receive an input power. The at least one conductive plate assembly is disposed around the magnetic core pillar and electromagnetic coupled with the winding assembly via the magnetic core. The conductive plate assembly includes at least two conductive plates. Each of the conductive plates includes a main body and a pin extending outwardly from the corresponding main body. The extension directions of the pins of the at least two conductive plates extending outwardly from the corresponding main bodies are different from each other. The pins are connected to different circuit boards. Each of the circuit boards includes at least one rectifier.
    Type: Application
    Filed: December 20, 2018
    Publication date: April 2, 2020
    Inventors: Ssu-Wei Fu, Hsin-Wei Tsai, Zengyi Lu
  • Patent number: 10600906
    Abstract: A method for forming a semiconductor device is provided. A plurality of trenches are formed in the substrate. An isolation oxide layer is formed in the trenches and on the substrate. A shield polysilicon is deposited in the trenches and on the isolation oxide layer on the substrate. A first etching process is performed to remove a first portion of the shield polysilicon. A first removal process is performed to remove a first portion of the isolation oxide layer. A second etching process is performed to remove a second portion of the shield polysilicon. A second removal process is performed to remove a second portion of the isolation oxide layer. An inter-poly oxide layer is formed on the remaining shield polysilicon and the remaining isolation oxide layer, wherein the inter-poly oxide layer has a concave top surface.
    Type: Grant
    Filed: November 7, 2019
    Date of Patent: March 24, 2020
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Chung-Yen Chien, Sheng-Wei Fu, Chung-Yeh Lee
  • Publication number: 20200073492
    Abstract: A touch apparatus including a control button and a touch panel is provided. The control button includes an insulating main body and a conductive member disposed on the insulating main body. The touch panel is disposed on a side of the control button, and the touch panel includes a cover plate and a touch-sensing element. The conductive member is located between the insulating main body and the cover plate. The cover plate is located between the control button and the touch-sensing element. The touch-sensing element is electrically insulated from the conductive member. The touch-sensing element includes a plurality of electrodes disposed corresponding to the control button. The conductive member moves along with the movement of the insulating main body, and the movement of the conductive member causes a capacitance change of at least one of the plurality of electrodes.
    Type: Application
    Filed: November 19, 2018
    Publication date: March 5, 2020
    Applicant: Chunghwa Picture Tubes, LTD.
    Inventors: Kun-Chi Chiu, Chun-Chung Wu, Chao-Wei Wei, Chi-Lun Wu, Wei-Fu Chang
  • Publication number: 20200075758
    Abstract: A method for forming a semiconductor device is provided. A plurality of trenches are formed in the substrate. An isolation oxide layer is formed in the trenches and on the substrate. A shield polysilicon is deposited in the trenches and on the isolation oxide layer on the substrate. A first etching process is performed to remove a first portion of the shield polysilicon. A first removal process is performed to remove a first portion of the isolation oxide layer. A second etching process is performed to remove a second portion of the shield polysilicon. A second removal process is performed to remove a second portion of the isolation oxide layer. An inter-poly oxide layer is formed on the remaining shield polysilicon and the remaining isolation oxide layer, wherein the inter-poly oxide layer has a concave top surface.
    Type: Application
    Filed: November 7, 2019
    Publication date: March 5, 2020
    Applicant: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Chung-Yen CHIEN, Sheng-Wei FU, Chung-Yeh LEE