Patents by Inventor Wei Hao

Wei Hao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240120200
    Abstract: Semiconductor device and the manufacturing method thereof are disclosed herein. An exemplary method of forming a semiconductor device comprises receiving a structure including a substrate and a first hard mask over the substrate, the first hard mask having at least two separate portions; forming spacers along sidewalls of the at least two portions of the first hard mask with a space between the spacers; forming a second hard mask in the space; forming a first cut in the at least two portions of the first hard mask; forming a second cut in the second hard mask; and depositing a cut hard mask in the first cut and the second cut.
    Type: Application
    Filed: December 18, 2023
    Publication date: April 11, 2024
    Inventors: Hsi-Wen Tien, Wei-Hao Liao, Pin-Ren Dai, Chih Wei Lu, Chung-Ju Lee
  • Publication number: 20240121785
    Abstract: Methods, apparatus, and systems that enable retransmissions and/or transmission of uplink feedback information using different carriers are disclosed. In one example aspect, a method for wireless communication includes receiving, by a terminal device, a signaling message from a base station. The signaling message includes a field indicting one or more resources for a set of frequency blocks from N sets of frequency blocks configured for a transmission from the terminal device to the base station. Each set of frequency blocks corresponds to a carrier or a bandwidth part, and N is a positive integer greater than 1. The method also includes performing the transmission using the one or more resources indicated in the signaling message.
    Type: Application
    Filed: October 19, 2023
    Publication date: April 11, 2024
    Inventors: Wei GOU, Peng HAO, Junfeng ZHANG, Shuaihua KOU
  • Publication number: 20240120272
    Abstract: Embodiments of the present disclosure relates to a method for forming a semiconductor device structure. The method includes including forming one or more conductive features in a first interlayer dielectric (ILD), forming an etch stop layer on the first ILD, forming a second ILD over the etch stop layer, forming one or more openings through the second ILD and the etch stop layer to expose a top surface of the one or more first conductive features, wherein the one or more openings are formed by a first etch process in a first process chamber, exposing the one or more openings to a second etch process in a second process chamber so that the shape of the or more openings is elongated, and filling the one or more openings with a conductive material.
    Type: Application
    Filed: January 15, 2023
    Publication date: April 11, 2024
    Inventors: Wei-Hao LIAO, Hsi-Wen TIEN, Chih Wei LU, Yung-Hsu WU, Cherng-Shiaw TSAI, Chia-Wei SU
  • Patent number: 11956167
    Abstract: Provided are a channel configuration method and terminal, a storage medium and an electronic device. The method includes: determining that multiple physical channels overlap in a time domain; and determining a physical channel for carrying information or data in the multiple physical channels, wherein the determined physical channel is a Physical Uplink Control Channel (PUCCH), and determining a physical channel comprises: among the multiple physical channels, processing a physical channel with earlier first symbol before a physical channel with later first symbol, and when two or more physical channels in the multiple physical channels have the same first symbol, processing a physical channel with a larger number of symbols before a physical channel with a smaller number of symbols.
    Type: Grant
    Filed: May 22, 2023
    Date of Patent: April 9, 2024
    Assignee: ZTE Corporation
    Inventors: Wei Gou, Peng Hao, Zhisong Zuo, Ting Fu
  • Patent number: 11956919
    Abstract: A cold plate is provided and includes: a housing disposed with a chamber; a base combined with the housing to form a working space separated from the chamber but connected with the chamber through an interconnecting structure to allow a working medium to flow within the chamber and the working space; a heat transfer structure disposed on the inner side of the base; and a pump disposed within the working space to drive the working medium in the working space. As such, the cold plate can provide better heat dissipation performance.
    Type: Grant
    Filed: December 23, 2020
    Date of Patent: April 9, 2024
    Assignee: AURAS TECHNOLOGY CO., LTD.
    Inventors: Chien-An Chen, Chien-Yu Chen, Tian-Li Ye, Jen-Hao Lin, Wei-Shen Lee
  • Patent number: 11951048
    Abstract: The present disclosure relates to an operating table, the operating table comprising a table top, a table top support and a column with a column head, wherein the sealing device is bellows assembled below the column head, or an adhesive in a hole and/or window on the holder of the cable, or a sealing gasket between the receiver and the column head, or a shield sealingly attached to the column head below the gear. The present disclosure further relates to control equipment, a lifting device, an intelligent charger, a column guide system for an operating table, as well as an operating table including the same.
    Type: Grant
    Filed: December 23, 2020
    Date of Patent: April 9, 2024
    Assignee: TRUMPF MEDIZIN SYSTEME GMBH + CO. KG
    Inventors: Kwang-un Clarence King, Qiang Hao, Hao Shi, Jian Wang, Debao Ma, Wei Ma, Jipeng Wang, Jian Yang, Boon Khai Ang, Min Htun Aye, Arnd Kuchenbecker, Falk Georgi
  • Patent number: 11953955
    Abstract: A fixing mechanism is applied to an interface card assembly and an electronic apparatus. The fixing mechanism includes a movable window and an operation component. The movable window is slidably disposed on a casing of the interface card assembly. The operation component has a fixed end and a free end opposite to each other. The fixed end is disposed on the movable window. The free end is detachably engaged with the casing to position the movable window. The movable window is positioned on one of a first region and a second region of the casing for respectively fixing interface cards with different sizes to the casing.
    Type: Grant
    Filed: November 9, 2021
    Date of Patent: April 9, 2024
    Assignee: Wiwynn Corporation
    Inventors: Wei-Li Huang, Wei-Hao Chen
  • Patent number: 11956927
    Abstract: A case is provided, including a shell, a fan frame, and a fan module. The shell is internally provided with a backplane and a motherboard, where the motherboard is connected to the backplane along a first axis, the backplane is connected with a plug connector, the plug connector includes a plug connector body and a plurality of connection terminals, and the connection terminals are located in the plug connector body. The fan frame bears the fan module, and the fan module includes a fan assembly and a matching connector. The matching connector is connected to the fan assembly, and the matching connector is connected to the plug connector along a second axis. The matching connector includes a matching connector body and a plurality of matching terminals, and the matching terminals are located in the matching connector body. The fan frame is fixed in the shell.
    Type: Grant
    Filed: April 8, 2021
    Date of Patent: April 9, 2024
    Assignee: WISTRON CORPORATION
    Inventors: Jen-Hsien Lo, Wei-Hao Chen, Sheng-Chieh Tsai
  • Patent number: 11955404
    Abstract: An electronic package includes an electronic component and a heat dissipation structure, wherein the heat dissipation structure has a plurality of bonding pillars, and a metal layer is formed on the bonding pillars, so as to stably dispose the heat dissipation structure on the electronic component via the bonding pillars and the metal layer.
    Type: Grant
    Filed: December 14, 2021
    Date of Patent: April 9, 2024
    Assignee: AURAS TECHNOLOGY CO., LTD.
    Inventors: Jian-Dih Jeng, Chien-Yu Chen, Wei-Hao Chen
  • Publication number: 20240113143
    Abstract: Various embodiments of the present disclosure are directed towards an imaging device including a first image sensor element and a second image sensor element respectively comprising a pixel unit disposed within a semiconductor substrate. The first image sensor element is adjacent to the second image sensor element. A first micro-lens overlies the first image sensor element and is laterally shifted from a center of the pixel unit of the first image sensor element by a first lens shift amount. A second micro-lens overlies the second image sensor element and is laterally shifted from a center of the pixel unit of the second image sensor element by a second lens shift amount different from the first lens shift amount.
    Type: Application
    Filed: January 6, 2023
    Publication date: April 4, 2024
    Inventors: Cheng Yu Huang, Wen-Hau Wu, Chun-Hao Chuang, Keng-Yu Chou, Wei-Chieh Chiang, Chih-Kung Chang
  • Publication number: 20240113034
    Abstract: A method for forming a semiconductor package is provided. The method includes forming a first alignment mark in a first substrate of a first wafer and forming a first bonding structure over the first substrate. The method also includes forming a second bonding structure over a second substrate of a second wafer and trimming the second substrate, so that a first width of the first substrate is greater than a second width of the second substrate. The method further includes attaching the second wafer to the first wafer via the first bonding structure and the second bonding structure, thinning the second wafer until a through-substrate via in the second substrate is exposed, and performing a photolithography process on the second wafer using the first alignment mark.
    Type: Application
    Filed: February 8, 2023
    Publication date: April 4, 2024
    Inventors: Yu-Hung LIN, Wei-Ming WANG, Chih-Hao YU, PaoTai HUANG, Pei-Hsuan LO, Shih-Peng TAI
  • Patent number: 11944486
    Abstract: An analysis method and an electronic apparatus for breast image are provided. The method includes the following steps. One or more breast ultrasound images are obtained. The breast ultrasound images are used for forming a three-dimensional (3D) breast model. A volume of interest (VOI) in the breast ultrasound image is obtained by applying a detection model on the 3D breast model. The VOI is compared with a tissue segmentation result. The VOI is determined as a false positive according to a compared result between the VOI and the tissue segmentation result. The compared result includes that the VOI is located at a glandular tissue based on the tissue segmentation result. In response to the VOI being located in the glandular tissue of the tissue segmentation result, the VOI is compared with the lactiferous duct in the 3D breast model.
    Type: Grant
    Filed: July 19, 2021
    Date of Patent: April 2, 2024
    Assignee: TAIHAO MEDICAL INC.
    Inventors: Jen-Feng Hsu, Hong-Hao Chen, Rong-Tai Chen, Hsin-Hung Lai, Wei-Han Teng
  • Patent number: 11945924
    Abstract: The present invention relates to a fluorine-containing resin composition, and a resin vanish, a fluorine-containing dielectric sheet, a laminate, a copper clad laminate and a printed circuit board containing the same. The fluorine-containing resin composition comprises 30 wt. %-70 wt. % of a fluorine-containing polymer, 30 wt. %-70 wt. % of an inorganic filler which includes the following particle size distribution: D10 is greater than 1.5 ?m; and D50 is 10-15 ?m. In the present invention, the selection of an inorganic filler with a specific particle size distribution can ensure that the boards prepared by the fluorine-containing resin composition have excellent dielectric properties and voltage resistance performance, even if the inorganic filler is added in a large amount.
    Type: Grant
    Filed: December 17, 2020
    Date of Patent: April 2, 2024
    Assignee: SHENGYI TECHNOLOGY CO., LTD.
    Inventors: Songgang Chai, Qianfa Liu, Liangpeng Hao, Wei Liang
  • Patent number: 11948863
    Abstract: A package structure and method of forming the same are provided. The package structure includes a polymer layer, a redistribution layer, a die, and an adhesion promoter layer. The redistribution layer is disposed over the polymer layer. The die is sandwiched between the polymer layer and the redistribution layer. The adhesion promoter layer, an oxide layer, a through via, and an encapsulant are sandwiched between the polymer layer and the redistribution layer. The encapsulant is laterally encapsulates the die. The through via extends through the encapsulant. The adhesion promoter layer and the oxide layer are laterally sandwiched between the through via and the encapsulant. A bottom portion of the encapsulant is longitudinally sandwiched between the adhesion promoter layer and the polymer layer.
    Type: Grant
    Filed: February 8, 2023
    Date of Patent: April 2, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hung-Chun Cho, Hung-Jui Kuo, Yu-Hsiang Hu, Sih-Hao Liao, Wei-Chih Chen
  • Patent number: 11947393
    Abstract: Disclosed are a foldable screen and a display device. The foldable screen includes: a flexible display panel and a plurality of elastic portions, wherein each of the elastic portions includes each of elastic support members and two connecting rods fixedly connected to each of the elastic support members; wherein the two connecting rods are respectively connected to two flat portions of the flexible display panel, and the elastic support members are configured to supply a support force to the foldable portion in the case that a display surface of the foldable portion of the flexible display panel is coplanar with those of the flat portions.
    Type: Grant
    Filed: March 2, 2022
    Date of Patent: April 2, 2024
    Assignees: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Renzhe Xu, Bin Zhang, Haotian Yang, Yiming Wang, Wei Gong, Jingyu Piao, Xiaodong Hao, Danyang Bi, Kang Wang, Inho Park, Xiaoliang Fu, Yuanyuan Chai, Seungyong Oh
  • Patent number: 11948884
    Abstract: A semiconductor device includes: a substrate, including an upper surface and a first to a fourth side surfaces; wherein the upper surface includes a first edge connecting the first side surface and a second edge opposite to the first edge and connecting the second side surface; a first modified trace formed on the first side surface; and a semiconductor stack formed on the upper surface, including a lower surface connecting the upper surface of the substrate, and the lower surface comprises a fifth edge adjacent to the first edge and a sixth edge opposite to the fifth edge and adjacent to the second edge; wherein a shortest distance between the first edge and the fifth edge is S1 ?m, and a shortest distance between the second edge and the sixth edge is S2 ?m; wherein in a lateral view viewing from the third side surface, the first side surface forms a first acute angle with a degree of ?1 with the vertical direction, the second side surface forms a second acute angle with a degree of ?2 with the vertical dire
    Type: Grant
    Filed: August 24, 2021
    Date of Patent: April 2, 2024
    Assignee: EPISTAR CORPORATION
    Inventors: Lin Tzu Hsiang, Chen Chih Hao, Wu Wei Che, Chen Ying Chieh
  • Patent number: 11948904
    Abstract: A die includes a substrate, a conductive pad, a connector and a protection layer. The conductive pad is disposed over the substrate. The connector is disposed on the conductive pad. The connector includes a seed layer and a conductive post. The protection layer laterally covers the connector. Topmost surfaces of the seed layer and the conductive post and a top surface of the protection layer are level with each other.
    Type: Grant
    Filed: March 21, 2022
    Date of Patent: April 2, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wei-Chih Chen, Hung-Jui Kuo, Yu-Hsiang Hu, Sih-Hao Liao
  • Publication number: 20240107656
    Abstract: A circuit board assembly is applied to the field of electronic communications technologies to resolve a prior-art heat dissipation problem of a circuit board. The circuit board assembly combines, on a second circuit board, low-speed signals transmitted between a plurality of I/O modules and an IC chip, and then transmits the combined low-speed signals to the IC chip by using a low-speed cable. A low-speed signal sent by the IC chip to the plurality of I/O modules is extended to a plurality of low-speed signals on the second circuit board, and then the plurality of low-speed signals are separately sent to the plurality of I/O modules. This may be applied to a scenario in which a relatively large quantity of electronic components need to be disposed on a circuit board.
    Type: Application
    Filed: September 26, 2023
    Publication date: March 28, 2024
    Inventors: Chaojun DENG, Fei MA, Wei FANG, Zhiwen YANG, Chungang LI, Shun HAO
  • Publication number: 20240107478
    Abstract: Techniques are described to determine a time clock value by a communication device using information provided by a network device. An example wireless communication method includes receiving, by a communication device, a first signal in a first time period; transmitting, by the communication device, a second signal in a second time period later than the first time period to a network device; receiving, by the communication device, a third message comprising a timing information associated with the first time period, the second time period, or a propagation delay value; and determining, by the communication device, a time when the communication device receives the first signal based at least on the timing information.
    Type: Application
    Filed: December 8, 2023
    Publication date: March 28, 2024
    Applicant: ZTE Corporation
    Inventors: Shuaihua KOU, Peng HAO, Wei GOU, Junfeng ZHANG
  • Publication number: 20240107513
    Abstract: Methods, apparatus, and systems that facilitate the indication of the codebook to be transmitted/retransmitted are disclosed. In one example aspect, a method for wireless communication includes transmitting, by a base station, a physical-layer control signaling message to a user device triggering a retransmission of a codebook for a feedback transmission that has been previously canceled. The physical-layer control signaling message includes a field of resource assignment that is used to indicate an attribute associated with the codebook. The method also includes receiving, by the base station, the retransmission of the codebook from the user device according to the physical-layer control signaling message.
    Type: Application
    Filed: November 28, 2023
    Publication date: March 28, 2024
    Inventors: Wei GOU, Junfeng ZHANG, Jing SHI, Shuaihua KOU, Peng HAO