Patents by Inventor Wei Hsu
Wei Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250072050Abstract: An integrated circuit includes a transistor having a plurality of stacked channels each extending between the source/drain regions of the transistor. The transistor also includes a hard mask nanostructure above the highest channel and extending between the source/drain regions of the transistor. A gate dielectric and gate metals wrap around the channels and the hard mask nanostructure.Type: ApplicationFiled: January 4, 2024Publication date: February 27, 2025Inventors: Chung-Wei HSU, Lung-Kun CHU, Jia-Ni YU, Chun-Fu LU, Shih-Hao LAI, Kuo-Cheng CHIANG, Chih-Hao WANG
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Publication number: 20250072108Abstract: Capacitor cells are provided. A first PMOS transistor has a source connected to a power supply and a drain connected to a first node. A first NMOS transistor has a source connected to a ground and a drain connected to a second node. A second PMOS transistor has a source connected to the second node and a drain connected to the first node. A second NMOS transistor has a source connected to the ground and a drain connected to the first node. A first P+ doped region is shared by drains of the first and second PMOS transistors. A first gate metal is between the first P+ doped region and a second P+ doped region. A first N+ doped region is shared by sources of the first and second NMOS transistors. A second gate metal is between the first N+ doped region and a second N+ doped region.Type: ApplicationFiled: November 12, 2024Publication date: February 27, 2025Inventors: Chien-Yao HUANG, Wun-Jie LIN, Chia-Wei HSU, Yu-Ti SU
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Publication number: 20250067954Abstract: An optical member driving mechanism is provided. The optical member driving mechanism includes a first movable portion used for connecting an optical element, a fixed portion, a first driving assembly used for driving the first movable portion to rotate relative to the fixed portion, and a guiding assembly having a first intermediate element. The first movable portion is movable relative to the fixed portion. The guiding assembly is used for applying a first stabilized force to the first movable portion for making the first intermediate element be in contact with the first movable portion or the fixed portion. The first movable portion is rotatable relative to the fixed portion.Type: ApplicationFiled: November 8, 2024Publication date: February 27, 2025Inventors: Chih-Wei WENG, Chao-Chang HU, Yueh-Lin LEE, Chen-Hsien FAN, Chien-Yu KAO, Chia-Ching HSU, Sung-Mao TSAI, Sin-Jhong SONG
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Publication number: 20250072085Abstract: A power semiconductor device and a method of manufacturing a power semiconductor device is provided, including a shield gate trench (SGT) metal-oxide semiconductor field-effect transistor (MOSFET). The present disclosure provides for a MOSFET with a reduced charge between the gate conductive region and the drain or collector region, in order to improve the switching efficiency of the MOSFET.Type: ApplicationFiled: August 20, 2024Publication date: February 27, 2025Applicant: NEXPERIA B.V.Inventors: Chih-Wei Hsu, Deepak Chandra Pandey, Adam Brown
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Publication number: 20250070073Abstract: The invention provides an embedded semiconductor packaging device, which includes a base, a chip, a frame surrounding structure, and an encapsulation layer. The base has a bonding surface. The chip has a top surface and a bottom surface opposite to each other, wherein the bottom surface is bonded to the bonding surface of the base through an adhesive layer. The frame surrounding structure is arranged along the periphery of a top surface of the chip. The encapsulation layer covers the chip and the frame surrounding structure.Type: ApplicationFiled: July 23, 2024Publication date: February 27, 2025Inventor: CHE-WEI HSU
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Publication number: 20250071260Abstract: A method and apparatus for video coding are disclosed. According to the method, a set of MC (Motion Compensation) candidates with each MC candidate comprising predicted samples for coding boundary pixels of the current block are determined. The set of MC candidates comprises a first candidate, and wherein the first candidate corresponds to a weighted sum of first predicted pixels generated according to first motion information of the current block and second predicted pixels generated according to second motion information of a neighbouring boundary block of the current block. Boundary matching costs associated with the set of MC candidates are determined respectively. A final candidate is determined from the set of MC candidates based on the boundary matching costs. The current block is encoded or decoded using the final candidate.Type: ApplicationFiled: January 10, 2023Publication date: February 27, 2025Inventors: Chun-Chia CHEN, Olena CHUBACH, Chih-Wei HSU, Tzu-Der CHUANG, Ching-Yeh CHEN, Yu-Wen HUANG
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Publication number: 20250065254Abstract: A method is provided for supporting environmental control in a semiconductor wafer processing space, the method includes: flowing a first gas under pressure in a first direction through a first diffuser tube, thereby generating a first lateral flow of gas through a sidewall of the first diffuser tube; flowing a second gas under pressure in a second direction through a second diffuser tube, thereby generating a second lateral flow of gas through a sidewall of the second diffuser tube, the second direction being opposite the first direction; combining the first and second lateral flows of gas within a housing; and outputting the combined lateral flows of gas from the housing to produce a laminar gas flow covering an opening to the semiconductor wafer processing space.Type: ApplicationFiled: November 12, 2024Publication date: February 27, 2025Inventors: Jyh-Shiou Hsu, Wen-Hsun Tsai, Chien-Chun Hu, Kuang-Wei Cheng, Sung-Ju Huang
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Publication number: 20250064323Abstract: A photoplethysmogram system and method are disclosed. The system includes at least three light sources of different frequencies configured to emit light into a subject's skin. A PPG sensor detects the light from the multiple light sources after it has passed through the subject's skin and generates a PPG signal for each light source. A processor, communicatively coupled to the PPG sensor, receives the PPG signals and estimates physiological parameters from each PPG signal. The light sources may include a red light source, an infrared light source, and a green light source, with the green light source used for calibration in the measurement of blood oxygen saturation. The processor may dynamically perform amputation or imputation of the PPG signals based on the consistency of the signals from the different light sources. The physiological parameters may include respiratory effort and pulse rate and pulse rate variability.Type: ApplicationFiled: August 25, 2023Publication date: February 27, 2025Applicant: PRANAQ PTE. LTD.Inventors: Cheng-Yao Chen, Uei-Ming Jow, Chih-Wei Hsu
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Publication number: 20250071288Abstract: A method and apparatus for video coding are disclosed. According to the method for the decoder side, encoded data associated with a current block comprising a first-colour block and a second-colour block are received. An inherited model parameter set is determined from a previously coded block coded in a first CCLM related mode, wherein the inherited model parameter set comprises a first scaling parameter associated with the first CCLM related mode. A final inherited model parameter set is derived if an update value for the inherited model parameter set is determined, where the final inherited model parameter set is determined based on the first scaling parameter and the update value. Then, the encoded data associated with the second-colour block are decoded using prediction data based on an updated CCLM related model associated with the final inherited model parameter set. A method and apparatus for the encoder side are also disclosed.Type: ApplicationFiled: January 18, 2023Publication date: February 27, 2025Inventors: Chia-Ming TSAI, Chun-Chia CHEN, Chih-Wei HSU, Ching-Yeh CHEN, Tzu-Der CHUANG
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Publication number: 20250071331Abstract: A method and apparatus for video coding are disclosed. According to the method for the decoder side, a first syntax, related to whether the current block is coded in a CCLM related mode, is parsed from a bitstream comprising the encoded data for the current block. If the first syntax indicates the current block being coded in the CCLM related mode, a second syntax is parsed from the bitstream, wherein the second syntax is related to whether a multiple model CCLM mode is used or whether one or more model parameters are explicitly signalled or implicitly derived. The model parameters for the second-colour block are determined if the first syntax indicates the current block being coded in a CCLM related mode. The encoded data associated with the second-colour block is then decoded using prediction data comprising the cross-colour predictor for the second-colour block.Type: ApplicationFiled: January 18, 2023Publication date: February 27, 2025Inventors: Chia-Ming TSAI, Chun-Chia CHEN, Chih-Wei HSU, Ching-Yeh CHEN, Tzu-Der CHUANG
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Patent number: 12237396Abstract: Multi-gate devices and methods for fabricating such are disclosed herein. An exemplary method includes forming a gate dielectric layer around first channel layers in a p-type gate region and around second channel layers in an n-type gate region. Sacrificial features are formed between the second channel layers in the n-type gate region. A p-type work function layer is formed over the gate dielectric layer in the p-type gate region and the n-type gate region. After removing the p-type work function layer from the n-type gate region, the sacrificial features are removed from between the second channel layers in the n-type gate region. An n-type work function layer is formed over the gate dielectric layer in the n-type gate region. A metal fill layer is formed over the p-type work function layer in the p-type gate region and the n-type work function layer in the n-type gate region.Type: GrantFiled: July 26, 2022Date of Patent: February 25, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Jia-Ni Yu, Kuo-Cheng Chiang, Lung-Kun Chu, Chung-Wei Hsu, Chih-Hao Wang, Mao-Lin Huang
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Patent number: 12237373Abstract: A device includes a substrate, and a first semiconductor channel over the substrate. The first semiconductor channel includes a first nanosheet of a first semiconductor material, a second nanosheet of a second semiconductor material in physical contact with a topside surface of the first nanosheet, and a third nanosheet of the second semiconductor material in physical contact with an underside surface of the first nanosheet. The first gate structure is over and laterally surrounding the first semiconductor channel, and in physical contact with the second nanosheet and the third nanosheet.Type: GrantFiled: April 3, 2023Date of Patent: February 25, 2025Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Lung-Kun Chu, Jia-Ni Yu, Chung-Wei Hsu, Chih-Hao Wang, Kuo-Cheng Chiang, Kuan-Lun Cheng, Mao-Lin Huang
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Patent number: 12238912Abstract: This application discloses electromagnetic energy mitigation assemblies and automotive vehicle components comprising the electromagnetic energy mitigation assemblies. An electromagnetic energy mitigation assembly includes a first electrically conductive layer and a second electrically conductive layer. First and second permalloy layers are along respective first and second opposite sides of the first electrically conductive layer. Third and fourth permalloy layers are along respective third and fourth opposite sides of the second electrically conductive layer. An electromagnetic noise suppression layer is sandwiched between the second and third permalloy layers. An automotive vehicle component includes an electromagnetic energy mitigation assembly configured to be positioned relative to one or more batteries of an automotive vehicle for providing electromagnetic shielding for the one or more batteries. The electromagnetic energy mitigation assembly includes a first electrically conductive layer.Type: GrantFiled: August 31, 2023Date of Patent: February 25, 2025Assignee: Laird Technologies (Shenzhen) Ltd.Inventors: Tsang-I Tsai, Yunxi She, Dong-Xiang Li, Jie-Sheng Chen, Min-Wei Hsu
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Patent number: 12237416Abstract: A method includes forming a first semiconductor fin and a second semiconductor fin parallel to each other and protruding higher than top surfaces of isolation regions. The isolation regions include a portion between the first and the second semiconductor fins. The method further includes forming a gate stack crossing over the first and the second semiconductor fins, etching a portion of the gate stack to form an opening, wherein the portion of the isolation regions, the first semiconductor fin, and the second semiconductor fin are exposed to the opening, etching the first semiconductor fin, the second semiconductor fin, and the portion of the isolation regions to extend the opening into a bulk portion of a semiconductor substrate below the isolation regions, and filling the opening with a dielectric material to form a cut-fin isolation region.Type: GrantFiled: November 8, 2021Date of Patent: February 25, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Shiang-Bau Wang, Li-Wei Yin, Shao-Hua Hsu
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Patent number: 12237372Abstract: A device includes a substrate, and a first semiconductor channel over the substrate. The first semiconductor channel includes a first nanosheet of a first semiconductor material, a second nanosheet of a second semiconductor material in physical contact with a topside surface of the first nanosheet, and a third nanosheet of the second semiconductor material in physical contact with an underside surface of the first nanosheet. The first gate structure is over and laterally surrounding the first semiconductor channel, and in physical contact with the second nanosheet and the third nanosheet.Type: GrantFiled: April 3, 2023Date of Patent: February 25, 2025Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Lung-Kun Chu, Jia-Ni Yu, Chung-Wei Hsu, Chih-Hao Wang, Kuo-Cheng Chiang, Kuan-Lun Cheng, Mao-Lin Huang
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Patent number: 12237402Abstract: In an embodiment, a method includes: forming a fin extending from a substrate; forming a first gate mask over the fin, the first gate mask having a first width; forming a second gate mask over the fin, the second gate mask having a second width, the second width being greater than the first width; depositing a first filling layer over the first gate mask and the second gate mask; depositing a second filling layer over the first filling layer; planarizing the second filling layer with a chemical mechanical polish (CMP) process, the CMP process being performed until the first filling layer is exposed; and planarizing the first filling layer and remaining portions of the second filling layer with an etch-back process, the etch-back process etching materials of the first filling layer, the second filling layer, the first gate mask, and the second gate mask at the same rate.Type: GrantFiled: November 28, 2022Date of Patent: February 25, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTDInventors: Shu-Wei Hsu, Yu-Jen Shen, Hao-Yun Cheng, Chih-Wei Wu, Ying-Tsung Chen, Ying-Ho Chen
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Patent number: 12237312Abstract: A light-emitting diode (LED) packaging module includes a plurality of LED chips spaced apart from one another, an encapsulating layer that fills in a space among the LED chips, a light-transmitting layer disposed on the encapsulating layer, a wiring assembly disposed on and electrically connected to the LED chips, and an insulation component that covers the encapsulating layer and the wiring assembly. Each of the LED chips includes an electrode assembly including first and second electrodes. The light-transmitting layer includes a light-transmitting layer that has a light transmittance greater than that of the encapsulating layer.Type: GrantFiled: March 10, 2022Date of Patent: February 25, 2025Assignee: QUANZHOU SANAN SEMICONDUCTOR TECHNOLOGY CO., LTD.Inventors: Shuning Xin, Chen-Ke Hsu, Aihua Cao, Junpeng Shi, Weng-Tack Wong, Yanqiu Liao, Zhen-Duan Lin, Changchin Yu, Chi-Wei Liao, Zheng Wu, Chia-En Lee
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Publication number: 20250063789Abstract: A method for forming a semiconductor device structure includes forming nanostructures over a substrate. The method also includes forming a gate structure wrapped around the nanostructures. The method also includes forming source/drain epitaxial structures over opposite sides of the nanostructures. The method also includes forming a first interlayer dielectric structure over the source/drain epitaxial structures. The method also includes removing the first interlayer dielectric structure. The method also includes forming a recess in the source/drain epitaxial structures. The method also includes forming a silicide structure in the recess. The method also includes forming a second interlayer dielectric structure over the silicide structure.Type: ApplicationFiled: August 15, 2023Publication date: February 20, 2025Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Fu-Hsiang SU, Ping-Chun WU, Je-Wei HSU, Hong-Chih CHEN, Chia-Hao KUO, Shih-Hsun CHANG
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Publication number: 20250063155Abstract: A method and apparatus for inter prediction in video coding system are disclosed. According to the method, input data associated with a current block comprising at least one colour block are received. A blending predictor is determined according to a weighted sum of at least two candidate predictions generated based on one or more first hypotheses of prediction, one or more second hypotheses of prediction, or both. The first hypotheses of prediction are generated based on one or more intra prediction modes comprising a DC mode, a planar mode or at least one angular modes. The second hypotheses of prediction are generated based on one or more cross-component modes and a collocated block of said at least one colour block. The input data associated with the colour block is encoded or decoded using the blending predictor.Type: ApplicationFiled: December 20, 2022Publication date: February 20, 2025Inventors: Man-Shu CHIANG, Olena CHUBACH, Chia-Ming TSAI, Yu-Ling HSIAO, Chun-Chia CHEN, Chih-Wei HSU, Tzu-Der CHUANG, Ching-Yeh CHEN, Yu-Wen HUANG
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Patent number: D1063950Type: GrantFiled: May 24, 2021Date of Patent: February 25, 2025Assignee: VIVOTEK INC.Inventors: Kuan-Hung Chen, Kai-Sheng Chuang, Chia-Chi Chang, Yu-Fang Huang, Kai-Ting Yu, Wen-Chun Chen, Shu-Jung Hsu, Tsao-Wei Hung