Patents by Inventor Wei Hsu
Wei Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250150600Abstract: A method that reorders partitioning candidates or motion vectors based on template matching costs for geometric prediction mode (GPM) is provided. A video coder receives data to be encoded or decoded as a current block of a current picture of a video. The current block is partitioned into first and second partitions by a bisecting line defined by an angle-distance pair. The video coder identifies a list of candidate prediction modes for coding the first and second partitions. The video coder computes a template matching (TM) cost for each candidate prediction mode in the list. The video coder receives or signals a selection of a candidate prediction mode based on an index that is assigned to the selected candidate prediction mode based on the computed TM costs. The video coder reconstructs the current block by using the selected candidate prediction mode to predict the first and second partitions.Type: ApplicationFiled: August 15, 2022Publication date: May 8, 2025Inventors: Chih-Yao CHIU, Chih-Hsuan LO, Chun-Chia CHEN, Chih-Wei HSU, Ching-Yeh CHEN, Tzu-Der CHUANG
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Publication number: 20250150601Abstract: A video coding system that reorders prediction candidates is provided. A video coder receives data for a block of pixels to be encoded or decoded as a current block of a current picture of a video. The video coder identifies possible candidate prediction positions. The video coder computes a cost for each of the identified possible candidate prediction positions. The video coder assigns, based on the computed costs, a reordered index to each of N lowest cost candidate prediction positions from the identified possible candidate prediction positions. The video coder selects a candidate prediction position using the assigned reordered indices, wherein the selection is signaled in or parsed from the bitstream. The video coder encodes or decodes the current block by using the selected candidate prediction position.Type: ApplicationFiled: August 15, 2022Publication date: May 8, 2025Inventors: Chih-Yao CHIU, Chun-Chia CHEN, Chih-Wei HSU, Ching-Yeh CHEN, Tzu-Der CHUANG, Yu-Wen HUANG
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Publication number: 20250147015Abstract: A protein analysis platform includes a platform body comprising: a gel working unit provided in a top portion of the platform body and comprising a gel accommodation area for accommodating at least one gel; at least one electrophoresis tank provided along a side of the gel accommodation area and provided with at least one electrode; and a blotting layer stack provided in a bottom portion of the gel working unit and comprising an electrode layer; wherein a removable bottom plate is provided between the gel working unit and the blotting layer stack and detachably corresponds to a bottom side of the gel accommodation area. The protein analysis platform is used for western blotting or next-generation western blotting, wherein the protein analysis platform can quickly complete steps such as gel casting, electrophoresis, and blotting in one platform.Type: ApplicationFiled: November 8, 2024Publication date: May 8, 2025Inventors: AN-BANG WANG, WEI-WEN LIU, SI-TSE JIANG, CHIA-WEI HSU, TING-CHI HUANG
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Publication number: 20250140610Abstract: Systems, devices and methods of manufacturing a system on silicon wafer (SoSW) device and package are described herein. A plurality of functional dies is formed in a silicon wafer. Different sets of masks are used to form different types of the functional dies in the silicon wafer. A first redistribution structure is formed over the silicon wafer and provides local interconnects between adjacent dies of the same type and/or of different types. A second redistribution structure may be formed over the first redistribution layer and provides semi-global and/or global interconnects between non-adjacent dies of the same type and/or of different types. An optional backside redistribution structure may be formed over a second side of the silicon wafer opposite the first redistribution layer. The optional backside redistribution structure may provide backside interconnects between functional dies of different types.Type: ApplicationFiled: December 24, 2024Publication date: May 1, 2025Inventors: Chen-Hua Yu, Wei Ling Chang, Chuei-Tang Wang, Tin-Hao Kuo, Che-Wei Hsu
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Publication number: 20250142728Abstract: Provided is a coil carrier board, including a base coil layer, a conductive layer stacked on and bonded to the base coil layer, at least one build-up coil layer stacked on and bonded to the conductive layer, and an opening connecting the base coil layer, the conductive layer and the build-up coil layer. The coil carrier board has thick copper, fine line spacing and appropriate rigidity by means of the build-up circuit process and the structural design of the insulating layer of a photosensitive dielectric material bonded with a thermosetting dielectric material. Accordingly, the high current-carrying efficiency of the coil carrier board is enhanced, and the overall structure of the coil carrier board has better flatness, rigidity and high interlayer alignment accuracy, thereby facilitating miniaturization and automated assembly production.Type: ApplicationFiled: October 25, 2024Publication date: May 1, 2025Applicant: PHOENIX PIONEER TECHNOLOGY CO., LTD.Inventors: Che-Wei HSU, Wen-Hung HU, Shih-Ping HSU
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Publication number: 20250137072Abstract: This application relates to stem cell biology and regenerative medicine. Disclosed herein are methods for isolation of skeletal stem cells, related methods, related compositions, related products, and related uses.Type: ApplicationFiled: February 16, 2023Publication date: May 1, 2025Applicants: ADA Forsyth Institute, Inc., University of RochesterInventors: Wei Hsu, Zhirui Jiang
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Publication number: 20250142943Abstract: A semiconductor device is provided. The semiconductor device includes a plurality of first nanostructures formed over a substrate, and a plurality of second nanostructures formed over the substrate. The semiconductor device includes a gate structure surrounding the first nanostructures and the second nanostructures, and the first hard mask layer and the second hard mask layer are surrounded by the gate dielectric layer. The semiconductor device includes an isolation structure extending upwardly above the substrate, and a bottom surface of the isolation structure is lower than a bottommost surface of the gate structure.Type: ApplicationFiled: January 6, 2025Publication date: May 1, 2025Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Kuo-Cheng CHIANG, Chung-Wei HSU, Lung-Kun CHU, Jia-Ni YU, Chih-Hao WANG, Mao-Lin HUANG
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Patent number: 12288695Abstract: A method of forming a semiconductor device includes forming a first dielectric layer over a first channel region in a first region and over a second channel region in a second region; introducing a first dipole element into the first dielectric layer in the first region to form a first dipole-containing gate dielectric layer in the first region; forming a second dielectric layer over the first dipole-containing gate dielectric layer; introducing fluorine into the second dielectric layer to form a first fluorine-containing gate dielectric layer over the first dipole-containing gate dielectric layer; and forming a gate electrode over the first fluorine-containing gate dielectric layer.Type: GrantFiled: March 25, 2022Date of Patent: April 29, 2025Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chung-Wei Hsu, Kuo-Cheng Chiang, Mao-Lin Huang, Lung-Kun Chu, Jia-Ni Yu, Chun-Fu Lu, Chih-Hao Wang
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Publication number: 20250133180Abstract: A teleprompter includes a connecting bracket, a prompting optical mechanism, a transferring board, and a supporting seat. The connecting bracket is used to support a monitor assembly. The prompting optical mechanism includes a main housing, a front frame, a rear frame, and a splitter. The transferring board is detachably connected to the rear frame. The transferring board has a photography opening. The supporting seat has an assembly board, and a horizontal carrier. The horizontal carrier is connected to a top end of the assembly board. The assembly board is connected to one side of the connecting bracket, and can be adjusted to different positions of the connecting bracket. Therefore, the horizontal carrier can be adjusted to different heights corresponding with the photography opening of the transferring board.Type: ApplicationFiled: February 21, 2024Publication date: April 24, 2025Inventors: YU-CHENG CHANG, CHIN-WEI HSU, SHANG-FU WANG, CHIA-HSIN TSAI
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Publication number: 20250132664Abstract: A power supply system with power factor correction, includes: an AC rectifier, a power factor correction (PFC) conversion circuit, an asymmetric half-bridge (AHB) flyback converter and a communication protocol power delivery (PD) interface. When a power level of an adapter output power is lower than a power threshold, and a converted voltage of a converted power is higher than a first voltage threshold, the communication protocol PD interface generates a disable signal to disable a PFC conversion of the PFC conversion circuit, when the PFC conversion is disabled, the PFC conversion circuit operates a bypass coupling operation, as thus, the converted voltage is equal to a rectified voltage of a rectified power.Type: ApplicationFiled: January 10, 2024Publication date: April 24, 2025Inventors: Wei-Hsu Chang, Kun-Yu Lin, Jyun-Che Ho
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Patent number: 12282247Abstract: A detection device includes a substrate, a light source, a detection module, and a heat dissipation module. The substrate includes a first base plate, a second base plate, and at least one connecting portion connecting the first base plate to the second base plate. The light source is disposed on the first base plate. The detection module is disposed on the second base plate. The first base plate has a first surface towards the at least one connecting portion, and the at least one connecting portion has a second surface towards the first base plate. The second surface is connected to a portion of the first surface. The heat dissipation module is disposed on the at least one connecting portion and/or the second base plate, and the influence of heat on proper operation of the detection device is thus prevented.Type: GrantFiled: June 1, 2022Date of Patent: April 22, 2025Assignees: HONGFUJIN PRECISION ELECTRONICS (ZHENGZHOU) CO., LTD., Henan Fuchi Technology Co., Ltd.Inventors: Hsin-Ta Lin, Chia-Wei Hsu
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Publication number: 20250126702Abstract: A carrying structure is provided and is defined with a main area and a peripheral area adjacent to the main area, where a plurality of packaging substrates are disposed in the main area in an array manner, a plurality of positioning holes are disposed in the peripheral area, and a plurality of positioning traces are formed along a part of the edges of the plurality of positioning holes, such that the plurality of positioning traces are formed with notches. Therefore, a plurality of positioning pins on the machine can be easily aligned and inserted into the plurality of positioning holes by the design of the plurality of positioning traces.Type: ApplicationFiled: December 23, 2024Publication date: April 17, 2025Inventors: Chin-Wei Hsu, Jui-Kun Wang, Shu-Yu Ko, Fang-Wei Chang, Hsiu-Fang Chien
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Publication number: 20250123260Abstract: A tissue stretching system includes a motor, a first pillar, a second pillar, a force sensor, and an imaging device. The tissue stretching system may be provided as a 2D axial tissue stretcher that may monitor changes in mechanical properties over time. Tissues may be coated onto the first pillar and/or the second pillar. In a specific example, the first pillar and/or the second pillar may be a PDMS (Polydimethylsiloxane) structure configured to probe the mechanical properties in between a designed gap of the first pillar and the second pillar. The motor of the tissue stretching system includes a microcontroller. The motor of the tissue stretching system may have high resolution capabilities to provide the appropriate strain to the sample. The tissue stretching system then determines the actual amount of strain applied to the sample.Type: ApplicationFiled: October 11, 2024Publication date: April 17, 2025Inventors: Luis Solorio, Hyowon Lee, Angel Guillermo Enriquez, Madison Mckensi Howard, Chun-Wei Hsu, Sarah Libring
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Patent number: 12274350Abstract: A mobile device attachment adapted for a mobile device and a container for food or liquid is provided. The mobile device attachment includes a magnetic connecting member and a connecting member. The magnetic connecting member is selectively magnetically connected to the mobile device and adapted to extend in an escaping direction. The connecting member is disposed between the container and the magnetic connecting member. The mobile device has an image capturing range. When the magnetic connecting member extends in the escaping direction, the container, the magnetic connecting member and the connecting member are located outside the image capturing range. Besides, a container including the mobile device attachment is also provided.Type: GrantFiled: November 1, 2023Date of Patent: April 15, 2025Assignee: EVOLUTIVE LABS CO., LTD.Inventors: Ching-Fu Wang, Ching-Yu Wang, Che-Wei Hsu, Jui-Chen Lu, Cheng-Che Ho
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Publication number: 20250120123Abstract: A semiconductor device structure and methods of forming the same are described. The structure includes a gate dielectric layer disposed over a substrate, a gate electrode layer disposed over the gate dielectric layer, and a first gate spacer disposed adjacent the gate dielectric layer, wherein the first gate spacer comprises an inner surface facing the gate dielectric layer and an outer surface opposite the inner surface, and the first gate spacer includes an oxygen concentration that decreases from the inner surface towards the outer surface of the first gate spacer.Type: ApplicationFiled: January 24, 2024Publication date: April 10, 2025Inventors: Chun-Fu LU, Lung-Kun CHU, Jia-Ni YU, Chung-Wei HSU, Shih-Hao LAI, Kuo-Cheng CHIANG, Chih-Hao WANG
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Publication number: 20250120166Abstract: Semiconductor device and the manufacturing method thereof are disclosed. An exemplary method comprises forming a first stack structure and a second stack structure in a first area over a substrate, wherein each of the stack structures includes semiconductor layers separated and stacked up; depositing a first interfacial layer around each of the semiconductor layers of the stack structures; depositing a gate dielectric layer around the first interfacial layer; forming a dipole oxide layer around the gate dielectric layer; removing the dipole oxide layer around the gate dielectric layer of the second stack structure; performing an annealing process to form a dipole gate dielectric layer for the first stack structure and a non-dipole gate dielectric layer for the second stack structure; and depositing a first gate electrode around the dipole gate dielectric layer of the first stack structure and the non-dipole gate dielectric layer of the second stack structure.Type: ApplicationFiled: December 16, 2024Publication date: April 10, 2025Inventors: Chung-Wei Hsu, Kuo-Cheng Chiang, Kuan-Lun Cheng, Hou-Yu Chen, Ching-Wei Tsai, Chih-Hao Wang, Lung-Kun Chu, Mao-Lin Huang, Jia-Ni Yu
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Patent number: 12272557Abstract: In an embodiment, a method includes: depositing a gate dielectric layer on a first fin and a second fin, the first fin and the second fin extending away from a substrate in a first direction, a distance between the first fin and the second fin decreasing along the first direction; depositing a sacrificial layer on the gate dielectric layer by exposing the gate dielectric layer to a self-limiting source precursor and a self-reacting source precursor, the self-limiting source precursor reacting to form an initial layer of a material of the sacrificial layer, the self-reacting source precursor reacting to form a main layer of the material of the sacrificial layer; annealing the gate dielectric layer while the sacrificial layer covers the gate dielectric layer; after annealing the gate dielectric layer, removing the sacrificial layer; and after removing the sacrificial layer, forming a gate electrode layer on the gate dielectric layer.Type: GrantFiled: August 1, 2023Date of Patent: April 8, 2025Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Kuei-Lun Lin, Chia-Wei Hsu, Xiong-Fei Yu, Chi On Chui, Chih-Yu Hsu, Jian-Hao Chen
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Patent number: 12273035Abstract: A conversion control circuit controls plural stackable sub-converters which are coupled in parallel to generate an output power to a load, the conversion control circuit includes: a current sharing terminal, wherein a current sharing signal is configured to be connected to the current sharing terminals, in parallel, of the plurality of the conversion control circuits; and a current sharing circuit, configured to generate or receive the current sharing signal which is generated according to an output current of the output power; wherein the conversion control circuit adjusts the power stage circuit according to the current sharing signal for current sharing among the plural stackable sub-converters.Type: GrantFiled: March 21, 2023Date of Patent: April 8, 2025Assignee: Richtek Technology CorporationInventors: Ta-Yung Yang, Wei-Hsu Chang, Kuo-Chi Liu, Chao-Chi Chen
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Patent number: 12272653Abstract: A semiconductor packaging substrate is provided, which includes a build-up circuit structure, at least one fiducial marker structure, and an insulating protective layer. The fiducial marker structure includes a fiducial marker and a second insulating layer covering the fiducial marker. The second insulating layer is made of a transparent insulation material, so that the fiducial marker inside the second insulating layer can be seen through a CCD lens or tool maker microscope for alignment so as to easily create a smaller see-through area and the process parameters can be easily controlled. Besides, the disclosure further provides a manufacturing method for the semiconductor packaging substrate.Type: GrantFiled: November 17, 2022Date of Patent: April 8, 2025Assignee: PHOENIX PIONEER TECHNOLOGY CO., LTD.Inventors: Chao-Tsung Tseng, Che-Wei Hsu
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Publication number: 20250111157Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for analyzing embedding spaces using large language models. In one aspect, a method performed by one or more computers for analyzing a target embedding space using a neural network configured to perform a set of machine learning tasks is described. The method includes: obtaining, for each of one or more entities, a respective domain embedding representing the entity in the target embedding space; receiving a text prompt including a sequence of input tokens describing a particular machine learning task in the set to be performed on the one or more entities; preparing, for the neural network, an input sequence including each input token in the text prompt and each domain embedding; and processing the input sequence, using the neural network, to generate a sequence of output tokens describing a result of the particular machine learning task.Type: ApplicationFiled: September 27, 2024Publication date: April 3, 2025Inventors: Guy Tennenholtz, Yinlam Chow, Chih-wei Hsu, Jihwan Jeong, Lior Shani, Deepak Ramachandran, Martin Mirolyubov Mladenov, Craig Edgar Boutilier