Patents by Inventor Wei Jen Lo

Wei Jen Lo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240363353
    Abstract: A method of forming a semiconductor device includes: forming a gate structure over a fin that protrudes above a substrate; forming a source/drain region over the fin adjacent to the gate structure; forming an interlayer dielectric (ILD) layer over the source/drain region around the gate structure; forming an opening in the ILD layer to expose the source/drain region; forming a silicide region and a barrier layer successively in the openings over the source/drain region, where the barrier layer includes silicon nitride; reducing a concentration of silicon nitride in a surface portion of the barrier layer exposed to the opening; after the reducing, forming a seed layer on the barrier layer; and forming an electrically conductive material on the seed layer to fill the opening.
    Type: Application
    Filed: August 14, 2023
    Publication date: October 31, 2024
    Inventors: Pin-Wen Chen, Yu-Chen Ko, Chi-Yuan Chen, Ya-Yi Cheng, Chun-I Tsai, Wei-Jung Lin, Chih-Wei Chang, Ming-Hsing Tsai, Syun-Ming Jang, Wei-Jen Lo
  • Publication number: 20240355740
    Abstract: A method includes forming a dielectric layer over a conductive feature, and etching the dielectric layer to form an opening. The conductive feature is exposed through the opening. The method further includes forming a tungsten liner in the opening, wherein the tungsten liner contacts sidewalls of the dielectric layer, depositing a tungsten layer to fill the opening, and planarizing the tungsten layer. Portions of the tungsten layer and the tungsten liner in the opening form a contact plug.
    Type: Application
    Filed: June 30, 2023
    Publication date: October 24, 2024
    Inventors: Feng-Yu Chang, Sheng-Hsuan Lin, Shu-Lan Chang, Kai-Yi Chu, Meng-Hsien Lin, Pei-Hsuan Lee, Pei Shan Chang, Chih-Chien Chi, Chun-I Tsai, Wei-Jung Lin, Chih-Wei Chang, Ming-Hsing Tsai, Syun-Ming Jang, Wei-Jen Lo
  • Publication number: 20240355663
    Abstract: A method for cleaning debris and contamination from an etching apparatus is provided. The etching apparatus includes a process chamber, a source of radio frequency power, an electrostatic chuck within the process chamber, a chuck electrode, and a source of DC power connected to the chuck electrode. The method of cleaning includes placing a substrate on a surface of the electrostatic chuck, applying a plasma to the substrate, thereby creating a positively charged surface on the surface of the substrate, applying a negative voltage or a radio frequency pulse to the electrode chuck, thereby making debris particles and/or contaminants from the surface of the electrostatic chuck negatively charged and causing them to attach to the positively charged surface of the substrate, and removing the substrate from the etching apparatus thereby removing the debris particles and/or contaminants from the etching apparatus.
    Type: Application
    Filed: June 28, 2024
    Publication date: October 24, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Chi LIN, Huai-Tei YANG, Lun-Kuang TAN, Wei-Jen LO, Chih-Teng LIAO
  • Publication number: 20240337265
    Abstract: Embodiments of the present disclosure provide a cryogenic pump for semiconductor processing, including a body having a flange, configured to be coupled to a process chamber, and an opening defined at a first end of the body; one or more capture plate modules disposed in the body; and a cold header thermally coupled to the one or more capture plate modules. A longitudinal axis of the body is defined from the first end of the body to a second end of the body. A first lateral dimension of the opening is less than a second lateral dimension of the body, the first and second lateral dimensions being defined perpendicular to the longitudinal axis. The second lateral dimension is defined at a position between the opening and the second end.
    Type: Application
    Filed: April 6, 2023
    Publication date: October 10, 2024
    Inventors: Yu Min CHI, Yi-Chieh LO, Kuo-Lung HOU, Wei-Jen CHEN, Su-Yu YEH
  • Publication number: 20240332018
    Abstract: The present disclosure provides a semiconductor processing apparatus according to one embodiment. The semiconductor processing apparatus includes a chamber; a base station located in the chamber for supporting a semiconductor substrate; a preheating assembly surrounding the base station; a first heating element fixed relative to the base station and configured to direct heat to the semiconductor substrate; and a second heating element moveable relative to the base station and operable to direct heat to a portion of the semiconductor substrate.
    Type: Application
    Filed: June 10, 2024
    Publication date: October 3, 2024
    Inventors: Chih Yung HUNG, Wei-Jen LO, Cheng-Han LEE, Ching-Lun LAI, Chien-Feng LIN, Shahaji B. MORE, Shih-Chieh CHANG
  • Publication number: 20240332068
    Abstract: A representative method includes forming a photo-sensitive material over a substrate, and forming a cap layer over the photo-sensitive material, and patterning the cap layer. Using the patterned cap layer, a first portion of the photo-sensitive material is selectively exposed to a pre-selected light wavelength to change at least one material property of the first portion of the photo-sensitive material, while preventing a second portion of the photo-sensitive material from being exposed to the pre-selected light wavelength. One, but not both of the following steps is then conducted: removing the first portion of the photo-sensitive material and forming in its place a conductive element at least partially surrounded by the second portion of the photo-sensitive material, or removing the second portion of the photo-sensitive material and forming from the first portion of the photo-sensitive material a conductive element electrically connecting two or more portions of a circuit.
    Type: Application
    Filed: June 10, 2024
    Publication date: October 3, 2024
    Inventors: Wei-Jen Lo, Po-Cheng Shih, Syun-Ming Jang, Tze-Liang Lee
  • Patent number: 12080582
    Abstract: A method for cleaning debris and contamination from an etching apparatus is provided. The etching apparatus includes a process chamber, a source of radio frequency power, an electrostatic chuck within the process chamber, a chuck electrode, and a source of DC power connected to the chuck electrode. The method of cleaning includes placing a substrate on a surface of the electrostatic chuck, applying a plasma to the substrate, thereby creating a positively charged surface on the surface of the substrate, applying a negative voltage or a radio frequency pulse to the electrode chuck, thereby making debris particles and/or contaminants from the surface of the electrostatic chuck negatively charged and causing them to attach to the positively charged surface of the substrate, and removing the substrate from the etching apparatus thereby removing the debris particles and/or contaminants from the etching apparatus.
    Type: Grant
    Filed: January 10, 2022
    Date of Patent: September 3, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yu-Chi Lin, Huai-Tei Yang, Lun-Kuang Tan, Wei-Jen Lo, Chih-Teng Liao
  • Publication number: 20240274555
    Abstract: Embodiments provide a method and resulting structure that includes forming an opening in a dielectric layer to expose a metal feature, selectively depositing a metal cap on the metal feature, depositing a barrier layer over the metal cap, and depositing a conductive fill on the barrier layer.
    Type: Application
    Filed: May 8, 2023
    Publication date: August 15, 2024
    Inventors: Wei-Jen Lo, Syun-Ming Jang, Ming-Hsing Tsai, Chun-Chieh Lin, Hung-Wen Su, Ya-Lien Lee, Chih-Han Tseng, Chih-Cheng Kuo, Yi-An Lai, Kevin Huang, Kuan-Hung Ho
  • Patent number: 12033890
    Abstract: A representative method includes forming a photo-sensitive material over a substrate, and forming a cap layer over the photo-sensitive material, and patterning the cap layer. Using the patterned cap layer, a first portion of the photo-sensitive material is selectively exposed to a pre-selected light wavelength to change at least one material property of the first portion of the photo-sensitive material, while preventing a second portion of the photo-sensitive material from being exposed to the pre-selected light wavelength. One, but not both of the following steps is then conducted: removing the first portion of the photo-sensitive material and forming in its place a conductive element at least partially surrounded by the second portion of the photo-sensitive material, or removing the second portion of the photo-sensitive material and forming from the first portion of the photo-sensitive material a conductive element electrically connecting two or more portions of a circuit.
    Type: Grant
    Filed: April 28, 2023
    Date of Patent: July 9, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Wei-Jen Lo, Po-Cheng Shih, Syun-Ming Jang, Tze-Liang Lee
  • Patent number: 12009208
    Abstract: The present disclosure provides a semiconductor processing apparatus according to one embodiment. The semiconductor processing apparatus includes a chamber; a base station located in the chamber for supporting a semiconductor substrate; a preheating assembly surrounding the base station; a first heating element fixed relative to the base station and configured to direct heat to the semiconductor substrate; and a second heating element moveable relative to the base station and operable to direct heat to a portion of the semiconductor substrate.
    Type: Grant
    Filed: December 8, 2021
    Date of Patent: June 11, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chih Yung Hung, Shahaji B. More, Chien-Feng Lin, Cheng-Han Lee, Shih-Chieh Chang, Ching-Lun Lai, Wei-Jen Lo
  • Publication number: 20230369132
    Abstract: The present disclosure provides a semiconductor device with a profiled work-function metal gate electrode. The semiconductor structure includes a metal gate structure formed in an opening of an insulating layer. The metal gate structure includes a gate dielectric layer, a barrier layer, a work-function metal layer between the gate dielectric layer and the barrier layer and a work-function adjustment layer over the barrier layer, wherein the work-function metal has an ordered grain orientation. The present disclosure also provides a method of making a semiconductor device with a profiled work-function metal gate electrode.
    Type: Application
    Filed: July 25, 2023
    Publication date: November 16, 2023
    Inventors: Da-Yuan LEE, Hung-Chin CHUNG, Hsien-Ming LEE, Kuan-Ting LIU, Syun-Ming JANG, Weng CHANG, Wei-Jen LO
  • Patent number: 11804409
    Abstract: The present disclosure provides a semiconductor device with a profiled work-function metal gate electrode. The semiconductor structure includes a metal gate structure formed in an opening of an insulating layer. The metal gate structure includes a gate dielectric layer, a barrier layer, a work-function metal layer between the gate dielectric layer and the barrier layer and a work-function adjustment layer over the barrier layer, wherein the work-function metal has an ordered grain orientation. The present disclosure also provides a method of making a semiconductor device with a profiled work-function metal gate electrode.
    Type: Grant
    Filed: July 26, 2021
    Date of Patent: October 31, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
    Inventors: Da-Yuan Lee, Hung-Chin Chung, Hsien-Ming Lee, Kuan-Ting Liu, Syun-Ming Jang, Weng Chang, Wei-Jen Lo
  • Publication number: 20230268224
    Abstract: A representative method includes forming a photo-sensitive material over a substrate, and forming a cap layer over the photo-sensitive material, and patterning the cap layer. Using the patterned cap layer, a first portion of the photo-sensitive material is selectively exposed to a pre-selected light wavelength to change at least one material property of the first portion of the photo-sensitive material, while preventing a second portion of the photo-sensitive material from being exposed to the pre-selected light wavelength. One, but not both of the following steps is then conducted: removing the first portion of the photo-sensitive material and forming in its place a conductive element at least partially surrounded by the second portion of the photo-sensitive material, or removing the second portion of the photo-sensitive material and forming from the first portion of the photo-sensitive material a conductive element electrically connecting two or more portions of a circuit.
    Type: Application
    Filed: April 28, 2023
    Publication date: August 24, 2023
    Inventors: Wei-Jen Lo, Po-Cheng Shih, Syun-Ming Jang, Tze-Liang Lee
  • Patent number: 11676855
    Abstract: A representative method includes forming a photo-sensitive material over a substrate, and forming a cap layer over the photo-sensitive material, and patterning the cap layer. Using the patterned cap layer, a first portion of the photo-sensitive material is selectively exposed to a pre-selected light wavelength to change at least one material property of the first portion of the photo-sensitive material, while preventing a second portion of the photo-sensitive material from being exposed to the pre-selected light wavelength. One, but not both of the following steps is then conducted: removing the first portion of the photo-sensitive material and forming in its place a conductive element at least partially surrounded by the second portion of the photo-sensitive material, or removing the second portion of the photo-sensitive material and forming from the first portion of the photo-sensitive material a conductive element electrically connecting two or more portions of a circuit.
    Type: Grant
    Filed: November 10, 2020
    Date of Patent: June 13, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Wei-Jen Lo, Po-Cheng Shih, Syun-Ming Jang, Tze-Liang Lee
  • Publication number: 20220392767
    Abstract: The present disclosure provides a semiconductor processing apparatus according to one embodiment. The semiconductor processing apparatus includes a chamber; a base station located in the chamber for supporting a semiconductor substrate; a preheating assembly surrounding the base station; a first heating element fixed relative to the base station and configured to direct heat to the semiconductor substrate; and a second heating element moveable relative to the base station and operable to direct heat to a portion of the semiconductor substrate.
    Type: Application
    Filed: December 8, 2021
    Publication date: December 8, 2022
    Inventors: Chih Yung Hung, Shahaji B. More, Chien-Feng Lin, Cheng-Han Lee, Shih-Chieh Chang, Ching-Lun Lai, Wei-Jen Lo
  • Publication number: 20220238337
    Abstract: A method includes placing a wafer into a production chamber, providing a heating source to heat the wafer, and projecting a laser beam on the wafer using a laser projector. The method further includes, when the wafer is heated by both of the heating source and the laser beam, performing a process selected from an epitaxy process to grow a semiconductor layer on the wafer, and an etching process to etch the semiconductor layer.
    Type: Application
    Filed: December 6, 2021
    Publication date: July 28, 2022
    Inventors: Yee-Chia Yeo, Syun-Ming Jang, Wei-Jen Lo
  • Publication number: 20220130706
    Abstract: A method for cleaning debris and contamination from an etching apparatus is provided. The etching apparatus includes a process chamber, a source of radio frequency power, an electrostatic chuck within the process chamber, a chuck electrode, and a source of DC power connected to the chuck electrode. The method of cleaning includes placing a substrate on a surface of the electrostatic chuck, applying a plasma to the substrate, thereby creating a positively charged surface on the surface of the substrate, applying a negative voltage or a radio frequency pulse to the electrode chuck, thereby making debris particles and/or contaminants from the surface of the electrostatic chuck negatively charged and causing them to attach to the positively charged surface of the substrate, and removing the substrate from the etching apparatus thereby removing the debris particles and/or contaminants from the etching apparatus.
    Type: Application
    Filed: January 10, 2022
    Publication date: April 28, 2022
    Inventors: Yu-Chi LIN, Huai-Tei YANG, Lun-Kuang TAN, Wei-Jen LO, Chih-Teng LIAO
  • Publication number: 20220099911
    Abstract: A lens element including an optical effective region and a non-optical effective region is provided. The non-optical effective region has a first surface facing an object side and a second surface facing an image side. The non-optical effective region includes a gate cutting portion connected to the first surface and the second surface, The first surface or the second surface of the non-optical effective region includes a reference surface, at least one connecting surface, and a plurality of step structures. The step structures are concavely disposed and alternate between the reference surface and the at least one connecting surface. The lens element satisfies a condition below: 4.000?ATmax/Dpr, where ATmax is a length of an orthogonal projection of the non-optical effective region on an optical axis, and Dpr is a maximum distance between the reference surface and the step structures in a direction of the optical axis of the lens element.
    Type: Application
    Filed: November 27, 2020
    Publication date: March 31, 2022
    Applicant: GENIUS ELECTRONIC OPTICAL (XIAMEN) CO., LTD.
    Inventor: Wei-Jen Lo
  • Patent number: 11222805
    Abstract: A method for cleaning debris and contamination from an etching apparatus is provided. The etching apparatus includes a process chamber, a source of radio frequency power, an electrostatic chuck within the process chamber, a chuck electrode, and a source of DC power connected to the chuck electrode. The method of cleaning includes placing a substrate on a surface of the electrostatic chuck, applying a plasma to the substrate, thereby creating a positively charged surface on the surface of the substrate, applying a negative voltage or a radio frequency pulse to the electrode chuck, thereby making debris particles and/or contaminants from the surface of the electrostatic chuck negatively charged and causing them to attach to the positively charged surface of the substrate, and removing the substrate from the etching apparatus thereby removing the debris particles and/or contaminants from the etching apparatus.
    Type: Grant
    Filed: April 1, 2020
    Date of Patent: January 11, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yu-Chi Lin, Huai-Tei Yang, Lun-Kuang Tan, Wei-Jen Lo, Chih-Teng Liao
  • Patent number: 11212434
    Abstract: An image device and an image processing integrated circuit (IC) of the image device are provided. The image device includes a camera module, a display panel, a central processing IC, and an image processing IC. Based on a control of the central processing IC, the image processing IC decides whether to pre-process an output of the camera module and provide a pre-processed result to the central processing IC, or provide the output of the camera module directly to the central processing IC. Based on the control of the central processing IC, the image processing IC decides whether to post-process an output of the central processing IC and provide a post-processed result to the display panel, or provide the output of the central processing IC directly to the display panel.
    Type: Grant
    Filed: May 21, 2020
    Date of Patent: December 28, 2021
    Assignee: Novatek Microelectronics Corp.
    Inventors: Chih-Chia Kuo, Chao Yung Liu, Wei-Jen Lo