Patents by Inventor Wei Kang Hsieh

Wei Kang Hsieh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor package and manufacturing method of semiconductor package
    Patent number: 11004827
    Abstract: A manufacturing method of a semiconductor package includes the following steps. At least one lower semiconductor device is provided. A plurality of conductive pillars are formed on the at least one lower semiconductor device. A dummy die is disposed on a side of the at least one lower semiconductor device. An upper semiconductor device is disposed on the at least one lower semiconductor device and the dummy die, wherein the upper semiconductor device reveals a portion of the at least one lower semiconductor device where the plurality of conductive pillars are disposed. The at least one lower semiconductor device, the dummy die, the upper semiconductor device, and the plurality of conductive pillars are encapsulated in an encapsulating material. A redistribution structure is formed over the upper semiconductor device and the plurality of conductive pillars.
    Type: Grant
    Filed: September 18, 2018
    Date of Patent: May 11, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wei Kang Hsieh, Hung-Yi Kuo, Hao-Yi Tsai, Kuo Lung Pan, Tin-Hao Kuo, Yu-Chia Lai, Mao-Yen Chang, Po-Yuan Teng, Shu-Rong Chun
  • SEMICONDCUTOR PACKAGE AND MANUFACTURING METHOD OF SEMICONDCUTOR PACKAGE
    Publication number: 20200091114
    Abstract: A manufacturing method of a semiconductor package includes the following steps. At least one lower semiconductor device is provided. A plurality of conductive pillars are formed on the at least one lower semiconductor device. A dummy die is disposed on a side of the at least one lower semiconductor device. An upper semiconductor device is disposed on the at least one lower semiconductor device and the dummy die, wherein the upper semiconductor device reveals a portion of the at least one lower semiconductor device where the plurality of conductive pillars are disposed. The at least one lower semiconductor device, the dummy die, the upper semiconductor device, and the plurality of conductive pillars are encapsulated in an encapsulating material. A redistribution structure is formed over the upper semiconductor device and the plurality of conductive pillars.
    Type: Application
    Filed: September 18, 2018
    Publication date: March 19, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Wei Kang Hsieh, Hung-Yi Kuo, Hao-Yi Tsai, Kuo Lung Pan, Tin-Hao Kuo, Yu-Chia Lai, Mao-Yen Chang, Po-Yuan Teng, Shu-Rong Chun