Abstract: The present disclosure provides one embodiment of a semiconductor structure. The semiconductor structure includes a semiconductor substrate having a front surface and a backside surface; integrated circuit features formed on the front surface of the semiconductor substrate; and a polycrystalline silicon layer disposed on the backside surface of the semiconductor substrate.

Abstract: A method includes etching a semiconductor substrate to form a recess in the semiconductor substrate, and reacting a surface layer of the semiconductor substrate to generate a reacted layer. The surface layer of the semiconductor substrate is in the recess. The reacted layer is then removed. An epitaxy is performed to grow a semiconductor material in the recess.

Abstract: The present disclosure provides one embodiment of a semiconductor structure. The semiconductor structure includes a semiconductor substrate having a front surface and a backside surface; integrated circuit features formed on the front surface of the semiconductor substrate; and a polycrystalline silicon layer disposed on the backside surface of the semiconductor substrate.

Abstract: A method for the direct reduction of metal oxides with carbon. According to the method, pellets are formed containing a mixture of metal oxides having sequential reduction potentials when heated in the presence of carbon and an amount of carbon sufficient to reduce more easily reduced of the metal oxides yet insufficient to reduce all of the metal oxides. The pellets are heated to a temperature at least sufficient to reduce the more easily reduced metal oxides to produce direct reduction metal while removing sufficient of the carbon in the form of oxides of carbon during the reduction to avoid a subsequent decarburization step in further processing of the direct reduction metal.

Abstract: The present disclosure provides one embodiment of a semiconductor structure. The semiconductor structure includes a semiconductor substrate having a front surface and a backside surface; integrated circuit features formed on the front surface of the semiconductor substrate; and a polycrystalline silicon layer disposed on the backside surface of the semiconductor substrate.

Abstract: The present invention relates to a proximity sensing structure, which is disposed in an article for detecting whether an object approaches the article. The article can be an electronic device. The proximity sensing structure comprises a first sensing electrode, a wire, a second sensing electrode, and a proximity sensor. Both ends of the wire are coupled electrically to the first and second sensing electrodes, respectively. The proximity sensor is coupled electrically to the wire, the first sensing electrode, and the second sensing electrode, and detects whether the object approaches the article according to an electrical status of the wire, the first sensing electrode, and the second sensing electrode. Thereby, the proximity sensing structure according to the present invention uses the wire to increase the sensing area. In addition, the wire design makes the disposal of the proximity sensing structure more flexible.

Abstract: A sound quality testing method and system test sound quality of a network-based communication device. The method includes connecting the network-based communication device to a test host through the Internet; sending a testing signal from the test host to the sound receiving unit for generating an audio packet signal; sending the audio packet signal from the sound receiving unit to the test host through the Internet to produce a first test result; sending a test packet signal from the test host to the network-based communication device through the Internet to enable the network-based communication device to generate a speaker signal; receiving and analyzing the speaker signal by the test host to produce a second test result; and evaluating sound quality of the network-based communication device by the test host based on the first test result and the second test result.

Abstract: A sound quality testing device for testing a communication apparatus has a sound generating unit and a sound receiving unit. The sound quality testing device includes a carrying unit, a first testing module, and a second testing module. The carrying unit carries the communication apparatus. The first testing module generates and sends a sound signal to the sound receiving unit. The second testing module receives a sound-generating signal generated by the sound generating unit. The sound quality testing device provides a standardized simulation testing environment having low or no noise signals, such that the communication apparatus can be tested precisely and steadily in terms of sound quality, such as volume, frequency responses, and harmonic wave distortion.

Abstract: A method and a device for generation of a secret key are provided. In one exemplary embodiment, the disclosure is directed to a device for generation of a secret key. The device for generation of a secret key includes a motion sensor, a storage unit and a control unit. The motion sensor is configured to sense a motion of the device in a three-dimensional space and generate a motion sensing signal. The storage unit is configured to store the motion sensing signal. The control unit is electrically coupled to the motion sensor and the storage unit, and configured to generate a secret key by the motion sensing signal.

Abstract: A system for localizing an acoustic source is provided. This system includes a microphone apparatus, an audio processing apparatus, a photographing apparatus, and a decision apparatus. The microphone apparatus receives an acoustic signal and generates at least one received audio signal. The audio processing apparatus generates first location information based on the at least one received audio signal. The decision apparatus generates depth information based on at least one image captured by the photographing apparatus. According to the first location information, the at least one captured image, and the depth information, the decision apparatus determines a location corresponding to the source of the acoustic signal.

Abstract: An electronic device and a method enables an unlock operation of the electronic device. When the electronic device in a lock state is moved for the unlock operation, the electronic device receives a three-axis acceleration vector of the electronic device from an accelerometer. The electronic device analyzes three movement directions of the electronic device along three coordinate axes. The electronic device determines whether the analyzed three movement directions are the same as three predetermined movement directions along the three coordinate axes. If the analyzed three movement directions are the same as the three predetermined movement directions along the three coordinate axes, the electronic device is changed from the lock state to an unlock state.

Abstract: A semiconductor device is formed by a multi-step etching process that produces trench openings in a silicon substrate immediately adjacent transistor gate structures formed over the substrate surface. The multi-step etching process is a Br-based etching operation with one step including nitrogen and a further step deficient of nitrogen. The etching process does not attack the transistor structure and forms the openings. The openings are bounded by upper surfaces that extend downwardly from the substrate surface and are substantially vertical, and lower surfaces that bulge outwardly from the upper vertical sections and undercut the transistor structure. The openings may be filled with a suitable source/drain material to produce SSD transistors with desirable Idsat characteristics.

Abstract: A hybrid system is combining transaction level modeling (TLM) simulators and hardware accelerators so that new system-on chip (SoC) designs are integrated in a virtual platform (VP) to run TLM simulation and existent semiconductor intellectual properties (IP) are added to physical platform (PP) to run hardware accelerator. A new circuit design with TLM is easier to be performed than with register transfer language (RTL) and it is integrated in a virtual platform and existent IP doesn't have to be redesigned to be integrated in a virtual platform.

Abstract: A multi-step etching process produces trench openings in a silicon substrate that are immediately adjacent transistor structures formed over the substrate surface. The multi-step etching process is a Br-based etching operation with one step including nitrogen and a further step deficient of nitrogen. The etching process does not attack the transistor structure and forms an opening bounded by upper surfaces that extend downwardly from the substrate surface and are substantially vertical, and lower surfaces that bulge outwardly from the upper vertical sections and undercut the transistor structure. The aggressive undercut produces a desirable stress in the etched silicon surface. The openings are then filled with a suitable source/drain material and SSD transistors with desirable Idsat characteristics may then be formed.

Abstract: The present invention relates to a wire saw and a method for fabricating the same. The method for fabricating a wire saw according to the present invention includes: providing a core wire; coating an intermediate layer over the core wire, and embedding a plurality of abrasives in the intermediate layer; and plating a metal protective layer over the abrasives. Accordingly, the present invention can resolve the conventional problem of abrasives in the plating bath aggregating during electroplating deposition, so as to enhance cutting quality and precision.

Abstract: A system for display images comprising a thin film transistor array substrate is disclosed. The system for display images comprises a substrate having a pixel area, a source/drain region overlying the substrate within an active layer in the pixel area, a bottom electrode overlying the substrate in the pixel area, a top electrode overlying the bottom electrode, a first dielectric layer disposed on the active layer, a second dielectric layer disposed on the first dielectric layer, wherein the second dielectric layer is disposed between the bottom electrode and the top electrode and a gate disposed overlying the active layer, wherein the first and second dielectric layers are interposed between the gate and the active layer.

Abstract: A system for localizing an acoustic source is provided. This system includes a microphone apparatus, an audio processing apparatus, a photographing apparatus, and a decision apparatus. The microphone apparatus receives an acoustic signal and generates at least one received audio signal. The audio processing apparatus generates first location information based on the at least one received audio signal. The decision apparatus generates depth information based on at least one image captured by the photographing apparatus. According to the first location information, the at least one captured image, and the depth information, the decision apparatus determines a location corresponding to the source of the acoustic signal.

Abstract: A portable electronic device includes an earphone jack device for connecting a plug of an earphone and a main circuit board. The main circuit board includes an audio signal processor module connected to the earphone jack device, an MSM module connected to the audio signal processor module, and a PMIC module connected to the earphone jack device. The MSM module generates a first bias voltage inputted into the audio signal processor module to actuate the audio signal processor module to play audio signals, and the PMIC module generates a second bias voltage inputted to the earphone jack device to actuate the earphone connected to the earphone jack device.

Abstract: A multi-step etching process produces trench openings in a silicon substrate that are immediately adjacent transistor structures formed over the substrate surface. The multi-step etching process is a Br-based etching operation with one step including nitrogen and a further step deficient of nitrogen. The etching process does not attack the transistor structure and forms an opening bounded by upper surfaces that extend downwardly from the substrate surface and are substantially vertical, and lower surfaces that bulge outwardly from the upper vertical sections and undercut the transistor structure. The aggressive undercut produces a desirable stress in the etched silicon surface. The openings are then filled with a suitable source/drain material and SSD transistors with desirable Idsat characteristics may then be formed.